Search
lxdream.org :: lxdream/src/gdrom/ide.h :: diff
lxdream 0.9.1
released Jun 29
Download Now
filename src/gdrom/ide.h
changeset 125:49bf45f8210a
prev47:da09bcb7ce69
next138:afabd7e6d26d
author nkeynes
date Wed Mar 22 14:29:02 2006 +0000 (14 years ago)
permissions -rw-r--r--
last change Rename IDE DMA registers appropriately
Remove forced irq hack
Add correct irq handling for IDE
Miscellaneous WIP for the GD-rom drive
file annotate diff log raw
1.1 --- a/src/gdrom/ide.h Tue Dec 27 12:41:33 2005 +0000
1.2 +++ b/src/gdrom/ide.h Wed Mar 22 14:29:02 2006 +0000
1.3 @@ -1,5 +1,5 @@
1.4 /**
1.5 - * $Id: ide.h,v 1.3 2005-12-27 12:41:33 nkeynes Exp $
1.6 + * $Id: ide.h,v 1.4 2006-03-22 14:29:02 nkeynes Exp $
1.7 *
1.8 * This file defines the interface and structures of the dreamcast's IDE
1.9 * port. Note that the register definitions are in asic.h, as the registers
1.10 @@ -37,15 +37,18 @@
1.11 uint8_t lba2; /* A05F7094 Read/Write 10101 */
1.12 uint8_t device; /* A05F7098 Read/Write 10110 */
1.13 uint8_t command; /* A05F709C Write-only 10111 */
1.14 -
1.15 +
1.16 /* We don't keep the data register per se, rather the currently pending
1.17 * data is kept here and read out a byte at a time (in PIO mode) or all at
1.18 * once (in DMA mode). The IDE routines are responsible for managing this
1.19 * memory. If dataptr == NULL, there is no data available.
1.20 */
1.21 - char *data;
1.22 + unsigned char *data;
1.23 uint16_t *readptr, *writeptr;
1.24 int datalen;
1.25 + int blocksize; /* Used to determine the transfer unit size */
1.26 + int blockleft; /* Bytes remaining in the current block */
1.27 + uint8_t intrq_pending; /* Flag to indicate if the INTRQ line is active */
1.28 };
1.29
1.30 #define IDE_ST_BUSY 0x80
1.31 @@ -82,6 +85,9 @@
1.32
1.33 #define PKT_CMD_RESET 0x00 /* Wild-ass guess */
1.34 #define PKT_CMD_IDENTIFY 0x11
1.35 +#define PKT_CMD_SENSE 0x13
1.36 +#define PKT_CMD_READ_TOC 0x14
1.37 +#define PKT_CMD_READ_SECTOR 0x30
1.38
1.39 extern struct ide_registers idereg;
1.40
1.41 @@ -89,19 +95,14 @@
1.42 * only when ide_can_write_regs() is true
1.43 */
1.44 #define ide_can_write_regs() ((idereg.status&0x88)==0)
1.45 -
1.46 -/* Called upon:
1.47 - * a) Writing the command register
1.48 - * b) Reading the status (but not altstatus) register
1.49 - * (whether this actually has any effect an the ASIC event is TBD)
1.50 - */
1.51 -void ide_clear_interrupt(void);
1.52 +#define IS_IDE_IRQ_ENABLED() ((idereg.control&0x02)==0)
1.53
1.54 void ide_reset(void);
1.55
1.56 uint16_t ide_read_data_pio(void);
1.57 +uint8_t ide_read_status(void);
1.58 void ide_write_data_pio( uint16_t value );
1.59 -void ide_write_buffer( char * );
1.60 +void ide_write_buffer( unsigned char *data, int length );
1.61
1.62 void ide_write_command( uint8_t command );
1.63 void ide_write_control( uint8_t value );
.