1.1 --- a/src/sh4/timer.c	Wed Oct 03 08:22:27 2007 +0000
     1.2 +++ b/src/sh4/timer.c	Sat Oct 06 09:03:24 2007 +0000
     1.3 @@ -1,5 +1,5 @@
     1.4  /**
     1.5 - * $Id: timer.c,v 1.8 2007-10-03 08:22:27 nkeynes Exp $
     1.6 + * $Id: timer.c,v 1.9 2007-10-06 09:03:24 nkeynes Exp $
     1.7   * 
     1.8   * SH4 Timer/Clock peripheral modules (CPG, TMU, RTC), combined together to
     1.9   * keep things simple (they intertwine a bit).
    1.10 @@ -144,7 +144,7 @@
    1.11      if( (oldtcr & TCR_UNF) == 0 ) {
    1.12  	tcr = tcr & (~TCR_UNF);
    1.13      } else {
    1.14 -	if( (oldtcr & TCR_UNIE == 0) && 
    1.15 +	if( ((oldtcr & TCR_UNIE) == 0) && 
    1.16  	    (tcr & TCR_IRQ_ACTIVE) == TCR_IRQ_ACTIVE ) {
    1.17  	    intc_raise_interrupt( INT_TMU_TUNI0 + timer );
    1.18  	} else if( (oldtcr & TCR_UNIE) != 0 &&