lxdream.org :: lxdream/src/sh4/cache.c r939:6f2302afeb89

tree revision 939:6f2302afeb89 lxdream-mem

filename	src/sh4/cache.c
changeset	939:6f2302afeb89
prev	933:880c37bb1909
next	946:d41ee7994db7
author	nkeynes
date	Sat Jan 03 03:30:26 2009 +0000 (14 years ago)
branch	lxdream-mem
permissions	-rw-r--r--
last change	MMU work-in-progress * Move SDRAM out into separate sdram.c * Move all page-table management into mmu.c * Convert UTLB management to use the new page-tables * Rip out all calls to mmu_vma_to_phys_* and replace with direct access

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     1.1 --- a/src/sh4/cache.c	Wed Dec 24 06:06:23 2008 +0000
     1.2 +++ b/src/sh4/cache.c	Sat Jan 03 03:30:26 2009 +0000
     1.3 @@ -1,6 +1,6 @@
     1.4  /**
     1.5   * $Id$
     1.6 - * Implements the on-chip operand cache and instruction caches
     1.7 + * Implements the on-chip operand cache, instruction cache, and store queue.
     1.8   *
     1.9   * Copyright (c) 2008 Nathan Keynes.
    1.10   *
    1.11 @@ -295,4 +295,21 @@
    1.12              sh4_address_space[i] = &mem_region_unmapped;
    1.13          break;
    1.14      }
    1.15 -}
    1.16 \ No newline at end of file
    1.17 +}
    1.18 +
    1.19 +
    1.20 +/***** Store-queue (considered part of the cache by the SH7750 manual) ******/
    1.21 +static void FASTCALL p4_storequeue_write_long( sh4addr_t addr, uint32_t val )
    1.22 +{
    1.23 +    sh4r.store_queue[(addr>>2)&0xF] = val;
    1.24 +}
    1.25 +static int32_t FASTCALL p4_storequeue_read_long( sh4addr_t addr )
    1.26 +{
    1.27 +    return sh4r.store_queue[(addr>>2)&0xF];
    1.28 +}
    1.29 +
    1.30 +struct mem_region_fn p4_region_storequeue = { 
    1.31 +        p4_storequeue_read_long, p4_storequeue_write_long,
    1.32 +        p4_storequeue_read_long, p4_storequeue_write_long,
    1.33 +        p4_storequeue_read_long, p4_storequeue_write_long,
    1.34 +        unmapped_read_burst, unmapped_write_burst }; // No burst access.