Search
lxdream.org :: lxdream/src/sh4/sh4mem.c :: diff
lxdream 0.9.1
released Jun 29
Download Now
filename src/sh4/sh4mem.c
changeset 939:6f2302afeb89
prev934:3acd3b3ee6d1
next945:787729653236
author nkeynes
date Sat Jan 03 03:30:26 2009 +0000 (12 years ago)
branchlxdream-mem
permissions -rw-r--r--
last change MMU work-in-progress
* Move SDRAM out into separate sdram.c
* Move all page-table management into mmu.c
* Convert UTLB management to use the new page-tables
* Rip out all calls to mmu_vma_to_phys_* and replace with direct access
file annotate diff log raw
1.1 --- a/src/sh4/sh4mem.c Fri Dec 26 14:25:23 2008 +0000
1.2 +++ b/src/sh4/sh4mem.c Sat Jan 03 03:30:26 2009 +0000
1.3 @@ -1,6 +1,8 @@
1.4 /**
1.5 * $Id$
1.6 - * sh4mem.c is responsible for interfacing between the SH4's internal memory
1.7 + *
1.8 + * This is a deprecated module that is not yet completely extricated from the
1.9 + * surrounding code.
1.10 *
1.11 * Copyright (c) 2005 Nathan Keynes.
1.12 *
1.13 @@ -28,178 +30,7 @@
1.14 #include "sh4/xltcache.h"
1.15 #include "pvr2/pvr2.h"
1.16
1.17 -/* System regions (probably should be defined elsewhere) */
1.18 -extern struct mem_region_fn mem_region_unmapped;
1.19 -extern struct mem_region_fn mem_region_sdram;
1.20 -extern struct mem_region_fn mem_region_vram32;
1.21 -extern struct mem_region_fn mem_region_vram64;
1.22 -extern struct mem_region_fn mem_region_audioram;
1.23 -extern struct mem_region_fn mem_region_flashram;
1.24 -extern struct mem_region_fn mem_region_bootrom;
1.25 -
1.26 -/* On-chip regions other than defined MMIO regions */
1.27 -extern struct mem_region_fn p4_region_storequeue;
1.28 -extern struct mem_region_fn p4_region_icache_addr;
1.29 -extern struct mem_region_fn p4_region_icache_data;
1.30 -extern struct mem_region_fn p4_region_ocache_addr;
1.31 -extern struct mem_region_fn p4_region_ocache_data;
1.32 -extern struct mem_region_fn p4_region_itlb_addr;
1.33 -extern struct mem_region_fn p4_region_itlb_data;
1.34 -extern struct mem_region_fn p4_region_utlb_addr;
1.35 -extern struct mem_region_fn p4_region_utlb_data;
1.36 -
1.37 -/********************* The main ram address space **********************/
1.38 -static int32_t FASTCALL ext_sdram_read_long( sh4addr_t addr )
1.39 -{
1.40 - return *((int32_t *)(dc_main_ram + (addr&0x00FFFFFF)));
1.41 -}
1.42 -static int32_t FASTCALL ext_sdram_read_word( sh4addr_t addr )
1.43 -{
1.44 - return SIGNEXT16(*((int16_t *)(dc_main_ram + (addr&0x00FFFFFF))));
1.45 -}
1.46 -static int32_t FASTCALL ext_sdram_read_byte( sh4addr_t addr )
1.47 -{
1.48 - return SIGNEXT8(*((int16_t *)(dc_main_ram + (addr&0x00FFFFFF))));
1.49 -}
1.50 -static void FASTCALL ext_sdram_write_long( sh4addr_t addr, uint32_t val )
1.51 -{
1.52 - *(uint32_t *)(dc_main_ram + (addr&0x00FFFFFF)) = val;
1.53 - xlat_invalidate_long(addr);
1.54 -}
1.55 -static void FASTCALL ext_sdram_write_word( sh4addr_t addr, uint32_t val )
1.56 -{
1.57 - *(uint16_t *)(dc_main_ram + (addr&0x00FFFFFF)) = (uint16_t)val;
1.58 - xlat_invalidate_word(addr);
1.59 -}
1.60 -static void FASTCALL ext_sdram_write_byte( sh4addr_t addr, uint32_t val )
1.61 -{
1.62 - *(uint8_t *)(dc_main_ram + (addr&0x00FFFFFF)) = (uint8_t)val;
1.63 - xlat_invalidate_word(addr);
1.64 -}
1.65 -static void FASTCALL ext_sdram_read_burst( unsigned char *dest, sh4addr_t addr )
1.66 -{
1.67 - memcpy( dest, dc_main_ram+(addr&0x00FFFFFF), 32 );
1.68 -}
1.69 -static void FASTCALL ext_sdram_write_burst( sh4addr_t addr, unsigned char *src )
1.70 -{
1.71 - memcpy( dc_main_ram+(addr&0x00FFFFFF), src, 32 );
1.72 -}
1.73 -
1.74 -struct mem_region_fn mem_region_sdram = { ext_sdram_read_long, ext_sdram_write_long,
1.75 - ext_sdram_read_word, ext_sdram_write_word,
1.76 - ext_sdram_read_byte, ext_sdram_write_byte,
1.77 - ext_sdram_read_burst, ext_sdram_write_burst };
1.78 -
1.79 -
1.80 -/***************************** P4 Regions ************************************/
1.81 -
1.82 -/* Store-queue (long-write only?) */
1.83 -static void FASTCALL p4_storequeue_write_long( sh4addr_t addr, uint32_t val )
1.84 -{
1.85 - sh4r.store_queue[(addr>>2)&0xF] = val;
1.86 -}
1.87 -static int32_t FASTCALL p4_storequeue_read_long( sh4addr_t addr )
1.88 -{
1.89 - return sh4r.store_queue[(addr>>2)&0xF];
1.90 -}
1.91 -
1.92 -struct mem_region_fn p4_region_storequeue = {
1.93 - p4_storequeue_read_long, p4_storequeue_write_long,
1.94 - p4_storequeue_read_long, p4_storequeue_write_long,
1.95 - p4_storequeue_read_long, p4_storequeue_write_long,
1.96 - unmapped_read_burst, unmapped_write_burst }; // No burst access.
1.97 -
1.98 -/* TLB access */
1.99 -struct mem_region_fn p4_region_itlb_addr = {
1.100 - mmu_itlb_addr_read, mmu_itlb_addr_write,
1.101 - mmu_itlb_addr_read, mmu_itlb_addr_write,
1.102 - mmu_itlb_addr_read, mmu_itlb_addr_write,
1.103 - unmapped_read_burst, unmapped_write_burst };
1.104 -struct mem_region_fn p4_region_itlb_data = {
1.105 - mmu_itlb_data_read, mmu_itlb_data_write,
1.106 - mmu_itlb_data_read, mmu_itlb_data_write,
1.107 - mmu_itlb_data_read, mmu_itlb_data_write,
1.108 - unmapped_read_burst, unmapped_write_burst };
1.109 -struct mem_region_fn p4_region_utlb_addr = {
1.110 - mmu_utlb_addr_read, mmu_utlb_addr_write,
1.111 - mmu_utlb_addr_read, mmu_utlb_addr_write,
1.112 - mmu_utlb_addr_read, mmu_utlb_addr_write,
1.113 - unmapped_read_burst, unmapped_write_burst };
1.114 -struct mem_region_fn p4_region_utlb_data = {
1.115 - mmu_utlb_data_read, mmu_utlb_data_write,
1.116 - mmu_utlb_data_read, mmu_utlb_data_write,
1.117 - mmu_utlb_data_read, mmu_utlb_data_write,
1.118 - unmapped_read_burst, unmapped_write_burst };
1.119 -
1.120 -/********************** Initialization *************************/
1.121 -
1.122 -mem_region_fn_t *sh4_address_space;
1.123 -
1.124 -static void sh4_register_mem_region( uint32_t start, uint32_t end, mem_region_fn_t fn )
1.125 -{
1.126 - int count = (end - start) >> 12;
1.127 - mem_region_fn_t *ptr = &sh4_address_space[start>>12];
1.128 - while( count-- > 0 ) {
1.129 - *ptr++ = fn;
1.130 - }
1.131 -}
1.132 -
1.133 -static gboolean sh4_ext_page_remapped( sh4addr_t page, mem_region_fn_t fn, void *user_data )
1.134 -{
1.135 - int i;
1.136 - for( i=0; i<= 0xC0000000; i+= 0x20000000 ) {
1.137 - sh4_address_space[(page|i)>>12] = fn;
1.138 - }
1.139 -}
1.140 -
1.141 -
1.142 -void sh4_mem_init()
1.143 -{
1.144 - int i;
1.145 - mem_region_fn_t *ptr;
1.146 - sh4_address_space = mem_alloc_pages( sizeof(mem_region_fn_t) * 256 );
1.147 - for( i=0, ptr = sh4_address_space; i<7; i++, ptr += LXDREAM_PAGE_TABLE_ENTRIES ) {
1.148 - memcpy( ptr, ext_address_space, sizeof(mem_region_fn_t) * LXDREAM_PAGE_TABLE_ENTRIES );
1.149 - }
1.150 -
1.151 - /* Setup main P4 regions */
1.152 - sh4_register_mem_region( 0xE0000000, 0xE4000000, &p4_region_storequeue );
1.153 - sh4_register_mem_region( 0xE4000000, 0xF0000000, &mem_region_unmapped );
1.154 - sh4_register_mem_region( 0xF0000000, 0xF1000000, &p4_region_icache_addr );
1.155 - sh4_register_mem_region( 0xF1000000, 0xF2000000, &p4_region_icache_data );
1.156 - sh4_register_mem_region( 0xF2000000, 0xF3000000, &p4_region_itlb_addr );
1.157 - sh4_register_mem_region( 0xF3000000, 0xF4000000, &p4_region_itlb_data );
1.158 - sh4_register_mem_region( 0xF4000000, 0xF5000000, &p4_region_ocache_addr );
1.159 - sh4_register_mem_region( 0xF5000000, 0xF6000000, &p4_region_ocache_data );
1.160 - sh4_register_mem_region( 0xF6000000, 0xF7000000, &p4_region_utlb_addr );
1.161 - sh4_register_mem_region( 0xF7000000, 0xF8000000, &p4_region_utlb_data );
1.162 - sh4_register_mem_region( 0xF8000000, 0x00000000, &mem_region_unmapped );
1.163 -
1.164 - /* Setup P4 control region */
1.165 - sh4_register_mem_region( 0xFF000000, 0xFF001000, &mmio_region_MMU.fn );
1.166 - sh4_register_mem_region( 0xFF100000, 0xFF101000, &mmio_region_PMM.fn );
1.167 - sh4_register_mem_region( 0xFF200000, 0xFF201000, &mmio_region_UBC.fn );
1.168 - sh4_register_mem_region( 0xFF800000, 0xFF801000, &mmio_region_BSC.fn );
1.169 - sh4_register_mem_region( 0xFF900000, 0xFFA00000, &mem_region_unmapped ); // SDMR2 + SDMR3
1.170 - sh4_register_mem_region( 0xFFA00000, 0xFFA01000, &mmio_region_DMAC.fn );
1.171 - sh4_register_mem_region( 0xFFC00000, 0xFFC01000, &mmio_region_CPG.fn );
1.172 - sh4_register_mem_region( 0xFFC80000, 0xFFC81000, &mmio_region_RTC.fn );
1.173 - sh4_register_mem_region( 0xFFD00000, 0xFFD01000, &mmio_region_INTC.fn );
1.174 - sh4_register_mem_region( 0xFFD80000, 0xFFD81000, &mmio_region_TMU.fn );
1.175 - sh4_register_mem_region( 0xFFE00000, 0xFFE01000, &mmio_region_SCI.fn );
1.176 - sh4_register_mem_region( 0xFFE80000, 0xFFE81000, &mmio_region_SCIF.fn );
1.177 - sh4_register_mem_region( 0xFFF00000, 0xFFF01000, &mem_region_unmapped ); // H-UDI
1.178 -
1.179 - register_mem_page_remapped_hook( sh4_ext_page_remapped, NULL );
1.180 -}
1.181 -
1.182 -/************** Access methods ***************/
1.183 -#ifdef HAVE_FRAME_ADDRESS
1.184 -#define RETURN_VIA(exc) do{ *(((void **)__builtin_frame_address(0))+1) = exc; return; } while(0)
1.185 -#else
1.186 -#define RETURN_VIA(exc) return NULL
1.187 -#endif
1.188 -
1.189 +/************** Obsolete methods ***************/
1.190
1.191 int32_t FASTCALL sh4_read_long( sh4addr_t addr )
1.192 {
.