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lxdream.org :: lxdream/src/sh4/cache.c :: diff
lxdream 0.9.1
released Jun 29
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filename src/sh4/cache.c
changeset 968:6fb1481859a4
prev953:f4a156508ad1
next971:886e1ec8447d
author nkeynes
date Thu Jan 15 11:23:20 2009 +0000 (13 years ago)
permissions -rw-r--r--
last change Fix various compile-time warnings
file annotate diff log raw
1.1 --- a/src/sh4/cache.c Tue Jan 13 11:56:28 2009 +0000
1.2 +++ b/src/sh4/cache.c Thu Jan 15 11:23:20 2009 +0000
1.3 @@ -167,13 +167,13 @@
1.4
1.5 /************************** Cache direct access ******************************/
1.6
1.7 -static int32_t ccn_icache_addr_read( sh4addr_t addr )
1.8 +static int32_t FASTCALL ccn_icache_addr_read( sh4addr_t addr )
1.9 {
1.10 int entry = (addr & 0x00001FE0);
1.11 return ccn_icache[entry>>5].tag;
1.12 }
1.13
1.14 -static void ccn_icache_addr_write( sh4addr_t addr, uint32_t val )
1.15 +static void FASTCALL ccn_icache_addr_write( sh4addr_t addr, uint32_t val )
1.16 {
1.17 int entry = (addr & 0x00003FE0);
1.18 struct cache_line *line = &ccn_ocache[entry>>5];
1.19 @@ -193,13 +193,13 @@
1.20 unmapped_prefetch };
1.21
1.22
1.23 -static int32_t ccn_icache_data_read( sh4addr_t addr )
1.24 +static int32_t FASTCALL ccn_icache_data_read( sh4addr_t addr )
1.25 {
1.26 int entry = (addr & 0x00001FFC);
1.27 return *(uint32_t *)&ccn_icache_data[entry];
1.28 }
1.29
1.30 -static void ccn_icache_data_write( sh4addr_t addr, uint32_t val )
1.31 +static void FASTCALL ccn_icache_data_write( sh4addr_t addr, uint32_t val )
1.32 {
1.33 int entry = (addr & 0x00001FFC);
1.34 *(uint32_t *)&ccn_icache_data[entry] = val;
1.35 @@ -213,20 +213,20 @@
1.36 unmapped_prefetch };
1.37
1.38
1.39 -static int32_t ccn_ocache_addr_read( sh4addr_t addr )
1.40 +static int32_t FASTCALL ccn_ocache_addr_read( sh4addr_t addr )
1.41 {
1.42 int entry = (addr & 0x00003FE0);
1.43 return ccn_ocache[entry>>5].tag;
1.44 }
1.45
1.46 -static void ccn_ocache_addr_write( sh4addr_t addr, uint32_t val )
1.47 +static void FASTCALL ccn_ocache_addr_write( sh4addr_t addr, uint32_t val )
1.48 {
1.49 int entry = (addr & 0x00003FE0);
1.50 struct cache_line *line = &ccn_ocache[entry>>5];
1.51 if( addr & 0x08 ) { // Associative
1.52 } else {
1.53 if( (line->tag & (CACHE_VALID|CACHE_DIRTY)) == (CACHE_VALID|CACHE_DIRTY) ) {
1.54 - char *cache_data = &ccn_ocache_data[entry&0x00003FE0];
1.55 + unsigned char *cache_data = &ccn_ocache_data[entry&0x00003FE0];
1.56 // Cache line is dirty - writeback.
1.57 ext_address_space[line->tag>>12]->write_burst(line->key, cache_data);
1.58 }
1.59 @@ -243,13 +243,13 @@
1.60 unmapped_prefetch };
1.61
1.62
1.63 -static int32_t ccn_ocache_data_read( sh4addr_t addr )
1.64 +static int32_t FASTCALL ccn_ocache_data_read( sh4addr_t addr )
1.65 {
1.66 int entry = (addr & 0x00003FFC);
1.67 return *(uint32_t *)&ccn_ocache_data[entry];
1.68 }
1.69
1.70 -static void ccn_ocache_data_write( sh4addr_t addr, uint32_t val )
1.71 +static void FASTCALL ccn_ocache_data_write( sh4addr_t addr, uint32_t val )
1.72 {
1.73 int entry = (addr & 0x00003FFC);
1.74 *(uint32_t *)&ccn_ocache_data[entry] = val;
.