filename | src/gdrom/ide.h |
changeset | 254:7c9e34c37670 |
prev | 245:a1d0655a88d3 |
next | 257:62fa1cabc46c |
author | nkeynes |
date | Thu Dec 21 10:15:54 2006 +0000 (14 years ago) |
permissions | -rw-r--r-- |
last change | Fix 0x40,0x01 in accordance with test results Add reset flag to fail first packet command (also as per tests) |
file | annotate | diff | log | raw |
1.1 --- a/src/gdrom/ide.h Tue Dec 19 09:52:56 2006 +00001.2 +++ b/src/gdrom/ide.h Thu Dec 21 10:15:54 2006 +00001.3 @@ -1,5 +1,5 @@1.4 /**1.5 - * $Id: ide.h,v 1.10 2006-12-19 09:52:56 nkeynes Exp $1.6 + * $Id: ide.h,v 1.11 2006-12-21 10:15:54 nkeynes Exp $1.7 *1.8 * This file defines the interface and structures of the dreamcast's IDE1.9 * port. Note that the register definitions are in asic.h, as the registers1.10 @@ -42,6 +42,7 @@1.11 /* Internal IDE state */1.12 uint8_t intrq_pending; /* Flag to indicate if the INTRQ line is active */1.13 gboolean interface_enabled;1.14 + gboolean was_reset; /* Flag indicating that the device has just been reset */1.15 int state;1.17 /* Sense response for the last executed packet command */1.18 @@ -60,7 +61,6 @@1.19 /* Status reporting information */1.20 uint8_t last_read_track;1.21 uint32_t last_read_lba;1.22 - uint32_t last_read_count;1.23 };1.25 #define IDE_STATE_IDLE 01.26 @@ -108,7 +108,7 @@1.27 /* Note: control can be written at any time - all other registers are writable1.28 * only when ide_can_write_regs() is true1.29 */1.30 -#define ide_can_write_regs() ((idereg.status&0x88)==0)1.31 +#define ide_can_write_regs() ((idereg.status&0x80)==0)1.32 #define IS_IDE_IRQ_ENABLED() ((idereg.control&0x02)==0)
.