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lxdream.org :: lxdream/src/sh4/sh4.c :: diff
lxdream 0.9.1
released Jun 29
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filename src/sh4/sh4.c
changeset 841:808d64b05073
prev823:8a592668322f
next903:1337c7a7dd6b
author nkeynes
date Tue Sep 02 11:53:16 2008 +0000 (13 years ago)
permissions -rw-r--r--
last change Initial implementation of the performance counters, only working one for now
is raw clock cycles (0x23)
file annotate diff log raw
1.1 --- a/src/sh4/sh4.c Sun Aug 24 01:40:58 2008 +0000
1.2 +++ b/src/sh4/sh4.c Tue Sep 02 11:53:16 2008 +0000
1.3 @@ -118,6 +118,7 @@
1.4 CPG_reset();
1.5 INTC_reset();
1.6 MMU_reset();
1.7 + PMM_reset();
1.8 TMU_reset();
1.9 SCIF_reset();
1.10
1.11 @@ -156,6 +157,7 @@
1.12 if( sh4r.sh4_state != SH4_STATE_STANDBY ) {
1.13 TMU_run_slice( sh4r.slice_cycle );
1.14 SCIF_run_slice( sh4r.slice_cycle );
1.15 + PMM_run_slice( sh4r.slice_cycle );
1.16 dreamcast_stop();
1.17 return sh4r.slice_cycle;
1.18 }
1.19 @@ -193,6 +195,7 @@
1.20 if( sh4r.sh4_state != SH4_STATE_STANDBY ) {
1.21 TMU_run_slice( nanosecs );
1.22 SCIF_run_slice( nanosecs );
1.23 + PMM_run_slice( sh4r.slice_cycle );
1.24 }
1.25 return nanosecs;
1.26 }
1.27 @@ -233,6 +236,7 @@
1.28
1.29 fwrite( &sh4r, sizeof(sh4r), 1, f );
1.30 MMU_save_state( f );
1.31 + PMM_save_state( f );
1.32 INTC_save_state( f );
1.33 TMU_save_state( f );
1.34 SCIF_save_state( f );
1.35 @@ -245,6 +249,7 @@
1.36 }
1.37 fread( &sh4r, sizeof(sh4r), 1, f );
1.38 MMU_load_state( f );
1.39 + PMM_load_state( f );
1.40 INTC_load_state( f );
1.41 TMU_load_state( f );
1.42 return SCIF_load_state( f );
1.43 @@ -458,6 +463,7 @@
1.44 /* Bring all running peripheral modules up to date, and then halt them. */
1.45 TMU_run_slice( sh4r.slice_cycle );
1.46 SCIF_run_slice( sh4r.slice_cycle );
1.47 + PMM_run_slice( sh4r.slice_cycle );
1.48 } else {
1.49 if( MMIO_READ( CPG, STBCR2 ) & 0x80 ) {
1.50 sh4r.sh4_state = SH4_STATE_DEEP_SLEEP;
.