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filename src/sh4/sh4core.in
changeset 1217:677b1d85f1b4
prev1193:dff55bdc4f46
next1231:d63c808ddcd3
author nkeynes
date Thu Feb 23 15:24:47 2012 +1000 (12 years ago)
permissions -rw-r--r--
last change Check for existence of glDrawBuffer (assuming that glReadBuffer will
follow). Note only need to guard the common code in gl_fbo.c
file annotate diff log raw 
     1.1 --- a/src/sh4/sh4core.in	Mon Dec 12 21:10:04 2011 +1000

     1.2 +++ b/src/sh4/sh4core.in	Thu Feb 23 15:24:47 2012 +1000

     1.3 @@ -162,28 +162,14 @@

     1.4  #define ADDRSPACE (IS_SH4_PRIVMODE() ? sh4_address_space : sh4_user_address_space)

     1.5  #define SQADDRSPACE (IS_SH4_PRIVMODE() ? storequeue_address_space : storequeue_user_address_space)

     1.6  

     1.7 -#ifdef HAVE_FRAME_ADDRESS

     1.8 -static FASTCALL __attribute__((noinline)) void *__first_arg(void *a, void *b) { return a; }

     1.9 -#define INIT_EXCEPTIONS(label) goto *__first_arg(&&fnstart,&&label); fnstart:

    1.10 -#define MEM_READ_BYTE( addr, val ) val = ((mem_read_exc_fn_t)ADDRSPACE[(addr)>>12]->read_byte)((addr), &&except)

    1.11 -#define MEM_READ_BYTE_FOR_WRITE( addr, val ) val = ((mem_read_exc_fn_t)ADDRSPACE[(addr)>>12]->read_byte_for_write)((addr), &&except)

    1.12 -#define MEM_READ_WORD( addr, val ) val = ((mem_read_exc_fn_t)ADDRSPACE[(addr)>>12]->read_word)((addr), &&except)

    1.13 -#define MEM_READ_LONG( addr, val ) val = ((mem_read_exc_fn_t)ADDRSPACE[(addr)>>12]->read_long)((addr), &&except)

    1.14 -#define MEM_WRITE_BYTE( addr, val ) ((mem_write_exc_fn_t)ADDRSPACE[(addr)>>12]->write_byte)((addr), (val), &&except)

    1.15 -#define MEM_WRITE_WORD( addr, val ) ((mem_write_exc_fn_t)ADDRSPACE[(addr)>>12]->write_word)((addr), (val), &&except)

    1.16 -#define MEM_WRITE_LONG( addr, val ) ((mem_write_exc_fn_t)ADDRSPACE[(addr)>>12]->write_long)((addr), (val), &&except)

    1.17 -#define MEM_PREFETCH( addr ) ((mem_prefetch_exc_fn_t)ADDRSPACE[(addr)>>12]->prefetch)((addr), &&except)

    1.18 -#else

    1.19 -#define INIT_EXCEPTIONS(label)

    1.20 -#define MEM_READ_BYTE( addr, val ) val = ADDRSPACE[(addr)>>12]->read_byte(addr)

    1.21 -#define MEM_READ_BYTE_FOR_WRITE( addr, val ) val = ADDRSPACE[(addr)>>12]->read_byte_for_write(addr)

    1.22 -#define MEM_READ_WORD( addr, val ) val = ADDRSPACE[(addr)>>12]->read_word(addr)

    1.23 -#define MEM_READ_LONG( addr, val ) val = ADDRSPACE[(addr)>>12]->read_long(addr)

    1.24 -#define MEM_WRITE_BYTE( addr, val ) ADDRSPACE[(addr)>>12]->write_byte(addr, val)

    1.25 -#define MEM_WRITE_WORD( addr, val ) ADDRSPACE[(addr)>>12]->write_word(addr, val)

    1.26 -#define MEM_WRITE_LONG( addr, val ) ADDRSPACE[(addr)>>12]->write_long(addr, val)

    1.27 -#define MEM_PREFETCH( addr ) ADDRSPACE[(addr)>>12]->prefetch(addr)

    1.28 -#endif

    1.29 +#define MEM_READ_BYTE( addr, val ) addrtmp = addr; if( (fntmp = mmu_get_region_for_vma_read(&addrtmp)) == NULL ) { sh4r.in_delay_slot = 0; return TRUE; } else { val = fntmp->read_byte(addrtmp); }

    1.30 +#define MEM_READ_BYTE_FOR_WRITE( addr, val ) addrtmp = addr; if( (fntmp = mmu_get_region_for_vma_write(&addrtmp)) == NULL ) { sh4r.in_delay_slot = 0; return TRUE; } else { val = fntmp->read_byte_for_write(addrtmp); }

    1.31 +#define MEM_READ_WORD( addr, val ) addrtmp = addr; if( (fntmp = mmu_get_region_for_vma_read(&addrtmp)) == NULL ) { sh4r.in_delay_slot = 0; return TRUE; } else { val = fntmp->read_word(addrtmp); }

    1.32 +#define MEM_READ_LONG( addr, val ) addrtmp = addr; if( (fntmp = mmu_get_region_for_vma_read(&addrtmp)) == NULL ) { sh4r.in_delay_slot = 0; return TRUE; } else { val = fntmp->read_long(addrtmp); }

    1.33 +#define MEM_WRITE_BYTE( addr, val ) addrtmp = addr; if( (fntmp = mmu_get_region_for_vma_write(&addrtmp)) == NULL ) { sh4r.in_delay_slot = 0; return TRUE; } else { fntmp->write_byte(addrtmp,val); }

    1.34 +#define MEM_WRITE_WORD( addr, val ) addrtmp = addr; if( (fntmp = mmu_get_region_for_vma_write(&addrtmp)) == NULL ) { sh4r.in_delay_slot = 0; return TRUE; } else { fntmp->write_word(addrtmp,val); }

    1.35 +#define MEM_WRITE_LONG( addr, val ) addrtmp = addr; if( (fntmp = mmu_get_region_for_vma_write(&addrtmp)) == NULL ) { sh4r.in_delay_slot = 0; return TRUE; } else { fntmp->write_long(addrtmp,val); }

    1.36 +#define MEM_PREFETCH( addr )  addrtmp = addr; if( (fntmp = mmu_get_region_for_vma_prefetch(&addrtmp)) == NULL ) { sh4r.in_delay_slot = 0; return TRUE; } else { fntmp->prefetch(addrtmp); }

    1.37  

    1.38  #define FP_WIDTH (IS_FPU_DOUBLESIZE() ? 8 : 4)

    1.39  

    1.40 @@ -346,10 +332,10 @@

    1.41      uint32_t tmp;

    1.42      float ftmp;

    1.43      double dtmp;

    1.44 -    int64_t memtmp; // temporary holder for memory reads

    1.45 +    sh4addr_t addrtmp; // temporary holder for memory addresses

    1.46 +    mem_region_fn_t fntmp;

    1.47 +    

    1.48  

    1.49 -    INIT_EXCEPTIONS(except)

    1.50 -    

    1.51  #define R0 sh4r.r[0]

    1.52      pc = sh4r.pc;

    1.53      if( pc > 0xFFFFFF00 ) {

    1.54 @@ -1306,7 +1292,6 @@

    1.55      sh4r.pc = sh4r.new_pc;

    1.56      sh4r.new_pc += 2;

    1.57  

    1.58 -except:

    1.59      sh4r.in_delay_slot = 0;

    1.60      return TRUE;

    1.61  }
.