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filename src/sh4/sh4mmio.h
changeset 929:fd8cb0c82f5f
prev859:b941c703ccd6
next939:6f2302afeb89
author nkeynes
date Sat Dec 27 03:14:59 2008 +0000 (15 years ago)
branchlxdream-mem
permissions -rw-r--r--
last change Update sh4x86 to take advantage of SR assumptions. nice 2% there :)
file annotate diff log raw 
     1.1 --- a/src/sh4/sh4mmio.h	Fri Sep 26 10:29:10 2008 +0000

     1.2 +++ b/src/sh4/sh4mmio.h	Sat Dec 27 03:14:59 2008 +0000

     1.3 @@ -243,22 +243,22 @@

     1.4  void mmu_set_cache_mode( int );

     1.5  void mmu_ldtlb(void);

     1.6  

     1.7 -int32_t mmu_icache_addr_read( sh4addr_t addr );

     1.8 -int32_t mmu_icache_data_read( sh4addr_t addr );

     1.9 -int32_t mmu_itlb_addr_read( sh4addr_t addr );

    1.10 -int32_t mmu_itlb_data_read( sh4addr_t addr );

    1.11 -int32_t mmu_ocache_addr_read( sh4addr_t addr );

    1.12 -int32_t mmu_ocache_data_read( sh4addr_t addr );

    1.13 -int32_t mmu_utlb_addr_read( sh4addr_t addr );

    1.14 -int32_t mmu_utlb_data_read( sh4addr_t addr );

    1.15 -void mmu_icache_addr_write( sh4addr_t addr, uint32_t val );

    1.16 -void mmu_icache_data_write( sh4addr_t addr, uint32_t val );

    1.17 -void mmu_itlb_addr_write( sh4addr_t addr, uint32_t val );

    1.18 -void mmu_itlb_data_write( sh4addr_t addr, uint32_t val );

    1.19 -void mmu_ocache_addr_write( sh4addr_t addr, uint32_t val );

    1.20 -void mmu_ocache_data_write( sh4addr_t addr, uint32_t val );

    1.21 -void mmu_utlb_addr_write( sh4addr_t addr, uint32_t val );

    1.22 -void mmu_utlb_data_write( sh4addr_t addr, uint32_t val );

    1.23 +int32_t FASTCALL mmu_icache_addr_read( sh4addr_t addr );

    1.24 +int32_t FASTCALL mmu_icache_data_read( sh4addr_t addr );

    1.25 +int32_t FASTCALL mmu_itlb_addr_read( sh4addr_t addr );

    1.26 +int32_t FASTCALL mmu_itlb_data_read( sh4addr_t addr );

    1.27 +int32_t FASTCALL mmu_ocache_addr_read( sh4addr_t addr );

    1.28 +int32_t FASTCALL mmu_ocache_data_read( sh4addr_t addr );

    1.29 +int32_t FASTCALL mmu_utlb_addr_read( sh4addr_t addr );

    1.30 +int32_t FASTCALL mmu_utlb_data_read( sh4addr_t addr );

    1.31 +void FASTCALL mmu_icache_addr_write( sh4addr_t addr, uint32_t val );

    1.32 +void FASTCALL mmu_icache_data_write( sh4addr_t addr, uint32_t val );

    1.33 +void FASTCALL mmu_itlb_addr_write( sh4addr_t addr, uint32_t val );

    1.34 +void FASTCALL mmu_itlb_data_write( sh4addr_t addr, uint32_t val );

    1.35 +void FASTCALL mmu_ocache_addr_write( sh4addr_t addr, uint32_t val );

    1.36 +void FASTCALL mmu_ocache_data_write( sh4addr_t addr, uint32_t val );

    1.37 +void FASTCALL mmu_utlb_addr_write( sh4addr_t addr, uint32_t val );

    1.38 +void FASTCALL mmu_utlb_data_write( sh4addr_t addr, uint32_t val );

    1.39  

    1.40  

    1.41  #ifdef __cplusplus
.