1.1 --- a/src/asic.c	Wed Mar 22 14:29:02 2006 +0000
     1.2 +++ b/src/asic.c	Sat May 20 02:40:16 2006 +0000
     1.3 @@ -1,5 +1,5 @@
     1.4  /**
     1.5 - * $Id: asic.c,v 1.13 2006-03-22 14:29:00 nkeynes Exp $
     1.6 + * $Id: asic.c,v 1.14 2006-04-30 01:50:13 nkeynes Exp $
     1.7   *
     1.8   * Support for the miscellaneous ASIC functions (Primarily event multiplexing,
     1.9   * and DMA). 
    1.10 @@ -20,6 +20,7 @@
    1.11  #define MODULE asic_module
    1.12  
    1.13  #include <assert.h>
    1.14 +#include <stdlib.h>
    1.15  #include "dream.h"
    1.16  #include "mem.h"
    1.17  #include "sh4/intc.h"
    1.18 @@ -43,6 +44,51 @@
    1.19  struct dreamcast_module asic_module = { "ASIC", asic_init, NULL, NULL, NULL,
    1.20  					NULL, NULL, NULL };
    1.21  
    1.22 +#define G2_BIT5_TICKS 8
    1.23 +#define G2_BIT4_TICKS 16
    1.24 +#define G2_BIT0_ON_TICKS 24
    1.25 +#define G2_BIT0_OFF_TICKS 24
    1.26 +
    1.27 +struct asic_g2_state {
    1.28 +    unsigned int bit5_off_timer;
    1.29 +    unsigned int bit4_on_timer;
    1.30 +    unsigned int bit4_off_timer;
    1.31 +    unsigned int bit0_on_timer;
    1.32 +    unsigned int bit0_off_timer;
    1.33 +} g2_state;
    1.34 +
    1.35 +/* FIXME: Handle rollover */
    1.36 +void asic_g2_write_word()
    1.37 +{
    1.38 +    g2_state.bit5_off_timer = sh4r.icount + G2_BIT5_TICKS;
    1.39 +    if( g2_state.bit4_off_timer < sh4r.icount )
    1.40 +	g2_state.bit4_on_timer = sh4r.icount + G2_BIT5_TICKS;
    1.41 +    g2_state.bit4_off_timer = max(sh4r.icount,g2_state.bit4_off_timer) + G2_BIT4_TICKS;
    1.42 +    if( g2_state.bit0_off_timer < sh4r.icount ) {
    1.43 +	g2_state.bit0_on_timer = sh4r.icount + G2_BIT0_ON_TICKS;
    1.44 +	g2_state.bit0_off_timer = g2_state.bit0_on_timer + G2_BIT0_OFF_TICKS;
    1.45 +    } else {
    1.46 +	g2_state.bit0_off_timer += G2_BIT0_OFF_TICKS;
    1.47 +    }
    1.48 +    MMIO_WRITE( ASIC, G2STATUS, MMIO_READ(ASIC, G2STATUS) | 0x20 );
    1.49 +}
    1.50 +
    1.51 +static uint32_t g2_read_status()
    1.52 +{
    1.53 +    uint32_t val = MMIO_READ( ASIC, G2STATUS );
    1.54 +    if( g2_state.bit5_off_timer <= sh4r.icount )
    1.55 +	val = val & (~0x20);
    1.56 +    if( g2_state.bit4_off_timer <= sh4r.icount )
    1.57 +	val = val & (~0x10);
    1.58 +    else if( g2_state.bit4_on_timer <= sh4r.icount )
    1.59 +	val = val | 0x10;
    1.60 +    if( g2_state.bit0_off_timer <= sh4r.icount )
    1.61 +	val = val & (~0x01);
    1.62 +    else if( g2_state.bit0_on_timer <= sh4r.icount )
    1.63 +	val = val | 0x01;
    1.64 +    return val | 0x0E;
    1.65 +}   
    1.66 +
    1.67  void asic_check_cleared_events( void );
    1.68  
    1.69  void asic_init( void )
    1.70 @@ -121,7 +167,7 @@
    1.71  	//                  reg, val, MMIO_REGID(ASIC,reg), MMIO_REGDESC(ASIC,reg) );
    1.72  	return val;            
    1.73      case G2STATUS:
    1.74 -	return 0; /* find out later if there's any cases we actually need to care about */
    1.75 +	return g2_read_status();
    1.76      default:
    1.77  	val = MMIO_READ(ASIC, reg);
    1.78  	WARN( "Read from ASIC (%03X => %08X) [%s: %s]",