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lxdream 0.9.1
released Jun 29
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filename src/asic.h
changeset 147:82478590bfa7
prev137:41907543d890
next155:be61d1a20937
author nkeynes
date Sat May 20 02:40:16 2006 +0000 (14 years ago)
permissions -rw-r--r--
last change Add a few more unknown registers that have been observed
file annotate diff log raw
1.1 --- a/src/asic.h Sun Apr 30 01:50:15 2006 +0000
1.2 +++ b/src/asic.h Sat May 20 02:40:16 2006 +0000
1.3 @@ -1,5 +1,5 @@
1.4 /**
1.5 - * $Id: asic.h,v 1.7 2006-04-30 01:50:13 nkeynes Exp $
1.6 + * $Id: asic.h,v 1.8 2006-05-20 02:40:16 nkeynes Exp $
1.7 *
1.8 * Support for the miscellaneous ASIC functions (Primarily event multiplexing,
1.9 * and DMA). Includes MMIO definitions for the 5f6000 and 5f7000 regions,
1.10 @@ -29,17 +29,22 @@
1.11 LONG_PORT( 0x800, PVRDMADEST, PORT_MRW, 0, "PVR DMA Dest Address" )
1.12 LONG_PORT( 0x804, PVRDMACNT, PORT_MRW, 0, "PVR DMA Byte Count" )
1.13 LONG_PORT( 0x808, PVRDMACTL, PORT_MRW, 0, "PVR DMA Control" )
1.14 - LONG_PORT( 0x810, ASICUNK1, PORT_MRW, 0, "ASIC <unknown1>" )
1.15 - LONG_PORT( 0x814, ASICUNK2, PORT_MRW, 0, "ASIC <unknown2>" )
1.16 + LONG_PORT( 0x810, ASICUNK1, PORT_MRW, 0, "ASIC <unknown1 - host address?>" )
1.17 + LONG_PORT( 0x814, ASICUNK2, PORT_MRW, 0, "ASIC <unknown2 - host address?>" )
1.18 LONG_PORT( 0x818, ASICUNK3, PORT_MRW, 0, "ASIC <unknown3>" )
1.19 LONG_PORT( 0x81C, ASICUNK4, PORT_MRW, 0, "ASIC <unknown4>" )
1.20 - LONG_PORT( 0x884, ASICUNK5, PORT_MRW, 0, "ASIC <unknown5>" )
1.21 - LONG_PORT( 0x888, ASICUNK6, PORT_MRW, 0, "ASIC <unknown6>" )
1.22 + LONG_PORT( 0x820, ASICUNKF, PORT_MRW, 0, "ASIC <unknownF>" )
1.23 + LONG_PORT( 0x840, ASICUNK5, PORT_MRW, 0, "ASIC <unknown5>" )
1.24 + LONG_PORT( 0x844, ASICUNK6, PORT_MRW, 0, "ASIC <unknown6>" )
1.25 + LONG_PORT( 0x848, ASICUNK7, PORT_MRW, 0, "ASIC <unknown7>" )
1.26 + LONG_PORT( 0x84C, ASICUNK8, PORT_MRW, 0, "ASIC <unknown8>" )
1.27 + LONG_PORT( 0x884, ASICUNK9, PORT_MRW, 0, "ASIC <unknown9>" )
1.28 + LONG_PORT( 0x888, ASICUNKA, PORT_MRW, 0, "ASIC <unknownA>" )
1.29 LONG_PORT( 0x88C, G2STATUS, PORT_MR, 0, "G2 Bus status" )
1.30 - LONG_PORT( 0x89C, ASICUNK7, PORT_MRW, 0xB, "Unknown, always 0xB?" )
1.31 - LONG_PORT( 0x8A0, ASICUNK8, PORT_MRW, 0, "ASIC <unknown8>" )
1.32 - LONG_PORT( 0x8A4, ASICUNK9, PORT_MRW, 0, "ASIC <unknown9>" )
1.33 - LONG_PORT( 0x8AC, ASICUNKA, PORT_MRW, 0, "ASIC <unknownA>" )
1.34 + LONG_PORT( 0x89C, ASICUNKB, PORT_MRW, 0xB, "Unknown, always 0xB?" )
1.35 + LONG_PORT( 0x8A0, ASICUNKC, PORT_MRW, 0, "ASIC <unknownC>" )
1.36 + LONG_PORT( 0x8A4, ASICUNKD, PORT_MRW, 0, "ASIC <unknownD>" )
1.37 + LONG_PORT( 0x8AC, ASICUNKE, PORT_MRW, 0, "ASIC <unknownE>" )
1.38 LONG_PORT( 0x900, PIRQ0, PORT_MRW, 0, "Pending interrupts 0" )
1.39 LONG_PORT( 0x904, PIRQ1, PORT_MRW, 0, "Pending interrupts 1" )
1.40 LONG_PORT( 0x908, PIRQ2, PORT_MRW, 0, "Pending interrupts 2" )
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