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lxdream.org :: lxdream/src/sh4/sh4core.c :: diff
lxdream 0.9.1
released Jun 29
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filename src/sh4/sh4core.c
changeset 164:84f6b203cfe1
prev157:fbe03268ad8a
next181:bc28fd93e233
author nkeynes
date Sun Jun 18 12:00:27 2006 +0000 (14 years ago)
permissions -rw-r--r--
last change Implement MOVCA
file annotate diff log raw
1.1 --- a/src/sh4/sh4core.c Thu Jun 15 10:27:10 2006 +0000
1.2 +++ b/src/sh4/sh4core.c Sun Jun 18 12:00:27 2006 +0000
1.3 @@ -1,5 +1,5 @@
1.4 /**
1.5 - * $Id: sh4core.c,v 1.27 2006-06-15 10:27:10 nkeynes Exp $
1.6 + * $Id: sh4core.c,v 1.28 2006-06-18 12:00:27 nkeynes Exp $
1.7 *
1.8 * SH4 emulation core, and parent module for all the SH4 peripheral
1.9 * modules.
1.10 @@ -477,9 +477,6 @@
1.11 uint32_t hi = (MMIO_READ( MMU, (queue == 0 ? QACR0 : QACR1) ) & 0x1C) << 24;
1.12 uint32_t target = tmp&0x03FFFFE0 | hi;
1.13 mem_copy_to_sh4( target, src, 32 );
1.14 - //if( (target &0xFF000000) != 0x04000000 )
1.15 - // WARN( "Executed SQ%c => %08X",
1.16 - // (queue == 0 ? '0' : '1'), target );
1.17 }
1.18 break;
1.19 case 9: /* OCBI [Rn] */
1.20 @@ -488,7 +485,9 @@
1.21 /* anything? */
1.22 break;
1.23 case 12:/* MOVCA.L R0, [Rn] */
1.24 - UNIMP(ir);
1.25 + tmp = RN(ir);
1.26 + MEM_WRITE_LONG( tmp, R0 );
1.27 + break;
1.28 default: UNDEF(ir);
1.29 }
1.30 break;
.