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lxdream 0.9.1
released Jun 29
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filename src/aica/armcore.c
changeset 30:89b30313d757
prev11:0a82ef380c45
next35:21a4be098304
author nkeynes
date Sun Dec 25 05:57:00 2005 +0000 (15 years ago)
permissions -rw-r--r--
last change Change timeslice to nanoseconds (was microseconds)
Generize single step (now steps through active CPU)
Add lots of header blocks
file annotate diff log raw
1.1 --- a/src/aica/armcore.c Sun Dec 11 12:00:09 2005 +0000
1.2 +++ b/src/aica/armcore.c Sun Dec 25 05:57:00 2005 +0000
1.3 @@ -1,3 +1,20 @@
1.4 +/**
1.5 + * $Id: armcore.c,v 1.5 2005-12-25 05:57:00 nkeynes Exp $
1.6 + *
1.7 + * ARM7TDMI CPU emulation core.
1.8 + *
1.9 + * Copyright (c) 2005 Nathan Keynes.
1.10 + *
1.11 + * This program is free software; you can redistribute it and/or modify
1.12 + * it under the terms of the GNU General Public License as published by
1.13 + * the Free Software Foundation; either version 2 of the License, or
1.14 + * (at your option) any later version.
1.15 + *
1.16 + * This program is distributed in the hope that it will be useful,
1.17 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1.18 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1.19 + * GNU General Public License for more details.
1.20 + */
1.21
1.22 #include "aica/armcore.h"
1.23
1.24 @@ -48,8 +65,8 @@
1.25 #define IMMROT(ir) ((ir>>7)&0x1E)
1.26 #define SHIFT(ir) ((ir>>4)&0x07)
1.27 #define DISP24(ir) ((ir&0x00FFFFFF))
1.28 -#define UNDEF(ir) do{ ERROR( "Raising exception on undefined instruction at %08x, opcode = %04x", PC, ir ); return; } while(0)
1.29 -#define UNIMP(ir) do{ ERROR( "Halted on unimplemented instruction at %08x, opcode = %04x", PC, ir ); return; }while(0)
1.30 +#define UNDEF(ir) do{ ERROR( "Raising exception on undefined instruction at %08x, opcode = %04x", PC, ir ); return TRUE; } while(0)
1.31 +#define UNIMP(ir) do{ ERROR( "Halted on unimplemented instruction at %08x, opcode = %04x", PC, ir ); return FALSE; }while(0)
1.32
1.33 void arm_restore_cpsr()
1.34 {
1.35 @@ -322,7 +339,7 @@
1.36 return addr;
1.37 }
1.38
1.39 -void arm_execute_instruction( void )
1.40 +gboolean arm_execute_instruction( void )
1.41 {
1.42 uint32_t pc = PC;
1.43 uint32_t ir = MEM_READ_LONG(pc);
1.44 @@ -652,4 +669,5 @@
1.45 case 3: /* Copro */
1.46 break;
1.47 }
1.48 + return TRUE;
1.49 }
.