lxdream.org :: lxdream/src/sh4/timer.c r30:89b30313d757

tree revision 30:89b30313d757

filename	src/sh4/timer.c
changeset	30:89b30313d757
prev	23:1ec3acd0594d
next	53:f2981805b929
author	nkeynes
date	Sun Dec 25 05:57:00 2005 +0000 (18 years ago)
permissions	-rw-r--r--
last change	Change timeslice to nanoseconds (was microseconds) Generize single step (now steps through active CPU) Add lots of header blocks

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     1.1 --- a/src/sh4/timer.c	Fri Dec 23 11:44:55 2005 +0000
     1.2 +++ b/src/sh4/timer.c	Sun Dec 25 05:57:00 2005 +0000
     1.3 @@ -1,5 +1,5 @@
     1.4  /**
     1.5 - * $Id: timer.c,v 1.1 2005-12-23 11:44:55 nkeynes Exp $
     1.6 + * $Id: timer.c,v 1.2 2005-12-25 05:57:00 nkeynes Exp $
     1.7   * 
     1.8   * SH4 Timer/Clock peripheral modules (CPG, TMU, RTC), combined together to
     1.9   * keep things simple (they intertwine a bit).
    1.10 @@ -85,10 +85,10 @@
    1.11      MMIO_WRITE( TMU, reg, val );
    1.12  }
    1.13  
    1.14 -void TMU_run_slice( int microsecs )
    1.15 +void TMU_run_slice( uint32_t nanosecs )
    1.16  {
    1.17      int tcr = MMIO_READ( TMU, TSTR );
    1.18 -    int cycles = microsecs * 16 * 200;
    1.19 +    int cycles = nanosecs / sh4_peripheral_period;
    1.20      if( tcr & 0x01 ) {
    1.21          int count = cycles / timer_divider[0];
    1.22          int *val = MMIO_REG( TMU, TCNT0 );