1.1 --- a/test/dmac.c	Sun Jul 20 11:36:48 2008 +0000
     1.2 +++ b/test/dmac.c	Wed Aug 13 10:32:00 2008 +0000
     1.3 @@ -40,6 +40,20 @@
     1.4  #define SORT_DMA_CTL   (ASIC_BASE+0x820)
     1.5  #define SORT_DMA_COUNT (ASIC_BASE+0x860)
     1.6  
     1.7 +#define G2BASERAM 0x00800000
     1.8 +
     1.9 +#define G2DMABASE 0xA05F7800
    1.10 +#define G2DMATIMEOUT (G2DMABASE+0x90)
    1.11 +#define G2DMAMAGIC (G2DMABASE+0xBC)
    1.12 +#define G2DMAEXT(x) (G2DMABASE+(0x20*(x)))
    1.13 +#define G2DMAHOST(x) (G2DMABASE+(0x20*(x))+0x04)
    1.14 +#define G2DMASIZE(x) (G2DMABASE+(0x20*(x))+0x08)
    1.15 +#define G2DMADIR(x) (G2DMABASE+(0x20*(x))+0x0C)
    1.16 +#define G2DMAMODE(x) (G2DMABASE+(0x20*(x))+0x10)
    1.17 +#define G2DMACTL1(x) (G2DMABASE+(0x20*(x))+0x14)
    1.18 +#define G2DMACTL2(x) (G2DMABASE+(0x20*(x))+0x18)
    1.19 +#define G2DMASTOP(x) (G2DMABASE+(0x20*(x))+0x1C)
    1.20 +
    1.21  void dmac_dump_channel( FILE *f, unsigned int channel )
    1.22  {
    1.23      fprintf( f, "DMAC SAR: %08X  Count: %08X  Ctl: %08X  OR: %08X\n",
    1.24 @@ -157,3 +171,35 @@
    1.25      CHECK_IEQUALS( 0, long_read(SORT_DMA_CTL) );
    1.26      return result;
    1.27  }
    1.28 +
    1.29 +int aica_dma_transfer( uint32_t aica_addr, char *data, uint32_t size, int writeFlag )
    1.30 +{
    1.31 +    long_write( G2DMATIMEOUT, 0 );
    1.32 +    long_write( G2DMAMAGIC, 0x4659404f );
    1.33 +    long_write( G2DMACTL1(0), 0 );
    1.34 +    long_write( G2DMAEXT(0), aica_addr );
    1.35 +    long_write( G2DMAHOST(0), ((uint32_t)data) );
    1.36 +    long_write( G2DMASIZE(0), ((size+31)&0x7FFFFFE0) | 0x80000000 );
    1.37 +    long_write( G2DMADIR(0), (writeFlag ? 0 : 1) );
    1.38 +    long_write( G2DMAMODE(0), 0 );
    1.39 +    
    1.40 +    long_write( G2DMACTL1(0), 1 );
    1.41 +    long_write( G2DMACTL2(0), 1 );
    1.42 +    if( asic_wait( EVENT_G2_DMA0 ) != 0 ) {
    1.43 +        fprintf( stderr, "Timeout waiting for G2 DMA event\n" );
    1.44 +        return -1;
    1.45 +    }
    1.46 +    // CHECK_IEQUALS( 0, long_read( G2DMACTL1(0) ) );
    1.47 +    CHECK_IEQUALS( 0, long_read( G2DMACTL2(0) ) );
    1.48 +    return 0;
    1.49 +}
    1.50 +
    1.51 +int aica_dma_write( uint32_t aica_addr, char *data, uint32_t size )
    1.52 +{
    1.53 +    return aica_dma_transfer( aica_addr, data, size, 1 );
    1.54 +}
    1.55 +
    1.56 +int aica_dma_read( char *data, uint32_t aica_addr, uint32_t size )
    1.57 +{
    1.58 +    return aica_dma_transfer( aica_addr, data, size, 0 );
    1.59 +}