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lxdream.org :: lxdream/src/sh4/x86op.h :: diff
lxdream 0.9.1
released Jun 29
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filename src/sh4/x86op.h
changeset 374:8f80a795513e
prev368:36fac4c42322
next375:4627600f7f8e
author nkeynes
date Tue Sep 11 02:14:46 2007 +0000 (13 years ago)
permissions -rw-r--r--
last change Cache the pointer to the last FR bank (speeds fp ops up by about 10%)
Implement experimental fix for FLOAT/FTRC
Make read/write sr functions non-static (share with translator)
Much more translator WIP
file annotate diff log raw
1.1 --- a/src/sh4/x86op.h Tue Sep 04 08:40:23 2007 +0000
1.2 +++ b/src/sh4/x86op.h Tue Sep 11 02:14:46 2007 +0000
1.3 @@ -1,5 +1,5 @@
1.4 /**
1.5 - * $Id: x86op.h,v 1.3 2007-09-04 08:40:23 nkeynes Exp $
1.6 + * $Id: x86op.h,v 1.4 2007-09-11 02:14:46 nkeynes Exp $
1.7 *
1.8 * Definitions of x86 opcodes for use by the translator.
1.9 *
1.10 @@ -77,31 +77,34 @@
1.11 /* ebp+disp32 modrm form */
1.12 #define MODRM_r32_ebp32(r1,disp) OP(0x85 | (r1<<3)); OP32(disp)
1.13
1.14 -#define MODRM_r32_ebp(r1,disp) if(disp>127){ MODRM_r32_ebp32(r1,disp);}else{ MODRM_r32_ebp8(r1,(unsigned char)disp); }
1.15 +#define MODRM_r32_sh4r(r1,disp) if(disp>127){ MODRM_r32_ebp32(r1,disp);}else{ MODRM_r32_ebp8(r1,(unsigned char)disp); }
1.16
1.17 /* Major opcodes */
1.18 +#define ADD_sh4r_r32(disp,r1) OP(0x03); MODRM_r32_sh4r(r1,disp)
1.19 #define ADD_r32_r32(r1,r2) OP(0x03); MODRM_rm32_r32(r1,r2)
1.20 #define ADD_imm8s_r32(imm,r1) OP(0x83); MODRM_rm32_r32(r1, 0); OP(imm)
1.21 #define ADD_imm32_r32(imm32,r1) OP(0x81); MODRM_rm32_r32(r1,0); OP32(imm32)
1.22 #define ADC_r32_r32(r1,r2) OP(0x13); MODRM_rm32_r32(r1,r2)
1.23 #define AND_r32_r32(r1,r2) OP(0x23); MODRM_rm32_r32(r1,r2)
1.24 #define AND_imm8_r8(imm8, r1) OP(0x80); MODRM_rm32_r32(r1,4); OP(imm8)
1.25 +#define AND_imm8s_r32(imm8,r1) OP(0x83); MODRM_rm32_r32(r1,4); OP(imm8)
1.26 #define AND_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,4); OP32(imm)
1.27 #define CALL_r32(r1) OP(0xFF); MODRM_rm32_r32(r1,2)
1.28 +#define CLC() OP(0xF8)
1.29 #define CMC() OP(0xF5)
1.30 +#define CMP_sh4r_r32(disp,r1) OP(0x3B); MODRM_r32_sh4r(r1,disp)
1.31 #define CMP_r32_r32(r1,r2) OP(0x3B); MODRM_rm32_r32(r1,r2)
1.32 #define CMP_imm32_r32(imm32, r1) OP(0x81); MODRM_rm32_r32(r1,7); OP32(imm32)
1.33 #define CMP_imm8s_r32(imm,r1) OP(0x83); MODRM_rm32_r32(r1,7); OP(imm)
1.34 -#define CMP_imm8s_ebp(imm,disp) OP(0x83); MODRM_r32_ebp(7,disp) OP(imm)
1.35 +#define CMP_imm8s_sh4r(imm,disp) OP(0x83); MODRM_r32_sh4r(7,disp) OP(imm)
1.36 #define DEC_r32(r1) OP(0x48+r1)
1.37 #define IMUL_r32(r1) OP(0xF7); MODRM_rm32_r32(r1,5)
1.38 #define INC_r32(r1) OP(0x40+r1)
1.39 #define JMP_rel8(rel) OP(0xEB); OP(rel)
1.40 #define MOV_r32_r32(r1,r2) OP(0x89); MODRM_r32_rm32(r1,r2)
1.41 -#define MOV_r32_ebp(r1,disp) OP(0x89); MODRM_r32_ebp(r1,disp)
1.42 -#define MOV_r32_ebp32(r1,disp) OP(0x89); MODRM_r32_ebp32(r1,disp)
1.43 +#define MOV_r32_sh4r(r1,disp) OP(0x89); MODRM_r32_sh4r(r1,disp)
1.44 #define MOV_moff32_EAX(off) OP(0xA1); OP32(off)
1.45 -#define MOV_ebp_r32(disp, r1) OP(0x8B); MODRM_r32_ebp(r1,disp)
1.46 +#define MOV_sh4r_r32(disp, r1) OP(0x8B); MODRM_r32_sh4r(r1,disp)
1.47 #define MOVSX_r8_r32(r1,r2) OP(0x0F); OP(0xBE); MODRM_rm32_r32(r1,r2)
1.48 #define MOVSX_r16_r32(r1,r2) OP(0x0F); OP(0xBF); MODRM_rm32_r32(r1,r2)
1.49 #define MOVZX_r8_r32(r1,r2) OP(0x0F); OP(0xB6); MODRM_rm32_r32(r1,r2)
1.50 @@ -112,7 +115,7 @@
1.51 #define OR_r32_r32(r1,r2) OP(0x0B); MODRM_rm32_r32(r1,r2)
1.52 #define OR_imm8_r8(imm,r1) OP(0x80); MODRM_rm32_r32(r1,1)
1.53 #define OR_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,1); OP32(imm)
1.54 -#define OR_ebp_r32(disp,r1) OP(0x0B); MODRM_r32_ebp(r1,disp)
1.55 +#define OR_sh4r_r32(disp,r1) OP(0x0B); MODRM_r32_sh4r(r1,disp)
1.56 #define POP_r32(r1) OP(0x58 + r1)
1.57 #define PUSH_r32(r1) OP(0x50 + r1)
1.58 #define PUSH_imm32(imm) OP(0x68); OP32(imm)
1.59 @@ -131,16 +134,28 @@
1.60 #define SHR1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,5)
1.61 #define SHR_r32_CL(r1) OP(0xD3); MODRM_rm32_r32(r1,5)
1.62 #define SHR_imm8_r32(imm,r1) OP(0xC1); MODRM_rm32_r32(r1,5); OP(imm)
1.63 +#define STC() OP(0xF9)
1.64 #define SUB_r32_r32(r1,r2) OP(0x2B); MODRM_rm32_r32(r1,r2)
1.65 +#define SUB_sh4r_r32(disp,r1) OP(0x2B); MODRM_r32_sh4r(r1, disp)
1.66 #define TEST_r8_r8(r1,r2) OP(0x84); MODRM_r32_rm32(r1,r2)
1.67 #define TEST_r32_r32(r1,r2) OP(0x85); MODRM_rm32_r32(r1,r2)
1.68 #define TEST_imm8_r8(imm8,r1) OP(0xF6); MODRM_rm32_r32(r1,0); OP(imm8)
1.69 #define TEST_imm32_r32(imm,r1) OP(0xF7); MODRM_rm32_r32(r1,0); OP32(imm)
1.70 #define XCHG_r8_r8(r1,r2) OP(0x86); MODRM_rm32_r32(r1,r2)
1.71 #define XOR_r32_r32(r1,r2) OP(0x33); MODRM_rm32_r32(r1,r2)
1.72 +#define XOR_sh4r_r32(disp,r1) OP(0x33); MODRM_r32_sh4r(r1,disp)
1.73 #define XOR_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,6); OP32(imm)
1.74
1.75
1.76 +/* Floating point ops */
1.77 +#define FABS_st0() OP(0xD9); OP(0xE1)
1.78 +#define FADDP_st(st) OP(0xDE); OP(0xC0+st)
1.79 +#define FCHS_st0() OP(0xD9); OP(0xE0)
1.80 +#define FDIVP_st(st) OP(0xDE); OP(0xF8+st)
1.81 +#define FMULP_st(st) OP(0xDE); OP(0xC8+st)
1.82 +#define FSUB_st(st) OP(0xDE); OP(0xE8+st)
1.83 +#define FSQRT_st0() OP(0xD9); OP(0xFA)
1.84 +
1.85 /* Conditional branches */
1.86 #define JE_rel8(rel) OP(0x74); OP(rel)
1.87 #define JA_rel8(rel) OP(0x77); OP(rel)
1.88 @@ -185,31 +200,33 @@
1.89
1.90
1.91 /* Conditional setcc - writeback to sh4r.t */
1.92 -#define SETE_ebp(disp) OP(0x0F); OP(0x94); MODRM_r32_ebp(0, disp);
1.93 -#define SETA_ebp(disp) OP(0x0F); OP(0x97); MODRM_r32_ebp(0, disp);
1.94 -#define SETAE_ebp(disp) OP(0x0F); OP(0x93); MODRM_r32_ebp(0, disp);
1.95 -#define SETG_ebp(disp) OP(0x0F); OP(0x9F); MODRM_r32_ebp(0, disp);
1.96 -#define SETGE_ebp(disp) OP(0x0F); OP(0x9D); MODRM_r32_ebp(0, disp);
1.97 -#define SETC_ebp(disp) OP(0x0F); OP(0x92); MODRM_r32_ebp(0, disp);
1.98 -#define SETO_ebp(disp) OP(0x0F); OP(0x90); MODRM_r32_ebp(0, disp);
1.99 +#define SETE_sh4r(disp) OP(0x0F); OP(0x94); MODRM_r32_sh4r(0, disp);
1.100 +#define SETA_sh4r(disp) OP(0x0F); OP(0x97); MODRM_r32_sh4r(0, disp);
1.101 +#define SETAE_sh4r(disp) OP(0x0F); OP(0x93); MODRM_r32_sh4r(0, disp);
1.102 +#define SETG_sh4r(disp) OP(0x0F); OP(0x9F); MODRM_r32_sh4r(0, disp);
1.103 +#define SETGE_sh4r(disp) OP(0x0F); OP(0x9D); MODRM_r32_sh4r(0, disp);
1.104 +#define SETC_sh4r(disp) OP(0x0F); OP(0x92); MODRM_r32_sh4r(0, disp);
1.105 +#define SETO_sh4r(disp) OP(0x0F); OP(0x90); MODRM_r32_sh4r(0, disp);
1.106
1.107 -#define SETNE_ebp(disp) OP(0x0F); OP(0x95); MODRM_r32_ebp(0, disp);
1.108 -#define SETNA_ebp(disp) OP(0x0F); OP(0x96); MODRM_r32_ebp(0, disp);
1.109 -#define SETNAE_ebp(disp) OP(0x0F); OP(0x92); MODRM_r32_ebp(0, disp);
1.110 -#define SETNG_ebp(disp) OP(0x0F); OP(0x9E); MODRM_r32_ebp(0, disp);
1.111 -#define SETNGE_ebp(disp) OP(0x0F); OP(0x9C); MODRM_r32_ebp(0, disp);
1.112 -#define SETNC_ebp(disp) OP(0x0F); OP(0x93); MODRM_r32_ebp(0, disp);
1.113 -#define SETNO_ebp(disp) OP(0x0F); OP(0x91); MODRM_r32_ebp(0, disp);
1.114 +#define SETNE_sh4r(disp) OP(0x0F); OP(0x95); MODRM_r32_sh4r(0, disp);
1.115 +#define SETNA_sh4r(disp) OP(0x0F); OP(0x96); MODRM_r32_sh4r(0, disp);
1.116 +#define SETNAE_sh4r(disp) OP(0x0F); OP(0x92); MODRM_r32_sh4r(0, disp);
1.117 +#define SETNG_sh4r(disp) OP(0x0F); OP(0x9E); MODRM_r32_sh4r(0, disp);
1.118 +#define SETNGE_sh4r(disp) OP(0x0F); OP(0x9C); MODRM_r32_sh4r(0, disp);
1.119 +#define SETNC_sh4r(disp) OP(0x0F); OP(0x93); MODRM_r32_sh4r(0, disp);
1.120 +#define SETNO_sh4r(disp) OP(0x0F); OP(0x91); MODRM_r32_sh4r(0, disp);
1.121
1.122 -#define SETE_t() SETE_ebp(R_T)
1.123 -#define SETA_t() SETA_ebp(R_T)
1.124 -#define SETAE_t() SETAE_ebp(R_T)
1.125 -#define SETG_t() SETG_ebp(R_T)
1.126 -#define SETGE_t() SETGE_ebp(R_T)
1.127 -#define SETC_t() SETC_ebp(R_T)
1.128 -#define SETO_t() SETO_ebp(R_T)
1.129 +#define SETE_t() SETE_sh4r(R_T)
1.130 +#define SETA_t() SETA_sh4r(R_T)
1.131 +#define SETAE_t() SETAE_sh4r(R_T)
1.132 +#define SETG_t() SETG_sh4r(R_T)
1.133 +#define SETGE_t() SETGE_sh4r(R_T)
1.134 +#define SETC_t() SETC_sh4r(R_T)
1.135 +#define SETO_t() SETO_sh4r(R_T)
1.136 +
1.137 +#define SETC_r32(r1) OP(0x0F); OP(0x92); MODRM_rm32_r32(r1, 0)
1.138
1.139 /* Pseudo-op Load carry from T: CMP [EBP+t], #01 ; CMC */
1.140 -#define LDC_t() OP(0x83); MODRM_r32_ebp(7,R_T); OP(0x01); CMC()
1.141 +#define LDC_t() OP(0x83); MODRM_r32_sh4r(7,R_T); OP(0x01); CMC()
1.142
1.143 #endif /* !__lxdream_x86op_H */
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