filename | src/sh4/sh4core.h |
changeset | 302:96b5cc24309c |
prev | 265:5daf59b7f31b |
next | 312:2c34bdc36cbd |
author | nkeynes |
date | Wed Jan 17 21:27:20 2007 +0000 (14 years ago) |
permissions | -rw-r--r-- |
last change | Rename SPUDMA to G2DMA (following KOS's lead) Remove sh4r.icount (obsolete) Rewrite G2 fifo status in terms of slice cycles |
file | annotate | diff | log | raw |
1.1 --- a/src/sh4/sh4core.h Sat Jan 06 04:06:36 2007 +00001.2 +++ b/src/sh4/sh4core.h Wed Jan 17 21:27:20 2007 +00001.3 @@ -1,5 +1,5 @@1.4 /**1.5 - * $Id: sh4core.h,v 1.16 2007-01-06 04:06:36 nkeynes Exp $1.6 + * $Id: sh4core.h,v 1.17 2007-01-17 21:27:20 nkeynes Exp $1.7 *1.8 * This file defines the internal functions exported/used by the SH4 core,1.9 * except for disassembly functions defined in sh4dasm.h1.10 @@ -69,13 +69,12 @@1.11 int32_t store_queue[16]; /* technically 2 banks of 32 bytes */1.13 uint32_t new_pc; /* Not a real register, but used to handle delay slots */1.14 - uint32_t icount; /* Also not a real register, instruction counter */1.15 uint32_t event_pending; /* slice cycle time of the next pending event, or FFFFFFFF1.16 when no events are pending */1.17 uint32_t event_types; /* bit 0 = IRQ pending, bit 1 = general event pending */1.18 int in_delay_slot; /* flag to indicate the current instruction is in1.19 * a delay slot (certain rules apply) */1.20 - uint32_t slice_cycle; /* Current cycle within the timeslice */1.21 + uint32_t slice_cycle; /* Current nanosecond within the timeslice */1.22 int sh4_state; /* Current power-on state (one of the SH4_STATE_* values ) */1.23 };
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