1.1 --- a/src/asic.h	Wed May 24 11:50:19 2006 +0000
     1.2 +++ b/src/asic.h	Tue Jun 27 09:33:12 2006 +0000
     1.3 @@ -1,5 +1,5 @@
     1.4  /**
     1.5 - * $Id: asic.h,v 1.9 2006-05-24 11:50:19 nkeynes Exp $
     1.6 + * $Id: asic.h,v 1.10 2006-06-15 10:32:38 nkeynes Exp $
     1.7   *
     1.8   * Support for the miscellaneous ASIC functions (Primarily event multiplexing,
     1.9   * and DMA). Includes MMIO definitions for the 5f6000 and 5f7000 regions, 
    1.10 @@ -113,8 +113,9 @@
    1.11      LONG_PORT( 0x4A0, EXTDMAUNK6, PORT_MRW, 0, "Ext DMA <unknown6>" )
    1.12      LONG_PORT( 0x4A4, EXTDMAUNK7, PORT_MRW, 0, "Ext DMA <unknown7>" )
    1.13      LONG_PORT( 0x4B4, EXTDMAUNK8, PORT_MRW, 0, "Ext DMA <unknown8>" )
    1.14 -    LONG_PORT( 0x4B8, EXTDMAUNK9, PORT_MRW, 0, "Ext DMA <unknown9>" )
    1.15 +    LONG_PORT( 0x4B8, IDEDMACFG, PORT_MRW, 0, "IDE DMA Config" )
    1.16      LONG_PORT( 0x4E4, IDEACTIVATE, PORT_MRW, 0, "IDE activate" )
    1.17 +    LONG_PORT( 0x4F8, IDEDMATXSIZ, PORT_MRW, 0, "IDE DMA transfered size" )
    1.18      LONG_PORT( 0x800, SPUDMA0EXT, PORT_MRW, 0, "SPU DMA0 External address" )
    1.19      LONG_PORT( 0x804, SPUDMA0SH4, PORT_MRW, 0, "SPU DMA0 SH4-based address" )
    1.20      LONG_PORT( 0x808, SPUDMA0SIZ, PORT_MRW, 0, "SPU DMA0 Size" )
    1.21 @@ -166,7 +167,7 @@
    1.22      LONG_PORT( 0xC10, PVRDMA2MOD, PORT_MRW, 0, "PVR DMA Mode" )
    1.23      LONG_PORT( 0xC14, PVRDMA2CTL1, PORT_MRW, 0, "PVR DMA Control 1" )
    1.24      LONG_PORT( 0xC18, PVRDMA2CTL2, PORT_MRW, 0, "PVR DMA Control 2" )
    1.25 -    LONG_PORT( 0xC80, PVRDMA2UN1, PORT_MRW, 0, "PVR DMA <unknown1>" )
    1.26 +    LONG_PORT( 0xC80, PVRDMA2CFG, PORT_MRW, 0, "PVR DMA Config" )
    1.27  
    1.28  MMIO_REGION_END
    1.29