1.1 --- a/src/sh4/sh4core.in	Thu Aug 23 12:33:27 2007 +0000
     1.2 +++ b/src/sh4/sh4core.in	Tue Sep 04 08:38:33 2007 +0000
     1.3 @@ -1,5 +1,5 @@
     1.4  /**
     1.5 - * $Id: sh4core.in,v 1.1 2007-08-23 12:33:27 nkeynes Exp $
     1.6 + * $Id: sh4core.in,v 1.2 2007-09-04 08:38:33 nkeynes Exp $
     1.7   * 
     1.8   * SH4 emulation core, and parent module for all the SH4 peripheral
     1.9   * modules.
    1.10 @@ -34,17 +34,6 @@
    1.11  #define MAX_INTF 2147483647.0
    1.12  #define MIN_INTF -2147483648.0
    1.13  
    1.14 -/* CPU-generated exception code/vector pairs */
    1.15 -#define EXC_POWER_RESET  0x000 /* vector special */
    1.16 -#define EXC_MANUAL_RESET 0x020
    1.17 -#define EXC_READ_ADDR_ERR 0x0E0
    1.18 -#define EXC_WRITE_ADDR_ERR 0x100
    1.19 -#define EXC_SLOT_ILLEGAL 0x1A0
    1.20 -#define EXC_ILLEGAL      0x180
    1.21 -#define EXC_TRAP         0x160
    1.22 -#define EXC_FPDISABLE    0x800
    1.23 -#define EXC_SLOT_FPDISABLE 0x820
    1.24 -
    1.25  #define EXV_EXCEPTION    0x100  /* General exception vector */
    1.26  #define EXV_TLBMISS      0x400  /* TLB-miss exception vector */
    1.27  #define EXV_INTERRUPT    0x600  /* External interrupt vector */
    1.28 @@ -322,12 +311,12 @@
    1.29  #define MEM_FP_WRITE( addr, reg ) sh4_write_float( addr, reg );
    1.30  
    1.31  #define CHECKPRIV() if( !IS_SH4_PRIVMODE() ) return sh4_raise_slot_exception( EXC_ILLEGAL, EXC_SLOT_ILLEGAL )
    1.32 -#define CHECKRALIGN16(addr) if( (addr)&0x01 ) return sh4_raise_exception( EXC_READ_ADDR_ERR )
    1.33 -#define CHECKRALIGN32(addr) if( (addr)&0x03 ) return sh4_raise_exception( EXC_READ_ADDR_ERR )
    1.34 -#define CHECKWALIGN16(addr) if( (addr)&0x01 ) return sh4_raise_exception( EXC_WRITE_ADDR_ERR )
    1.35 -#define CHECKWALIGN32(addr) if( (addr)&0x03 ) return sh4_raise_exception( EXC_WRITE_ADDR_ERR )
    1.36 +#define CHECKRALIGN16(addr) if( (addr)&0x01 ) return sh4_raise_exception( EXC_DATA_ADDR_READ )
    1.37 +#define CHECKRALIGN32(addr) if( (addr)&0x03 ) return sh4_raise_exception( EXC_DATA_ADDR_READ )
    1.38 +#define CHECKWALIGN16(addr) if( (addr)&0x01 ) return sh4_raise_exception( EXC_DATA_ADDR_WRITE )
    1.39 +#define CHECKWALIGN32(addr) if( (addr)&0x03 ) return sh4_raise_exception( EXC_DATA_ADDR_WRITE )
    1.40  
    1.41 -#define CHECKFPUEN() if( !IS_FPU_ENABLED() ) { if( ir == 0xFFFD ) { UNDEF(ir); } else { return sh4_raise_slot_exception( EXC_FPDISABLE, EXC_SLOT_FPDISABLE ); } }
    1.42 +#define CHECKFPUEN() if( !IS_FPU_ENABLED() ) { if( ir == 0xFFFD ) { UNDEF(ir); } else { return sh4_raise_slot_exception( EXC_FPU_DISABLED, EXC_SLOT_FPU_DISABLED ); } }
    1.43  #define CHECKDEST(p) if( (p) == 0 ) { ERROR( "%08X: Branch/jump to NULL, CPU halted", sh4r.pc ); dreamcast_stop(); return FALSE; }
    1.44  #define CHECKSLOTILLEGAL() if(sh4r.in_delay_slot) return sh4_raise_exception(EXC_SLOT_ILLEGAL)
    1.45