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lxdream 0.9.1
released Jun 29
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filename src/sh4/intc.c
changeset 736:a02d1475ccfd
prev561:533f6b478071
next929:fd8cb0c82f5f
author nkeynes
date Mon Jul 14 07:44:42 2008 +0000 (13 years ago)
permissions -rw-r--r--
last change Re-indent everything consistently
Fix include guards for consistency as well
file annotate diff log raw
1.1 --- a/src/sh4/intc.c Tue Jan 01 05:08:38 2008 +0000
1.2 +++ b/src/sh4/intc.c Mon Jul 14 07:44:42 2008 +0000
1.3 @@ -26,21 +26,21 @@
1.4 char *name;
1.5 uint32_t code;
1.6 } intc_sources[INT_NUM_SOURCES] = {
1.7 - { "IRQ0", 0x200 }, { "IRQ1", 0x220 }, { "IRQ2", 0x240 },
1.8 - { "IRQ3", 0x260 }, { "IRQ4", 0x280 }, { "IRQ5", 0x2A0 },
1.9 - { "IRQ6", 0x2C0 }, { "IRQ7", 0x2E0 }, { "IRQ8", 0x300 },
1.10 - { "IRQ9", 0x320 }, { "IRQ10",0x340 }, { "IRQ11",0x360 },
1.11 - { "IRQ12",0x380 }, { "IRQ13",0x3A0 }, { "IRQ14",0x3C0 },
1.12 - { "NMI", 0x1C0 }, { "H-UDI",0x600 }, { "GPIOI",0x620 },
1.13 - { "DMTE0",0x640 }, { "DMTE1",0x660 }, { "DMTE2",0x680 },
1.14 - { "DMTE3",0x6A0 }, { "DMTAE",0x6C0 }, { "TUNI0",0x400 },
1.15 - { "TUNI1",0x420 }, { "TUNI2",0x440 }, { "TICPI2",0x460 },
1.16 - { "RTC_ATI",0x480 },{ "RTC_PRI",0x4A0 },{ "RTC_CUI",0x4C0 },
1.17 - { "SCI_ERI",0x4E0 },{ "SCI_RXI",0x500 },{ "SCI_TXI",0x520 },
1.18 - { "SCI_TEI",0x540 },
1.19 - { "SCIF_ERI",0x700 },{ "SCIF_RXI",0x720 },{ "SCIF_BRI",0x740 },
1.20 - { "SCIF_TXI",0x760 },
1.21 - { "WDT_ITI",0x560 },{ "RCMI",0x580 }, { "ROVI",0x5A0 } };
1.22 + { "IRQ0", 0x200 }, { "IRQ1", 0x220 }, { "IRQ2", 0x240 },
1.23 + { "IRQ3", 0x260 }, { "IRQ4", 0x280 }, { "IRQ5", 0x2A0 },
1.24 + { "IRQ6", 0x2C0 }, { "IRQ7", 0x2E0 }, { "IRQ8", 0x300 },
1.25 + { "IRQ9", 0x320 }, { "IRQ10",0x340 }, { "IRQ11",0x360 },
1.26 + { "IRQ12",0x380 }, { "IRQ13",0x3A0 }, { "IRQ14",0x3C0 },
1.27 + { "NMI", 0x1C0 }, { "H-UDI",0x600 }, { "GPIOI",0x620 },
1.28 + { "DMTE0",0x640 }, { "DMTE1",0x660 }, { "DMTE2",0x680 },
1.29 + { "DMTE3",0x6A0 }, { "DMTAE",0x6C0 }, { "TUNI0",0x400 },
1.30 + { "TUNI1",0x420 }, { "TUNI2",0x440 }, { "TICPI2",0x460 },
1.31 + { "RTC_ATI",0x480 },{ "RTC_PRI",0x4A0 },{ "RTC_CUI",0x4C0 },
1.32 + { "SCI_ERI",0x4E0 },{ "SCI_RXI",0x500 },{ "SCI_TXI",0x520 },
1.33 + { "SCI_TEI",0x540 },
1.34 + { "SCIF_ERI",0x700 },{ "SCIF_RXI",0x720 },{ "SCIF_BRI",0x740 },
1.35 + { "SCIF_TXI",0x760 },
1.36 + { "WDT_ITI",0x560 },{ "RCMI",0x580 }, { "ROVI",0x5A0 } };
1.37
1.38 static int intc_default_priority[INT_NUM_SOURCES] = { 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 16 };
1.39
1.40 @@ -57,40 +57,40 @@
1.41 {
1.42 /* Well it saves having to use an intermediate table... */
1.43 switch( reg ) {
1.44 - case ICR: /* care about this later */
1.45 - break;
1.46 - case IPRA:
1.47 - PRIORITY(INT_TMU_TUNI0) = (val>>12)&0x000F;
1.48 - PRIORITY(INT_TMU_TUNI1) = (val>>8)&0x000F;
1.49 - PRIORITY(INT_TMU_TUNI2) =
1.50 - PRIORITY(INT_TMU_TICPI2) = (val>>4)&0x000F;
1.51 - PRIORITY(INT_RTC_ATI) =
1.52 - PRIORITY(INT_RTC_PRI) =
1.53 + case ICR: /* care about this later */
1.54 + break;
1.55 + case IPRA:
1.56 + PRIORITY(INT_TMU_TUNI0) = (val>>12)&0x000F;
1.57 + PRIORITY(INT_TMU_TUNI1) = (val>>8)&0x000F;
1.58 + PRIORITY(INT_TMU_TUNI2) =
1.59 + PRIORITY(INT_TMU_TICPI2) = (val>>4)&0x000F;
1.60 + PRIORITY(INT_RTC_ATI) =
1.61 + PRIORITY(INT_RTC_PRI) =
1.62 PRIORITY(INT_RTC_CUI) = val&0x000F;
1.63 - break;
1.64 - case IPRB:
1.65 - PRIORITY(INT_WDT_ITI) = (val>>12)&0x000F;
1.66 - PRIORITY(INT_REF_RCMI) =
1.67 - PRIORITY(INT_REF_ROVI) = (val>>8)&0x000F;
1.68 - PRIORITY(INT_SCI_ERI) =
1.69 - PRIORITY(INT_SCI_RXI) =
1.70 + break;
1.71 + case IPRB:
1.72 + PRIORITY(INT_WDT_ITI) = (val>>12)&0x000F;
1.73 + PRIORITY(INT_REF_RCMI) =
1.74 + PRIORITY(INT_REF_ROVI) = (val>>8)&0x000F;
1.75 + PRIORITY(INT_SCI_ERI) =
1.76 + PRIORITY(INT_SCI_RXI) =
1.77 PRIORITY(INT_SCI_TXI) =
1.78 - PRIORITY(INT_SCI_TEI) = (val>>4)&0x000F;
1.79 - /* Bits 0-3 reserved */
1.80 - break;
1.81 - case IPRC:
1.82 - PRIORITY(INT_GPIO) = (val>>12)&0x000F;
1.83 - PRIORITY(INT_DMA_DMTE0) =
1.84 - PRIORITY(INT_DMA_DMTE1) =
1.85 + PRIORITY(INT_SCI_TEI) = (val>>4)&0x000F;
1.86 + /* Bits 0-3 reserved */
1.87 + break;
1.88 + case IPRC:
1.89 + PRIORITY(INT_GPIO) = (val>>12)&0x000F;
1.90 + PRIORITY(INT_DMA_DMTE0) =
1.91 + PRIORITY(INT_DMA_DMTE1) =
1.92 PRIORITY(INT_DMA_DMTE2) =
1.93 - PRIORITY(INT_DMA_DMTE3) =
1.94 - PRIORITY(INT_DMA_DMAE) = (val>>8)&0x000F;
1.95 - PRIORITY(INT_SCIF_ERI) =
1.96 - PRIORITY(INT_SCIF_RXI) =
1.97 + PRIORITY(INT_DMA_DMTE3) =
1.98 + PRIORITY(INT_DMA_DMAE) = (val>>8)&0x000F;
1.99 + PRIORITY(INT_SCIF_ERI) =
1.100 + PRIORITY(INT_SCIF_RXI) =
1.101 PRIORITY(INT_SCIF_BRI) =
1.102 - PRIORITY(INT_SCIF_TXI) = (val>>4)&0x000F;
1.103 - PRIORITY(INT_HUDI) = val&0x000F;
1.104 - break;
1.105 + PRIORITY(INT_SCIF_TXI) = (val>>4)&0x000F;
1.106 + PRIORITY(INT_HUDI) = val&0x000F;
1.107 + break;
1.108 }
1.109 MMIO_WRITE( INTC, reg, val );
1.110 }
1.111 @@ -106,7 +106,7 @@
1.112
1.113 intc_state.num_pending = 0;
1.114 for( i=0; i<INT_NUM_SOURCES; i++ )
1.115 - intc_state.priority[i] = intc_default_priority[i];
1.116 + intc_state.priority[i] = intc_default_priority[i];
1.117 sh4r.event_pending = event_get_next_time();
1.118 sh4r.event_types &= (~PENDING_IRQ);
1.119 }
1.120 @@ -120,7 +120,7 @@
1.121 int INTC_load_state( FILE *f )
1.122 {
1.123 if( fread(&intc_state, sizeof(intc_state), 1, f) != 1 )
1.124 - return -1;
1.125 + return -1;
1.126 return 0;
1.127 }
1.128
1.129 @@ -134,15 +134,15 @@
1.130 void intc_raise_interrupt( int which )
1.131 {
1.132 int i, j, pri;
1.133 -
1.134 +
1.135 pri = PRIORITY(which);
1.136 if( pri == 0 ) return; /* masked off */
1.137 -
1.138 +
1.139 for( i=0; i<intc_state.num_pending; i++ ) {
1.140 if( intc_state.pending[i] == which ) return; /* Don't queue more than once */
1.141 if( PRIORITY(intc_state.pending[i]) > pri ||
1.142 - (PRIORITY(intc_state.pending[i]) == pri &&
1.143 - intc_state.pending[i] < which))
1.144 + (PRIORITY(intc_state.pending[i]) == pri &&
1.145 + intc_state.pending[i] < which))
1.146 break;
1.147 }
1.148 /* i == insertion point */
1.149 @@ -152,7 +152,7 @@
1.150
1.151 if( i == intc_state.num_pending && (sh4r.sr&SR_BL)==0 && SH4_INTMASK() < pri ) {
1.152 sh4r.event_pending = 0;
1.153 - sh4r.event_types |= PENDING_IRQ;
1.154 + sh4r.event_types |= PENDING_IRQ;
1.155 }
1.156
1.157 intc_state.num_pending++;
1.158 @@ -162,18 +162,18 @@
1.159 {
1.160 int i;
1.161 for( i=intc_state.num_pending-1; i>=0; i-- ) {
1.162 - if( intc_state.pending[i] == which ) {
1.163 - /* Shift array contents down */
1.164 - while( i < intc_state.num_pending-1 ) {
1.165 - intc_state.pending[i] = intc_state.pending[i+1];
1.166 - i++;
1.167 - }
1.168 - intc_state.num_pending--;
1.169 - intc_mask_changed();
1.170 - break;
1.171 - }
1.172 + if( intc_state.pending[i] == which ) {
1.173 + /* Shift array contents down */
1.174 + while( i < intc_state.num_pending-1 ) {
1.175 + intc_state.pending[i] = intc_state.pending[i+1];
1.176 + i++;
1.177 + }
1.178 + intc_state.num_pending--;
1.179 + intc_mask_changed();
1.180 + break;
1.181 + }
1.182 }
1.183 -
1.184 +
1.185 }
1.186
1.187 uint32_t intc_accept_interrupt( void )
1.188 @@ -185,16 +185,16 @@
1.189 void intc_mask_changed( void )
1.190 {
1.191 if( intc_state.num_pending > 0 && (sh4r.sr&SR_BL)==0 &&
1.192 - SH4_INTMASK() < PRIORITY(intc_state.pending[intc_state.num_pending-1]) ) {
1.193 + SH4_INTMASK() < PRIORITY(intc_state.pending[intc_state.num_pending-1]) ) {
1.194 sh4r.event_pending = 0;
1.195 - sh4r.event_types |= PENDING_IRQ ;
1.196 + sh4r.event_types |= PENDING_IRQ ;
1.197 }
1.198 else {
1.199 - sh4r.event_pending = event_get_next_time();
1.200 - sh4r.event_types &= (~PENDING_IRQ);
1.201 + sh4r.event_pending = event_get_next_time();
1.202 + sh4r.event_types &= (~PENDING_IRQ);
1.203 }
1.204 }
1.205 -
1.206 +
1.207
1.208 char *intc_get_interrupt_name( int code )
1.209 {
.