1.1 --- a/src/sh4/mmu.c	Mon May 12 10:00:13 2008 +0000
     1.2 +++ b/src/sh4/mmu.c	Mon Jul 14 07:44:42 2008 +0000
     1.3 @@ -128,9 +128,9 @@
     1.4  {
     1.5      switch( reg ) {
     1.6      case MMUCR:
     1.7 -	return MMIO_READ( MMU, MMUCR) | (mmu_urc<<10) | (mmu_urb<<18) | (mmu_lrui<<26);
     1.8 +        return MMIO_READ( MMU, MMUCR) | (mmu_urc<<10) | (mmu_urb<<18) | (mmu_lrui<<26);
     1.9      default:
    1.10 -	return MMIO_READ( MMU, reg );
    1.11 +        return MMIO_READ( MMU, reg );
    1.12      }
    1.13  }
    1.14  
    1.15 @@ -139,40 +139,40 @@
    1.16      uint32_t tmp;
    1.17      switch(reg) {
    1.18      case PTEH:
    1.19 -	val &= 0xFFFFFCFF;
    1.20 -	if( (val & 0xFF) != mmu_asid ) {
    1.21 -	    mmu_asid = val&0xFF;
    1.22 -	    sh4_icache.page_vma = -1; // invalidate icache as asid has changed
    1.23 -	}
    1.24 -	break;
    1.25 +        val &= 0xFFFFFCFF;
    1.26 +        if( (val & 0xFF) != mmu_asid ) {
    1.27 +            mmu_asid = val&0xFF;
    1.28 +            sh4_icache.page_vma = -1; // invalidate icache as asid has changed
    1.29 +        }
    1.30 +        break;
    1.31      case PTEL:
    1.32 -	val &= 0x1FFFFDFF;
    1.33 -	break;
    1.34 +        val &= 0x1FFFFDFF;
    1.35 +        break;
    1.36      case PTEA:
    1.37 -	val &= 0x0000000F;
    1.38 -	break;
    1.39 +        val &= 0x0000000F;
    1.40 +        break;
    1.41      case MMUCR:
    1.42 -	if( val & MMUCR_TI ) {
    1.43 -	    mmu_invalidate_tlb();
    1.44 -	}
    1.45 -	mmu_urc = (val >> 10) & 0x3F;
    1.46 -	mmu_urb = (val >> 18) & 0x3F;
    1.47 -	mmu_lrui = (val >> 26) & 0x3F;
    1.48 -	val &= 0x00000301;
    1.49 -	tmp = MMIO_READ( MMU, MMUCR );
    1.50 -	if( ((val ^ tmp) & MMUCR_AT) && sh4_is_using_xlat() ) {
    1.51 -	    // AT flag has changed state - flush the xlt cache as all bets
    1.52 -	    // are off now. We also need to force an immediate exit from the
    1.53 -	    // current block
    1.54 -	    MMIO_WRITE( MMU, MMUCR, val );
    1.55 -	    sh4_translate_flush_cache();
    1.56 -	}
    1.57 -	break;
    1.58 +        if( val & MMUCR_TI ) {
    1.59 +            mmu_invalidate_tlb();
    1.60 +        }
    1.61 +        mmu_urc = (val >> 10) & 0x3F;
    1.62 +        mmu_urb = (val >> 18) & 0x3F;
    1.63 +        mmu_lrui = (val >> 26) & 0x3F;
    1.64 +        val &= 0x00000301;
    1.65 +        tmp = MMIO_READ( MMU, MMUCR );
    1.66 +        if( ((val ^ tmp) & MMUCR_AT) && sh4_is_using_xlat() ) {
    1.67 +            // AT flag has changed state - flush the xlt cache as all bets
    1.68 +            // are off now. We also need to force an immediate exit from the
    1.69 +            // current block
    1.70 +            MMIO_WRITE( MMU, MMUCR, val );
    1.71 +            sh4_translate_flush_cache();
    1.72 +        }
    1.73 +        break;
    1.74      case CCR:
    1.75 -	mmu_set_cache_mode( val & (CCR_OIX|CCR_ORA) );
    1.76 -	break;
    1.77 +        mmu_set_cache_mode( val & (CCR_OIX|CCR_ORA) );
    1.78 +        break;
    1.79      default:
    1.80 -	break;
    1.81 +        break;
    1.82      }
    1.83      MMIO_WRITE( MMU, reg, val );
    1.84  }
    1.85 @@ -207,25 +207,25 @@
    1.86       */
    1.87      mmio_region_MMU_write( CCR, MMIO_READ(MMU, CCR) );
    1.88      if( fread( cache, 4096, 2, f ) != 2 ) {
    1.89 -	return 1;
    1.90 +        return 1;
    1.91      }
    1.92      if( fread( &mmu_itlb, sizeof(mmu_itlb), 1, f ) != 1 ) {
    1.93 -	return 1;
    1.94 +        return 1;
    1.95      }
    1.96      if( fread( &mmu_utlb, sizeof(mmu_utlb), 1, f ) != 1 ) {
    1.97 -	return 1;
    1.98 +        return 1;
    1.99      }
   1.100      if( fread( &mmu_urc, sizeof(mmu_urc), 1, f ) != 1 ) {
   1.101 -	return 1;
   1.102 +        return 1;
   1.103      }
   1.104      if( fread( &mmu_urc, sizeof(mmu_urb), 1, f ) != 1 ) {
   1.105 -	return 1;
   1.106 +        return 1;
   1.107      }
   1.108      if( fread( &mmu_lrui, sizeof(mmu_lrui), 1, f ) != 1 ) {
   1.109 -	return 1;
   1.110 +        return 1;
   1.111      }
   1.112      if( fread( &mmu_asid, sizeof(mmu_asid), 1, f ) != 1 ) {
   1.113 -    	return 1;
   1.114 +        return 1;
   1.115      }
   1.116      return 0;
   1.117  }
   1.118 @@ -234,18 +234,18 @@
   1.119  {
   1.120      uint32_t i;
   1.121      switch( mode ) {
   1.122 -        case MEM_OC_INDEX0: /* OIX=0 */
   1.123 -            for( i=OCRAM_START; i<OCRAM_END; i++ )
   1.124 -                page_map[i] = cache + ((i&0x02)<<(PAGE_BITS-1));
   1.125 -            break;
   1.126 -        case MEM_OC_INDEX1: /* OIX=1 */
   1.127 -            for( i=OCRAM_START; i<OCRAM_END; i++ )
   1.128 -                page_map[i] = cache + ((i&0x02000000)>>(25-PAGE_BITS));
   1.129 -            break;
   1.130 -        default: /* disabled */
   1.131 -            for( i=OCRAM_START; i<OCRAM_END; i++ )
   1.132 -                page_map[i] = NULL;
   1.133 -            break;
   1.134 +    case MEM_OC_INDEX0: /* OIX=0 */
   1.135 +        for( i=OCRAM_START; i<OCRAM_END; i++ )
   1.136 +            page_map[i] = cache + ((i&0x02)<<(PAGE_BITS-1));
   1.137 +        break;
   1.138 +    case MEM_OC_INDEX1: /* OIX=1 */
   1.139 +        for( i=OCRAM_START; i<OCRAM_END; i++ )
   1.140 +            page_map[i] = cache + ((i&0x02000000)>>(25-PAGE_BITS));
   1.141 +        break;
   1.142 +    default: /* disabled */
   1.143 +        for( i=OCRAM_START; i<OCRAM_END; i++ )
   1.144 +            page_map[i] = NULL;
   1.145 +        break;
   1.146      }
   1.147  }
   1.148  
   1.149 @@ -269,10 +269,10 @@
   1.150  {
   1.151      int i;
   1.152      for( i=0; i<ITLB_ENTRY_COUNT; i++ ) {
   1.153 -	mmu_itlb[i].flags &= (~TLB_VALID);
   1.154 +        mmu_itlb[i].flags &= (~TLB_VALID);
   1.155      }
   1.156      for( i=0; i<UTLB_ENTRY_COUNT; i++ ) {
   1.157 -	mmu_utlb[i].flags &= (~TLB_VALID);
   1.158 +        mmu_utlb[i].flags &= (~TLB_VALID);
   1.159      }
   1.160  }
   1.161  
   1.162 @@ -313,15 +313,15 @@
   1.163  {
   1.164      struct utlb_entry *ent = &mmu_utlb[UTLB_ENTRY(addr)];
   1.165      return ent->vpn | ent->asid | (ent->flags & TLB_VALID) |
   1.166 -	((ent->flags & TLB_DIRTY)<<7);
   1.167 +    ((ent->flags & TLB_DIRTY)<<7);
   1.168  }
   1.169  int32_t mmu_utlb_data_read( sh4addr_t addr )
   1.170  {
   1.171      struct utlb_entry *ent = &mmu_utlb[UTLB_ENTRY(addr)];
   1.172      if( UTLB_DATA2(addr) ) {
   1.173 -	return ent->pcmcia;
   1.174 +        return ent->pcmcia;
   1.175      } else {
   1.176 -	return ent->ppn | ent->flags;
   1.177 +        return ent->ppn | ent->flags;
   1.178      }
   1.179  }
   1.180  
   1.181 @@ -334,15 +334,15 @@
   1.182      int result = -1;
   1.183      unsigned int i;
   1.184      for( i = 0; i < UTLB_ENTRY_COUNT; i++ ) {
   1.185 -	if( (mmu_utlb[i].flags & TLB_VALID) &&
   1.186 -	    ((mmu_utlb[i].flags & TLB_SHARE) || asid == mmu_utlb[i].asid) && 
   1.187 -	    ((mmu_utlb[i].vpn ^ vpn) & mmu_utlb[i].mask) == 0 ) {
   1.188 -	    if( result != -1 ) {
   1.189 -		fprintf( stderr, "TLB Multi hit: %d %d\n", result, i );
   1.190 -		return -2;
   1.191 -	    }
   1.192 -	    result = i;
   1.193 -	}
   1.194 +        if( (mmu_utlb[i].flags & TLB_VALID) &&
   1.195 +                ((mmu_utlb[i].flags & TLB_SHARE) || asid == mmu_utlb[i].asid) && 
   1.196 +                ((mmu_utlb[i].vpn ^ vpn) & mmu_utlb[i].mask) == 0 ) {
   1.197 +            if( result != -1 ) {
   1.198 +                fprintf( stderr, "TLB Multi hit: %d %d\n", result, i );
   1.199 +                return -2;
   1.200 +            }
   1.201 +            result = i;
   1.202 +        }
   1.203      }
   1.204      return result;
   1.205  }
   1.206 @@ -356,14 +356,14 @@
   1.207      int result = -1;
   1.208      unsigned int i;
   1.209      for( i = 0; i < ITLB_ENTRY_COUNT; i++ ) {
   1.210 -	if( (mmu_itlb[i].flags & TLB_VALID) &&
   1.211 -	    ((mmu_itlb[i].flags & TLB_SHARE) || asid == mmu_itlb[i].asid) && 
   1.212 -	    ((mmu_itlb[i].vpn ^ vpn) & mmu_itlb[i].mask) == 0 ) {
   1.213 -	    if( result != -1 ) {
   1.214 -		return -2;
   1.215 -	    }
   1.216 -	    result = i;
   1.217 -	}
   1.218 +        if( (mmu_itlb[i].flags & TLB_VALID) &&
   1.219 +                ((mmu_itlb[i].flags & TLB_SHARE) || asid == mmu_itlb[i].asid) && 
   1.220 +                ((mmu_itlb[i].vpn ^ vpn) & mmu_itlb[i].mask) == 0 ) {
   1.221 +            if( result != -1 ) {
   1.222 +                return -2;
   1.223 +            }
   1.224 +            result = i;
   1.225 +        }
   1.226      }
   1.227      return result;
   1.228  }
   1.229 @@ -371,31 +371,31 @@
   1.230  void mmu_utlb_addr_write( sh4addr_t addr, uint32_t val )
   1.231  {
   1.232      if( UTLB_ASSOC(addr) ) {
   1.233 -	int utlb = mmu_utlb_lookup_assoc( val, mmu_asid );
   1.234 -	if( utlb >= 0 ) {
   1.235 -	    struct utlb_entry *ent = &mmu_utlb[utlb];
   1.236 -	    ent->flags = ent->flags & ~(TLB_DIRTY|TLB_VALID);
   1.237 -	    ent->flags |= (val & TLB_VALID);
   1.238 -	    ent->flags |= ((val & 0x200)>>7);
   1.239 -	}
   1.240 +        int utlb = mmu_utlb_lookup_assoc( val, mmu_asid );
   1.241 +        if( utlb >= 0 ) {
   1.242 +            struct utlb_entry *ent = &mmu_utlb[utlb];
   1.243 +            ent->flags = ent->flags & ~(TLB_DIRTY|TLB_VALID);
   1.244 +            ent->flags |= (val & TLB_VALID);
   1.245 +            ent->flags |= ((val & 0x200)>>7);
   1.246 +        }
   1.247  
   1.248 -	int itlb = mmu_itlb_lookup_assoc( val, mmu_asid );
   1.249 -	if( itlb >= 0 ) {
   1.250 -	    struct itlb_entry *ent = &mmu_itlb[itlb];
   1.251 -	    ent->flags = (ent->flags & (~TLB_VALID)) | (val & TLB_VALID);
   1.252 -	}
   1.253 +        int itlb = mmu_itlb_lookup_assoc( val, mmu_asid );
   1.254 +        if( itlb >= 0 ) {
   1.255 +            struct itlb_entry *ent = &mmu_itlb[itlb];
   1.256 +            ent->flags = (ent->flags & (~TLB_VALID)) | (val & TLB_VALID);
   1.257 +        }
   1.258  
   1.259 -	if( itlb == -2 || utlb == -2 ) {
   1.260 -	    MMU_TLB_MULTI_HIT_ERROR(addr);
   1.261 -	    return;
   1.262 -	}
   1.263 +        if( itlb == -2 || utlb == -2 ) {
   1.264 +            MMU_TLB_MULTI_HIT_ERROR(addr);
   1.265 +            return;
   1.266 +        }
   1.267      } else {
   1.268 -	struct utlb_entry *ent = &mmu_utlb[UTLB_ENTRY(addr)];
   1.269 -	ent->vpn = (val & 0xFFFFFC00);
   1.270 -	ent->asid = (val & 0xFF);
   1.271 -	ent->flags = (ent->flags & ~(TLB_DIRTY|TLB_VALID));
   1.272 -	ent->flags |= (val & TLB_VALID);
   1.273 -	ent->flags |= ((val & 0x200)>>7);
   1.274 +        struct utlb_entry *ent = &mmu_utlb[UTLB_ENTRY(addr)];
   1.275 +        ent->vpn = (val & 0xFFFFFC00);
   1.276 +        ent->asid = (val & 0xFF);
   1.277 +        ent->flags = (ent->flags & ~(TLB_DIRTY|TLB_VALID));
   1.278 +        ent->flags |= (val & TLB_VALID);
   1.279 +        ent->flags |= ((val & 0x200)>>7);
   1.280      }
   1.281  }
   1.282  
   1.283 @@ -403,11 +403,11 @@
   1.284  {
   1.285      struct utlb_entry *ent = &mmu_utlb[UTLB_ENTRY(addr)];
   1.286      if( UTLB_DATA2(addr) ) {
   1.287 -	ent->pcmcia = val & 0x0000000F;
   1.288 +        ent->pcmcia = val & 0x0000000F;
   1.289      } else {
   1.290 -	ent->ppn = (val & 0x1FFFFC00);
   1.291 -	ent->flags = (val & 0x000001FF);
   1.292 -	ent->mask = get_mask_for_flags(val);
   1.293 +        ent->ppn = (val & 0x1FFFFC00);
   1.294 +        ent->flags = (val & 0x000001FF);
   1.295 +        ent->mask = get_mask_for_flags(val);
   1.296      }
   1.297  }
   1.298  
   1.299 @@ -471,18 +471,18 @@
   1.300  
   1.301      mmu_urc++;
   1.302      if( mmu_urc == mmu_urb || mmu_urc == 0x40 ) {
   1.303 -	mmu_urc = 0;
   1.304 +        mmu_urc = 0;
   1.305      }
   1.306  
   1.307      for( i = 0; i < UTLB_ENTRY_COUNT; i++ ) {
   1.308 -	if( (mmu_utlb[i].flags & TLB_VALID) &&
   1.309 -	    ((mmu_utlb[i].flags & TLB_SHARE) || mmu_asid == mmu_utlb[i].asid) && 
   1.310 -	    ((mmu_utlb[i].vpn ^ vpn) & mmu_utlb[i].mask) == 0 ) {
   1.311 -	    if( result != -1 ) {
   1.312 -		return -2;
   1.313 -	    }
   1.314 -	    result = i;
   1.315 -	}
   1.316 +        if( (mmu_utlb[i].flags & TLB_VALID) &&
   1.317 +                ((mmu_utlb[i].flags & TLB_SHARE) || mmu_asid == mmu_utlb[i].asid) && 
   1.318 +                ((mmu_utlb[i].vpn ^ vpn) & mmu_utlb[i].mask) == 0 ) {
   1.319 +            if( result != -1 ) {
   1.320 +                return -2;
   1.321 +            }
   1.322 +            result = i;
   1.323 +        }
   1.324      }
   1.325      return result;
   1.326  }
   1.327 @@ -503,17 +503,17 @@
   1.328  
   1.329      mmu_urc++;
   1.330      if( mmu_urc == mmu_urb || mmu_urc == 0x40 ) {
   1.331 -	mmu_urc = 0;
   1.332 +        mmu_urc = 0;
   1.333      }
   1.334  
   1.335      for( i = 0; i < UTLB_ENTRY_COUNT; i++ ) {
   1.336 -	if( (mmu_utlb[i].flags & TLB_VALID) &&
   1.337 -	    ((mmu_utlb[i].vpn ^ vpn) & mmu_utlb[i].mask) == 0 ) {
   1.338 -	    if( result != -1 ) {
   1.339 -		return -2;
   1.340 -	    }
   1.341 -	    result = i;
   1.342 -	}
   1.343 +        if( (mmu_utlb[i].flags & TLB_VALID) &&
   1.344 +                ((mmu_utlb[i].vpn ^ vpn) & mmu_utlb[i].mask) == 0 ) {
   1.345 +            if( result != -1 ) {
   1.346 +                return -2;
   1.347 +            }
   1.348 +            result = i;
   1.349 +        }
   1.350      }
   1.351  
   1.352      return result;
   1.353 @@ -528,17 +528,17 @@
   1.354      int replace;
   1.355      /* Determine entry to replace based on lrui */
   1.356      if( (mmu_lrui & 0x38) == 0x38 ) {
   1.357 -	replace = 0;
   1.358 -	mmu_lrui = mmu_lrui & 0x07;
   1.359 +        replace = 0;
   1.360 +        mmu_lrui = mmu_lrui & 0x07;
   1.361      } else if( (mmu_lrui & 0x26) == 0x06 ) {
   1.362 -	replace = 1;
   1.363 -	mmu_lrui = (mmu_lrui & 0x19) | 0x20;
   1.364 +        replace = 1;
   1.365 +        mmu_lrui = (mmu_lrui & 0x19) | 0x20;
   1.366      } else if( (mmu_lrui & 0x15) == 0x01 ) {
   1.367 -	replace = 2;
   1.368 -	mmu_lrui = (mmu_lrui & 0x3E) | 0x14;
   1.369 +        replace = 2;
   1.370 +        mmu_lrui = (mmu_lrui & 0x3E) | 0x14;
   1.371      } else { // Note - gets invalid entries too
   1.372 -	replace = 3;
   1.373 -	mmu_lrui = (mmu_lrui | 0x0B);
   1.374 +        replace = 3;
   1.375 +        mmu_lrui = (mmu_lrui | 0x0B);
   1.376      } 
   1.377  
   1.378      mmu_itlb[replace].vpn = mmu_utlb[entryNo].vpn;
   1.379 @@ -564,23 +564,23 @@
   1.380      unsigned int i;
   1.381  
   1.382      for( i = 0; i < ITLB_ENTRY_COUNT; i++ ) {
   1.383 -	if( (mmu_itlb[i].flags & TLB_VALID) &&
   1.384 -	    ((mmu_itlb[i].flags & TLB_SHARE) || mmu_asid == mmu_itlb[i].asid) && 
   1.385 -	    ((mmu_itlb[i].vpn ^ vpn) & mmu_itlb[i].mask) == 0 ) {
   1.386 -	    if( result != -1 ) {
   1.387 -		return -2;
   1.388 -	    }
   1.389 -	    result = i;
   1.390 -	}
   1.391 +        if( (mmu_itlb[i].flags & TLB_VALID) &&
   1.392 +                ((mmu_itlb[i].flags & TLB_SHARE) || mmu_asid == mmu_itlb[i].asid) && 
   1.393 +                ((mmu_itlb[i].vpn ^ vpn) & mmu_itlb[i].mask) == 0 ) {
   1.394 +            if( result != -1 ) {
   1.395 +                return -2;
   1.396 +            }
   1.397 +            result = i;
   1.398 +        }
   1.399      }
   1.400  
   1.401      if( result == -1 ) {
   1.402 -	int utlbEntry = mmu_utlb_lookup_vpn_asid( vpn );
   1.403 -	if( utlbEntry < 0 ) {
   1.404 -	    return utlbEntry;
   1.405 -	} else {
   1.406 -	    return mmu_itlb_update_from_utlb( utlbEntry );
   1.407 -	}
   1.408 +        int utlbEntry = mmu_utlb_lookup_vpn_asid( vpn );
   1.409 +        if( utlbEntry < 0 ) {
   1.410 +            return utlbEntry;
   1.411 +        } else {
   1.412 +            return mmu_itlb_update_from_utlb( utlbEntry );
   1.413 +        }
   1.414      }
   1.415  
   1.416      switch( result ) {
   1.417 @@ -589,7 +589,7 @@
   1.418      case 2: mmu_lrui = (mmu_lrui & 0x3E) | 0x14; break;
   1.419      case 3: mmu_lrui = (mmu_lrui | 0x0B); break;
   1.420      }
   1.421 -	
   1.422 +
   1.423      return result;
   1.424  }
   1.425  
   1.426 @@ -608,22 +608,22 @@
   1.427      unsigned int i;
   1.428  
   1.429      for( i = 0; i < ITLB_ENTRY_COUNT; i++ ) {
   1.430 -	if( (mmu_itlb[i].flags & TLB_VALID) &&
   1.431 -	    ((mmu_itlb[i].vpn ^ vpn) & mmu_itlb[i].mask) == 0 ) {
   1.432 -	    if( result != -1 ) {
   1.433 -		return -2;
   1.434 -	    }
   1.435 -	    result = i;
   1.436 -	}
   1.437 +        if( (mmu_itlb[i].flags & TLB_VALID) &&
   1.438 +                ((mmu_itlb[i].vpn ^ vpn) & mmu_itlb[i].mask) == 0 ) {
   1.439 +            if( result != -1 ) {
   1.440 +                return -2;
   1.441 +            }
   1.442 +            result = i;
   1.443 +        }
   1.444      }
   1.445  
   1.446      if( result == -1 ) {
   1.447 -	int utlbEntry = mmu_utlb_lookup_vpn( vpn );
   1.448 -	if( utlbEntry < 0 ) {
   1.449 -	    return utlbEntry;
   1.450 -	} else {
   1.451 -	    return mmu_itlb_update_from_utlb( utlbEntry );
   1.452 -	}
   1.453 +        int utlbEntry = mmu_utlb_lookup_vpn( vpn );
   1.454 +        if( utlbEntry < 0 ) {
   1.455 +            return utlbEntry;
   1.456 +        } else {
   1.457 +            return mmu_itlb_update_from_utlb( utlbEntry );
   1.458 +        }
   1.459      }
   1.460  
   1.461      switch( result ) {
   1.462 @@ -632,7 +632,7 @@
   1.463      case 2: mmu_lrui = (mmu_lrui & 0x3E) | 0x14; break;
   1.464      case 3: mmu_lrui = (mmu_lrui | 0x0B); break;
   1.465      }
   1.466 -	
   1.467 +
   1.468      return result;
   1.469  }
   1.470  
   1.471 @@ -640,54 +640,54 @@
   1.472  {
   1.473      uint32_t mmucr = MMIO_READ(MMU,MMUCR);
   1.474      if( addr & 0x80000000 ) {
   1.475 -	if( IS_SH4_PRIVMODE() ) {
   1.476 -	    if( addr >= 0xE0000000 ) {
   1.477 -		return addr; /* P4 - passthrough */
   1.478 -	    } else if( addr < 0xC0000000 ) {
   1.479 -		/* P1, P2 regions are pass-through (no translation) */
   1.480 -		return VMA_TO_EXT_ADDR(addr);
   1.481 -	    }
   1.482 -	} else {
   1.483 -	    if( addr >= 0xE0000000 && addr < 0xE4000000 &&
   1.484 -		((mmucr&MMUCR_SQMD) == 0) ) {
   1.485 -		/* Conditional user-mode access to the store-queue (no translation) */
   1.486 -		return addr;
   1.487 -	    }
   1.488 -	    MMU_READ_ADDR_ERROR();
   1.489 -	    return MMU_VMA_ERROR;
   1.490 -	}
   1.491 +        if( IS_SH4_PRIVMODE() ) {
   1.492 +            if( addr >= 0xE0000000 ) {
   1.493 +                return addr; /* P4 - passthrough */
   1.494 +            } else if( addr < 0xC0000000 ) {
   1.495 +                /* P1, P2 regions are pass-through (no translation) */
   1.496 +                return VMA_TO_EXT_ADDR(addr);
   1.497 +            }
   1.498 +        } else {
   1.499 +            if( addr >= 0xE0000000 && addr < 0xE4000000 &&
   1.500 +                    ((mmucr&MMUCR_SQMD) == 0) ) {
   1.501 +                /* Conditional user-mode access to the store-queue (no translation) */
   1.502 +                return addr;
   1.503 +            }
   1.504 +            MMU_READ_ADDR_ERROR();
   1.505 +            return MMU_VMA_ERROR;
   1.506 +        }
   1.507      }
   1.508 -    
   1.509 +
   1.510      if( (mmucr & MMUCR_AT) == 0 ) {
   1.511 -	return VMA_TO_EXT_ADDR(addr);
   1.512 +        return VMA_TO_EXT_ADDR(addr);
   1.513      }
   1.514  
   1.515      /* If we get this far, translation is required */
   1.516      int entryNo;
   1.517      if( ((mmucr & MMUCR_SV) == 0) || !IS_SH4_PRIVMODE() ) {
   1.518 -	entryNo = mmu_utlb_lookup_vpn_asid( addr );
   1.519 +        entryNo = mmu_utlb_lookup_vpn_asid( addr );
   1.520      } else {
   1.521 -	entryNo = mmu_utlb_lookup_vpn( addr );
   1.522 +        entryNo = mmu_utlb_lookup_vpn( addr );
   1.523      }
   1.524  
   1.525      switch(entryNo) {
   1.526      case -1:
   1.527 -	MMU_TLB_READ_MISS_ERROR(addr);
   1.528 -	return MMU_VMA_ERROR;
   1.529 +    MMU_TLB_READ_MISS_ERROR(addr);
   1.530 +    return MMU_VMA_ERROR;
   1.531      case -2:
   1.532 -	MMU_TLB_MULTI_HIT_ERROR(addr);
   1.533 -	return MMU_VMA_ERROR;
   1.534 +    MMU_TLB_MULTI_HIT_ERROR(addr);
   1.535 +    return MMU_VMA_ERROR;
   1.536      default:
   1.537 -	if( (mmu_utlb[entryNo].flags & TLB_USERMODE) == 0 &&
   1.538 -	    !IS_SH4_PRIVMODE() ) {
   1.539 -	    /* protection violation */
   1.540 -	    MMU_TLB_READ_PROT_ERROR(addr);
   1.541 -	    return MMU_VMA_ERROR;
   1.542 -	}
   1.543 +        if( (mmu_utlb[entryNo].flags & TLB_USERMODE) == 0 &&
   1.544 +                !IS_SH4_PRIVMODE() ) {
   1.545 +            /* protection violation */
   1.546 +            MMU_TLB_READ_PROT_ERROR(addr);
   1.547 +            return MMU_VMA_ERROR;
   1.548 +        }
   1.549  
   1.550 -	/* finally generate the target address */
   1.551 -	return (mmu_utlb[entryNo].ppn & mmu_utlb[entryNo].mask) | 
   1.552 -	    (addr & (~mmu_utlb[entryNo].mask));
   1.553 +        /* finally generate the target address */
   1.554 +        return (mmu_utlb[entryNo].ppn & mmu_utlb[entryNo].mask) | 
   1.555 +        (addr & (~mmu_utlb[entryNo].mask));
   1.556      }
   1.557  }
   1.558  
   1.559 @@ -695,59 +695,59 @@
   1.560  {
   1.561      uint32_t mmucr = MMIO_READ(MMU,MMUCR);
   1.562      if( addr & 0x80000000 ) {
   1.563 -	if( IS_SH4_PRIVMODE() ) {
   1.564 -	    if( addr >= 0xE0000000 ) {
   1.565 -		return addr; /* P4 - passthrough */
   1.566 -	    } else if( addr < 0xC0000000 ) {
   1.567 -		/* P1, P2 regions are pass-through (no translation) */
   1.568 -		return VMA_TO_EXT_ADDR(addr);
   1.569 -	    }
   1.570 -	} else {
   1.571 -	    if( addr >= 0xE0000000 && addr < 0xE4000000 &&
   1.572 -		((mmucr&MMUCR_SQMD) == 0) ) {
   1.573 -		/* Conditional user-mode access to the store-queue (no translation) */
   1.574 -		return addr;
   1.575 -	    }
   1.576 -	    MMU_WRITE_ADDR_ERROR();
   1.577 -	    return MMU_VMA_ERROR;
   1.578 -	}
   1.579 +        if( IS_SH4_PRIVMODE() ) {
   1.580 +            if( addr >= 0xE0000000 ) {
   1.581 +                return addr; /* P4 - passthrough */
   1.582 +            } else if( addr < 0xC0000000 ) {
   1.583 +                /* P1, P2 regions are pass-through (no translation) */
   1.584 +                return VMA_TO_EXT_ADDR(addr);
   1.585 +            }
   1.586 +        } else {
   1.587 +            if( addr >= 0xE0000000 && addr < 0xE4000000 &&
   1.588 +                    ((mmucr&MMUCR_SQMD) == 0) ) {
   1.589 +                /* Conditional user-mode access to the store-queue (no translation) */
   1.590 +                return addr;
   1.591 +            }
   1.592 +            MMU_WRITE_ADDR_ERROR();
   1.593 +            return MMU_VMA_ERROR;
   1.594 +        }
   1.595      }
   1.596 -    
   1.597 +
   1.598      if( (mmucr & MMUCR_AT) == 0 ) {
   1.599 -	return VMA_TO_EXT_ADDR(addr);
   1.600 +        return VMA_TO_EXT_ADDR(addr);
   1.601      }
   1.602  
   1.603      /* If we get this far, translation is required */
   1.604      int entryNo;
   1.605      if( ((mmucr & MMUCR_SV) == 0) || !IS_SH4_PRIVMODE() ) {
   1.606 -	entryNo = mmu_utlb_lookup_vpn_asid( addr );
   1.607 +        entryNo = mmu_utlb_lookup_vpn_asid( addr );
   1.608      } else {
   1.609 -	entryNo = mmu_utlb_lookup_vpn( addr );
   1.610 +        entryNo = mmu_utlb_lookup_vpn( addr );
   1.611      }
   1.612  
   1.613      switch(entryNo) {
   1.614      case -1:
   1.615 -	MMU_TLB_WRITE_MISS_ERROR(addr);
   1.616 -	return MMU_VMA_ERROR;
   1.617 +    MMU_TLB_WRITE_MISS_ERROR(addr);
   1.618 +    return MMU_VMA_ERROR;
   1.619      case -2:
   1.620 -	MMU_TLB_MULTI_HIT_ERROR(addr);
   1.621 -	return MMU_VMA_ERROR;
   1.622 +    MMU_TLB_MULTI_HIT_ERROR(addr);
   1.623 +    return MMU_VMA_ERROR;
   1.624      default:
   1.625 -	if( IS_SH4_PRIVMODE() ? ((mmu_utlb[entryNo].flags & TLB_WRITABLE) == 0)
   1.626 -	    : ((mmu_utlb[entryNo].flags & TLB_USERWRITABLE) != TLB_USERWRITABLE) ) {
   1.627 -	    /* protection violation */
   1.628 -	    MMU_TLB_WRITE_PROT_ERROR(addr);
   1.629 -	    return MMU_VMA_ERROR;
   1.630 -	}
   1.631 +        if( IS_SH4_PRIVMODE() ? ((mmu_utlb[entryNo].flags & TLB_WRITABLE) == 0)
   1.632 +                : ((mmu_utlb[entryNo].flags & TLB_USERWRITABLE) != TLB_USERWRITABLE) ) {
   1.633 +            /* protection violation */
   1.634 +            MMU_TLB_WRITE_PROT_ERROR(addr);
   1.635 +            return MMU_VMA_ERROR;
   1.636 +        }
   1.637  
   1.638 -	if( (mmu_utlb[entryNo].flags & TLB_DIRTY) == 0 ) {
   1.639 -	    MMU_TLB_INITIAL_WRITE_ERROR(addr);
   1.640 -	    return MMU_VMA_ERROR;
   1.641 -	}
   1.642 +        if( (mmu_utlb[entryNo].flags & TLB_DIRTY) == 0 ) {
   1.643 +            MMU_TLB_INITIAL_WRITE_ERROR(addr);
   1.644 +            return MMU_VMA_ERROR;
   1.645 +        }
   1.646  
   1.647 -	/* finally generate the target address */
   1.648 -	return (mmu_utlb[entryNo].ppn & mmu_utlb[entryNo].mask) | 
   1.649 -	    (addr & (~mmu_utlb[entryNo].mask));
   1.650 +        /* finally generate the target address */
   1.651 +        return (mmu_utlb[entryNo].ppn & mmu_utlb[entryNo].mask) | 
   1.652 +        (addr & (~mmu_utlb[entryNo].mask));
   1.653      }
   1.654  }
   1.655  
   1.656 @@ -757,20 +757,20 @@
   1.657  void mmu_update_icache_phys( sh4addr_t addr )
   1.658  {
   1.659      if( (addr & 0x1C000000) == 0x0C000000 ) {
   1.660 -	/* Main ram */
   1.661 -	sh4_icache.page_vma = addr & 0xFF000000;
   1.662 -	sh4_icache.page_ppa = 0x0C000000;
   1.663 -	sh4_icache.mask = 0xFF000000;
   1.664 -	sh4_icache.page = sh4_main_ram;
   1.665 +        /* Main ram */
   1.666 +        sh4_icache.page_vma = addr & 0xFF000000;
   1.667 +        sh4_icache.page_ppa = 0x0C000000;
   1.668 +        sh4_icache.mask = 0xFF000000;
   1.669 +        sh4_icache.page = sh4_main_ram;
   1.670      } else if( (addr & 0x1FE00000) == 0 ) {
   1.671 -	/* BIOS ROM */
   1.672 -	sh4_icache.page_vma = addr & 0xFFE00000;
   1.673 -	sh4_icache.page_ppa = 0;
   1.674 -	sh4_icache.mask = 0xFFE00000;
   1.675 -	sh4_icache.page = mem_get_region(0);
   1.676 +        /* BIOS ROM */
   1.677 +        sh4_icache.page_vma = addr & 0xFFE00000;
   1.678 +        sh4_icache.page_ppa = 0;
   1.679 +        sh4_icache.mask = 0xFFE00000;
   1.680 +        sh4_icache.page = mem_get_region(0);
   1.681      } else {
   1.682 -	/* not supported */
   1.683 -	sh4_icache.page_vma = -1;
   1.684 +        /* not supported */
   1.685 +        sh4_icache.page_vma = -1;
   1.686      }
   1.687  }
   1.688  
   1.689 @@ -790,64 +790,64 @@
   1.690  {
   1.691      int entryNo;
   1.692      if( IS_SH4_PRIVMODE()  ) {
   1.693 -	if( addr & 0x80000000 ) {
   1.694 -	    if( addr < 0xC0000000 ) {
   1.695 -		/* P1, P2 and P4 regions are pass-through (no translation) */
   1.696 -		mmu_update_icache_phys(addr);
   1.697 -		return TRUE;
   1.698 -	    } else if( addr >= 0xE0000000 && addr < 0xFFFFFF00 ) {
   1.699 -		MMU_READ_ADDR_ERROR();
   1.700 -		return FALSE;
   1.701 -	    }
   1.702 -	}
   1.703 -    
   1.704 -	uint32_t mmucr = MMIO_READ(MMU,MMUCR);
   1.705 -	if( (mmucr & MMUCR_AT) == 0 ) {
   1.706 -	    mmu_update_icache_phys(addr);
   1.707 -	    return TRUE;
   1.708 -	}
   1.709 +        if( addr & 0x80000000 ) {
   1.710 +            if( addr < 0xC0000000 ) {
   1.711 +                /* P1, P2 and P4 regions are pass-through (no translation) */
   1.712 +                mmu_update_icache_phys(addr);
   1.713 +                return TRUE;
   1.714 +            } else if( addr >= 0xE0000000 && addr < 0xFFFFFF00 ) {
   1.715 +                MMU_READ_ADDR_ERROR();
   1.716 +                return FALSE;
   1.717 +            }
   1.718 +        }
   1.719  
   1.720 -	entryNo = mmu_itlb_lookup_vpn( addr );
   1.721 +        uint32_t mmucr = MMIO_READ(MMU,MMUCR);
   1.722 +        if( (mmucr & MMUCR_AT) == 0 ) {
   1.723 +            mmu_update_icache_phys(addr);
   1.724 +            return TRUE;
   1.725 +        }
   1.726 +
   1.727 +        entryNo = mmu_itlb_lookup_vpn( addr );
   1.728      } else {
   1.729 -	if( addr & 0x80000000 ) {
   1.730 -	    MMU_READ_ADDR_ERROR();
   1.731 -	    return FALSE;
   1.732 -	}
   1.733 +        if( addr & 0x80000000 ) {
   1.734 +            MMU_READ_ADDR_ERROR();
   1.735 +            return FALSE;
   1.736 +        }
   1.737  
   1.738 -	uint32_t mmucr = MMIO_READ(MMU,MMUCR);
   1.739 -	if( (mmucr & MMUCR_AT) == 0 ) {
   1.740 -	    mmu_update_icache_phys(addr);
   1.741 -	    return TRUE;
   1.742 -	}
   1.743 -	
   1.744 -	if( mmucr & MMUCR_SV ) {
   1.745 -	    entryNo = mmu_itlb_lookup_vpn( addr );
   1.746 -	} else {
   1.747 -	    entryNo = mmu_itlb_lookup_vpn_asid( addr );
   1.748 -	}
   1.749 -	if( entryNo != -1 && (mmu_itlb[entryNo].flags & TLB_USERMODE) == 0 ) {
   1.750 -	    MMU_TLB_READ_PROT_ERROR(addr);
   1.751 -	    return FALSE;
   1.752 -	}
   1.753 +        uint32_t mmucr = MMIO_READ(MMU,MMUCR);
   1.754 +        if( (mmucr & MMUCR_AT) == 0 ) {
   1.755 +            mmu_update_icache_phys(addr);
   1.756 +            return TRUE;
   1.757 +        }
   1.758 +
   1.759 +        if( mmucr & MMUCR_SV ) {
   1.760 +            entryNo = mmu_itlb_lookup_vpn( addr );
   1.761 +        } else {
   1.762 +            entryNo = mmu_itlb_lookup_vpn_asid( addr );
   1.763 +        }
   1.764 +        if( entryNo != -1 && (mmu_itlb[entryNo].flags & TLB_USERMODE) == 0 ) {
   1.765 +            MMU_TLB_READ_PROT_ERROR(addr);
   1.766 +            return FALSE;
   1.767 +        }
   1.768      }
   1.769  
   1.770      switch(entryNo) {
   1.771      case -1:
   1.772 -	MMU_TLB_READ_MISS_ERROR(addr);
   1.773 -	return FALSE;
   1.774 +    MMU_TLB_READ_MISS_ERROR(addr);
   1.775 +    return FALSE;
   1.776      case -2:
   1.777 -	MMU_TLB_MULTI_HIT_ERROR(addr);
   1.778 -	return FALSE;
   1.779 +    MMU_TLB_MULTI_HIT_ERROR(addr);
   1.780 +    return FALSE;
   1.781      default:
   1.782 -	sh4_icache.page_ppa = mmu_itlb[entryNo].ppn & mmu_itlb[entryNo].mask;
   1.783 -	sh4_icache.page = mem_get_region( sh4_icache.page_ppa );
   1.784 -	if( sh4_icache.page == NULL ) {
   1.785 -	    sh4_icache.page_vma = -1;
   1.786 -	} else {
   1.787 -	    sh4_icache.page_vma = mmu_itlb[entryNo].vpn & mmu_itlb[entryNo].mask;
   1.788 -	    sh4_icache.mask = mmu_itlb[entryNo].mask;
   1.789 -	}
   1.790 -	return TRUE;
   1.791 +        sh4_icache.page_ppa = mmu_itlb[entryNo].ppn & mmu_itlb[entryNo].mask;
   1.792 +        sh4_icache.page = mem_get_region( sh4_icache.page_ppa );
   1.793 +        if( sh4_icache.page == NULL ) {
   1.794 +            sh4_icache.page_vma = -1;
   1.795 +        } else {
   1.796 +            sh4_icache.page_vma = mmu_itlb[entryNo].vpn & mmu_itlb[entryNo].mask;
   1.797 +            sh4_icache.mask = mmu_itlb[entryNo].mask;
   1.798 +        }
   1.799 +        return TRUE;
   1.800      }
   1.801  }
   1.802  
   1.803 @@ -860,29 +860,29 @@
   1.804  sh4addr_t mmu_vma_to_phys_disasm( sh4vma_t vma )
   1.805  {
   1.806      if( vma & 0x80000000 ) {
   1.807 -	if( vma < 0xC0000000 ) {
   1.808 -	    /* P1, P2 and P4 regions are pass-through (no translation) */
   1.809 -	    return VMA_TO_EXT_ADDR(vma);
   1.810 -	} else if( vma >= 0xE0000000 && vma < 0xFFFFFF00 ) {
   1.811 -	    /* Not translatable */
   1.812 -	    return MMU_VMA_ERROR;
   1.813 -	}
   1.814 +        if( vma < 0xC0000000 ) {
   1.815 +            /* P1, P2 and P4 regions are pass-through (no translation) */
   1.816 +            return VMA_TO_EXT_ADDR(vma);
   1.817 +        } else if( vma >= 0xE0000000 && vma < 0xFFFFFF00 ) {
   1.818 +            /* Not translatable */
   1.819 +            return MMU_VMA_ERROR;
   1.820 +        }
   1.821      }
   1.822  
   1.823      uint32_t mmucr = MMIO_READ(MMU,MMUCR);
   1.824      if( (mmucr & MMUCR_AT) == 0 ) {
   1.825 -	return VMA_TO_EXT_ADDR(vma);
   1.826 +        return VMA_TO_EXT_ADDR(vma);
   1.827      }
   1.828 -    
   1.829 +
   1.830      int entryNo = mmu_itlb_lookup_vpn( vma );
   1.831      if( entryNo == -2 ) {
   1.832 -	entryNo = mmu_itlb_lookup_vpn_asid( vma );
   1.833 +        entryNo = mmu_itlb_lookup_vpn_asid( vma );
   1.834      }
   1.835      if( entryNo < 0 ) {
   1.836 -	return MMU_VMA_ERROR;
   1.837 +        return MMU_VMA_ERROR;
   1.838      } else {
   1.839 -	return (mmu_itlb[entryNo].ppn & mmu_itlb[entryNo].mask) | 
   1.840 -	    (vma & (~mmu_itlb[entryNo].mask));	
   1.841 +        return (mmu_itlb[entryNo].ppn & mmu_itlb[entryNo].mask) | 
   1.842 +        (vma & (~mmu_itlb[entryNo].mask));	
   1.843      }
   1.844  }
   1.845  
   1.846 @@ -894,39 +894,39 @@
   1.847      sh4addr_t target;
   1.848      /* Store queue operation */
   1.849      if( mmucr & MMUCR_AT ) {
   1.850 -	int entryNo;
   1.851 -	if( ((mmucr & MMUCR_SV) == 0) || !IS_SH4_PRIVMODE() ) {
   1.852 -	    entryNo = mmu_utlb_lookup_vpn_asid( addr );
   1.853 -	} else {
   1.854 -	    entryNo = mmu_utlb_lookup_vpn( addr );
   1.855 -	}
   1.856 -	switch(entryNo) {
   1.857 -	case -1:
   1.858 -	    MMU_TLB_WRITE_MISS_ERROR(addr);
   1.859 -	    return FALSE;
   1.860 -	case -2:
   1.861 -	    MMU_TLB_MULTI_HIT_ERROR(addr);
   1.862 -	    return FALSE;
   1.863 -	default:
   1.864 -	    if( IS_SH4_PRIVMODE() ? ((mmu_utlb[entryNo].flags & TLB_WRITABLE) == 0)
   1.865 -		: ((mmu_utlb[entryNo].flags & TLB_USERWRITABLE) != TLB_USERWRITABLE) ) {
   1.866 -		/* protection violation */
   1.867 -		MMU_TLB_WRITE_PROT_ERROR(addr);
   1.868 -		return FALSE;
   1.869 -	    }
   1.870 -	    
   1.871 -	    if( (mmu_utlb[entryNo].flags & TLB_DIRTY) == 0 ) {
   1.872 -		MMU_TLB_INITIAL_WRITE_ERROR(addr);
   1.873 -		return FALSE;
   1.874 -	    }
   1.875 -	    
   1.876 -	    /* finally generate the target address */
   1.877 -	    target = ((mmu_utlb[entryNo].ppn & mmu_utlb[entryNo].mask) | 
   1.878 -		      (addr & (~mmu_utlb[entryNo].mask))) & 0xFFFFFFE0;
   1.879 -	}
   1.880 +        int entryNo;
   1.881 +        if( ((mmucr & MMUCR_SV) == 0) || !IS_SH4_PRIVMODE() ) {
   1.882 +            entryNo = mmu_utlb_lookup_vpn_asid( addr );
   1.883 +        } else {
   1.884 +            entryNo = mmu_utlb_lookup_vpn( addr );
   1.885 +        }
   1.886 +        switch(entryNo) {
   1.887 +        case -1:
   1.888 +        MMU_TLB_WRITE_MISS_ERROR(addr);
   1.889 +        return FALSE;
   1.890 +        case -2:
   1.891 +        MMU_TLB_MULTI_HIT_ERROR(addr);
   1.892 +        return FALSE;
   1.893 +        default:
   1.894 +            if( IS_SH4_PRIVMODE() ? ((mmu_utlb[entryNo].flags & TLB_WRITABLE) == 0)
   1.895 +                    : ((mmu_utlb[entryNo].flags & TLB_USERWRITABLE) != TLB_USERWRITABLE) ) {
   1.896 +                /* protection violation */
   1.897 +                MMU_TLB_WRITE_PROT_ERROR(addr);
   1.898 +                return FALSE;
   1.899 +            }
   1.900 +
   1.901 +            if( (mmu_utlb[entryNo].flags & TLB_DIRTY) == 0 ) {
   1.902 +                MMU_TLB_INITIAL_WRITE_ERROR(addr);
   1.903 +                return FALSE;
   1.904 +            }
   1.905 +
   1.906 +            /* finally generate the target address */
   1.907 +            target = ((mmu_utlb[entryNo].ppn & mmu_utlb[entryNo].mask) | 
   1.908 +                    (addr & (~mmu_utlb[entryNo].mask))) & 0xFFFFFFE0;
   1.909 +        }
   1.910      } else {
   1.911 -	uint32_t hi = (MMIO_READ( MMU, (queue == 0 ? QACR0 : QACR1) ) & 0x1C) << 24;
   1.912 -	target = (addr&0x03FFFFE0) | hi;
   1.913 +        uint32_t hi = (MMIO_READ( MMU, (queue == 0 ? QACR0 : QACR1) ) & 0x1C) << 24;
   1.914 +        target = (addr&0x03FFFFE0) | hi;
   1.915      }
   1.916      mem_copy_to_sh4( target, src, 32 );
   1.917      return TRUE;