lxdream 0.9.1| filename | src/sh4/sh4mem.c |
| changeset | 736:a02d1475ccfd |
| prev | 598:8798c3f0bf78 |
| next | 740:dd11269ee48b |
| author | nkeynes |
| date | Mon Jul 14 07:44:42 2008 +0000 (15 years ago) |
| permissions | -rw-r--r-- |
| last change | Re-indent everything consistently Fix include guards for consistency as well |
| file | annotate | diff | log | raw |
1.1 --- a/src/sh4/sh4mem.c Tue Jan 22 10:06:41 2008 +00001.2 +++ b/src/sh4/sh4mem.c Mon Jul 14 07:44:42 2008 +00001.3 @@ -54,12 +54,12 @@1.4 #ifdef ENABLE_TRACE_IO1.5 #define TRACE_IO( str, p, r, ... ) if(io_rgn[(uint32_t)p]->trace_flag && !MMIO_NOTRACE_BYNUM((uint32_t)p,r)) \1.6 TRACE( str " [%s.%s: %s]", __VA_ARGS__, \1.7 - MMIO_NAME_BYNUM((uint32_t)p), MMIO_REGID_BYNUM((uint32_t)p, r), \1.8 - MMIO_REGDESC_BYNUM((uint32_t)p, r) )1.9 + MMIO_NAME_BYNUM((uint32_t)p), MMIO_REGID_BYNUM((uint32_t)p, r), \1.10 + MMIO_REGDESC_BYNUM((uint32_t)p, r) )1.11 #define TRACE_P4IO( str, io, r, ... ) if(io->trace_flag && !MMIO_NOTRACE_IOBYNUM(io,r)) \1.12 -TRACE( str " [%s.%s: %s]", __VA_ARGS__, \1.13 - io->id, MMIO_REGID_IOBYNUM(io, r), \1.14 - MMIO_REGDESC_IOBYNUM(io, r) )1.15 + TRACE( str " [%s.%s: %s]", __VA_ARGS__, \1.16 + io->id, MMIO_REGID_IOBYNUM(io, r), \1.17 + MMIO_REGDESC_IOBYNUM(io, r) )1.18 #else1.19 #define TRACE_IO( str, p, r, ... )1.20 #define TRACE_P4IO( str, io, r, ... )1.21 @@ -72,26 +72,26 @@1.22 {1.23 struct mmio_region *io = P4_io[(addr&0x1FFFFFFF)>>19];1.24 if( !io ) {1.25 - switch( addr & 0x1F000000 ) {1.26 - case 0x00000000: case 0x01000000: case 0x02000000: case 0x03000000:1.27 - /* Store queue - readable? */1.28 - return 0;1.29 - break;1.30 - case 0x10000000: return mmu_icache_addr_read( addr );1.31 - case 0x11000000: return mmu_icache_data_read( addr );1.32 - case 0x12000000: return mmu_itlb_addr_read( addr );1.33 - case 0x13000000: return mmu_itlb_data_read( addr );1.34 - case 0x14000000: return mmu_ocache_addr_read( addr );1.35 - case 0x15000000: return mmu_ocache_data_read( addr );1.36 - case 0x16000000: return mmu_utlb_addr_read( addr );1.37 - case 0x17000000: return mmu_utlb_data_read( addr );1.38 - default:1.39 + switch( addr & 0x1F000000 ) {1.40 + case 0x00000000: case 0x01000000: case 0x02000000: case 0x03000000:1.41 + /* Store queue - readable? */1.42 + return 0;1.43 + break;1.44 + case 0x10000000: return mmu_icache_addr_read( addr );1.45 + case 0x11000000: return mmu_icache_data_read( addr );1.46 + case 0x12000000: return mmu_itlb_addr_read( addr );1.47 + case 0x13000000: return mmu_itlb_data_read( addr );1.48 + case 0x14000000: return mmu_ocache_addr_read( addr );1.49 + case 0x15000000: return mmu_ocache_data_read( addr );1.50 + case 0x16000000: return mmu_utlb_addr_read( addr );1.51 + case 0x17000000: return mmu_utlb_data_read( addr );1.52 + default:1.53 WARN( "Attempted read from unknown or invalid P4 region: %08X", addr );1.54 - return 0;1.55 + return 0;1.56 }1.57 } else {1.58 - int32_t val = io->io_read( addr&0xFFF );1.59 - TRACE_P4IO( "Long read %08X <= %08X", io, (addr&0xFFF), val, addr );1.60 + int32_t val = io->io_read( addr&0xFFF );1.61 + TRACE_P4IO( "Long read %08X <= %08X", io, (addr&0xFFF), val, addr );1.62 return val;1.63 }1.64 }1.65 @@ -100,24 +100,24 @@1.66 {1.67 struct mmio_region *io = P4_io[(addr&0x1FFFFFFF)>>19];1.68 if( !io ) {1.69 - switch( addr & 0x1F000000 ) {1.70 - case 0x00000000: case 0x01000000: case 0x02000000: case 0x03000000:1.71 + switch( addr & 0x1F000000 ) {1.72 + case 0x00000000: case 0x01000000: case 0x02000000: case 0x03000000:1.73 /* Store queue */1.74 SH4_WRITE_STORE_QUEUE( addr, val );1.75 - break;1.76 - case 0x10000000: mmu_icache_addr_write( addr, val ); break;1.77 - case 0x11000000: mmu_icache_data_write( addr, val ); break;1.78 - case 0x12000000: mmu_itlb_addr_write( addr, val ); break;1.79 - case 0x13000000: mmu_itlb_data_write( addr, val ); break;1.80 - case 0x14000000: mmu_ocache_addr_write( addr, val ); break;1.81 - case 0x15000000: mmu_ocache_data_write( addr, val ); break;1.82 - case 0x16000000: mmu_utlb_addr_write( addr, val ); break;1.83 - case 0x17000000: mmu_utlb_data_write( addr, val ); break;1.84 - default:1.85 + break;1.86 + case 0x10000000: mmu_icache_addr_write( addr, val ); break;1.87 + case 0x11000000: mmu_icache_data_write( addr, val ); break;1.88 + case 0x12000000: mmu_itlb_addr_write( addr, val ); break;1.89 + case 0x13000000: mmu_itlb_data_write( addr, val ); break;1.90 + case 0x14000000: mmu_ocache_addr_write( addr, val ); break;1.91 + case 0x15000000: mmu_ocache_data_write( addr, val ); break;1.92 + case 0x16000000: mmu_utlb_addr_write( addr, val ); break;1.93 + case 0x17000000: mmu_utlb_data_write( addr, val ); break;1.94 + default:1.95 WARN( "Attempted write to unknown P4 region: %08X", addr );1.96 }1.97 } else {1.98 - TRACE_P4IO( "Long write %08X => %08X", io, (addr&0xFFF), val, addr );1.99 + TRACE_P4IO( "Long write %08X => %08X", io, (addr&0xFFF), val, addr );1.100 io->io_write( addr&0xFFF, val );1.101 }1.102 }1.103 @@ -127,7 +127,7 @@1.104 sh4ptr_t page;1.105 if( addr >= 0xE0000000 ) /* P4 Area, handled specially */1.106 return SIGNEXT16(sh4_read_p4( addr ));1.107 -1.108 +1.109 if( (addr&0x1F800000) == 0x04000000 ) {1.110 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);1.111 }1.112 @@ -136,7 +136,7 @@1.113 if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */1.114 if( page == NULL ) {1.115 WARN( "Attempted word read to missing page: %08X",1.116 - addr );1.117 + addr );1.118 return 0;1.119 }1.120 return SIGNEXT16(io_rgn[(uintptr_t)page]->io_read(addr&0xFFF));1.121 @@ -151,24 +151,24 @@1.122 int64_t sh4_read_quad( sh4addr_t addr )1.123 {1.124 return ((int64_t)((uint32_t)sh4_read_long(addr))) |1.125 - (((int64_t)((uint32_t)sh4_read_long(addr+4))) << 32);1.126 + (((int64_t)((uint32_t)sh4_read_long(addr+4))) << 32);1.127 }1.129 int32_t sh4_read_long( sh4addr_t addr )1.130 {1.131 sh4ptr_t page;1.132 -1.133 +1.134 CHECK_READ_WATCH(addr,4);1.136 if( addr >= 0xE0000000 ) { /* P4 Area, handled specially */1.137 return ZEROEXT32(sh4_read_p4( addr ));1.138 } else if( (addr&0x1C000000) == 0x0C000000 ) {1.139 - return ZEROEXT32(*(int32_t *)(sh4_main_ram + (addr&0x00FFFFFF)));1.140 + return ZEROEXT32(*(int32_t *)(sh4_main_ram + (addr&0x00FFFFFF)));1.141 } else if( (addr&0x1F800000) == 0x04000000 ) {1.142 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);1.143 - pvr2_render_buffer_invalidate(addr, FALSE);1.144 + pvr2_render_buffer_invalidate(addr, FALSE);1.145 } else if( (addr&0x1F800000) == 0x05000000 ) {1.146 - pvr2_render_buffer_invalidate(addr, FALSE);1.147 + pvr2_render_buffer_invalidate(addr, FALSE);1.148 }1.150 page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];1.151 @@ -195,19 +195,19 @@1.152 if( addr >= 0xE0000000 ) { /* P4 Area, handled specially */1.153 return ZEROEXT32(SIGNEXT16(sh4_read_p4( addr )));1.154 } else if( (addr&0x1C000000) == 0x0C000000 ) {1.155 - return ZEROEXT32(SIGNEXT16(*(int16_t *)(sh4_main_ram + (addr&0x00FFFFFF))));1.156 + return ZEROEXT32(SIGNEXT16(*(int16_t *)(sh4_main_ram + (addr&0x00FFFFFF))));1.157 } else if( (addr&0x1F800000) == 0x04000000 ) {1.158 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);1.159 - pvr2_render_buffer_invalidate(addr, FALSE);1.160 + pvr2_render_buffer_invalidate(addr, FALSE);1.161 } else if( (addr&0x1F800000) == 0x05000000 ) {1.162 - pvr2_render_buffer_invalidate(addr, FALSE);1.163 + pvr2_render_buffer_invalidate(addr, FALSE);1.164 }1.165 -1.166 +1.167 page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];1.168 if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */1.169 int32_t val;1.170 if( page == NULL ) {1.171 - WARN( "Attempted word read to missing page: %08X", addr );1.172 + WARN( "Attempted word read to missing page: %08X", addr );1.173 return 0;1.174 }1.175 val = SIGNEXT16(io_rgn[(uintptr_t)page]->io_read(addr&0xFFF));1.176 @@ -227,15 +227,15 @@1.177 if( addr >= 0xE0000000 ) { /* P4 Area, handled specially */1.178 return ZEROEXT32(SIGNEXT8(sh4_read_p4( addr )));1.179 } else if( (addr&0x1C000000) == 0x0C000000 ) {1.180 - return ZEROEXT32(SIGNEXT8(*(int8_t *)(sh4_main_ram + (addr&0x00FFFFFF))));1.181 + return ZEROEXT32(SIGNEXT8(*(int8_t *)(sh4_main_ram + (addr&0x00FFFFFF))));1.182 } else if( (addr&0x1F800000) == 0x04000000 ) {1.183 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);1.184 - pvr2_render_buffer_invalidate(addr, FALSE);1.185 + pvr2_render_buffer_invalidate(addr, FALSE);1.186 } else if( (addr&0x1F800000) == 0x05000000 ) {1.187 - pvr2_render_buffer_invalidate(addr, FALSE);1.188 + pvr2_render_buffer_invalidate(addr, FALSE);1.189 }1.191 -1.192 +1.193 page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];1.194 if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */1.195 int32_t val;1.196 @@ -270,16 +270,16 @@1.197 sh4_write_p4( addr, val );1.198 return;1.199 } else if( (addr&0x1C000000) == 0x0C000000 ) {1.200 - *(uint32_t *)(sh4_main_ram + (addr&0x00FFFFFF)) = val;1.201 - xlat_invalidate_long(addr);1.202 - return;1.203 + *(uint32_t *)(sh4_main_ram + (addr&0x00FFFFFF)) = val;1.204 + xlat_invalidate_long(addr);1.205 + return;1.206 } else if( (addr&0x1F800000) == 0x04000000 ||1.207 - (addr&0x1F800000) == 0x11000000 ) {1.208 - texcache_invalidate_page(addr& 0x7FFFFF);1.209 + (addr&0x1F800000) == 0x11000000 ) {1.210 + texcache_invalidate_page(addr& 0x7FFFFF);1.211 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);1.212 - pvr2_render_buffer_invalidate(addr, TRUE);1.213 + pvr2_render_buffer_invalidate(addr, TRUE);1.214 } else if( (addr&0x1F800000) == 0x05000000 ) {1.215 - pvr2_render_buffer_invalidate(addr, TRUE);1.216 + pvr2_render_buffer_invalidate(addr, TRUE);1.217 }1.219 if( (addr&0x1FFFFFFF) < 0x200000 ) {1.220 @@ -288,14 +288,14 @@1.221 return;1.222 }1.223 if( (addr&0x1F800000) == 0x00800000 )1.224 - asic_g2_write_word();1.225 + asic_g2_write_word();1.227 page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];1.228 if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */1.229 if( page == NULL ) {1.230 - if( (addr & 0x1F000000) >= 0x04000000 &&1.231 - (addr & 0x1F000000) < 0x07000000 )1.232 - return;1.233 + if( (addr & 0x1F000000) >= 0x04000000 &&1.234 + (addr & 0x1F000000) < 0x07000000 )1.235 + return;1.236 WARN( "Long write to missing page: %08X => %08X", val, addr );1.237 return;1.238 }1.239 @@ -316,16 +316,16 @@1.240 sh4_write_p4( addr, (int16_t)val );1.241 return;1.242 } else if( (addr&0x1C000000) == 0x0C000000 ) {1.243 - *(uint16_t *)(sh4_main_ram + (addr&0x00FFFFFF)) = val;1.244 - xlat_invalidate_word(addr);1.245 - return;1.246 + *(uint16_t *)(sh4_main_ram + (addr&0x00FFFFFF)) = val;1.247 + xlat_invalidate_word(addr);1.248 + return;1.249 } else if( (addr&0x1F800000) == 0x04000000 ||1.250 - (addr&0x1F800000) == 0x11000000 ) {1.251 - texcache_invalidate_page(addr& 0x7FFFFF);1.252 + (addr&0x1F800000) == 0x11000000 ) {1.253 + texcache_invalidate_page(addr& 0x7FFFFF);1.254 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);1.255 - pvr2_render_buffer_invalidate(addr, TRUE);1.256 + pvr2_render_buffer_invalidate(addr, TRUE);1.257 } else if( (addr&0x1F800000) == 0x05000000 ) {1.258 - pvr2_render_buffer_invalidate(addr, TRUE);1.259 + pvr2_render_buffer_invalidate(addr, TRUE);1.260 }1.262 if( (addr&0x1FFFFFFF) < 0x200000 ) {1.263 @@ -356,18 +356,18 @@1.264 sh4_write_p4( addr, (int8_t)val );1.265 return;1.266 } else if( (addr&0x1C000000) == 0x0C000000 ) {1.267 - *(uint8_t *)(sh4_main_ram + (addr&0x00FFFFFF)) = val;1.268 - xlat_invalidate_word(addr);1.269 - return;1.270 + *(uint8_t *)(sh4_main_ram + (addr&0x00FFFFFF)) = val;1.271 + xlat_invalidate_word(addr);1.272 + return;1.273 } else if( (addr&0x1F800000) == 0x04000000 ||1.274 - (addr&0x1F800000) == 0x11000000 ) {1.275 - texcache_invalidate_page(addr& 0x7FFFFF);1.276 + (addr&0x1F800000) == 0x11000000 ) {1.277 + texcache_invalidate_page(addr& 0x7FFFFF);1.278 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);1.279 - pvr2_render_buffer_invalidate(addr, TRUE);1.280 + pvr2_render_buffer_invalidate(addr, TRUE);1.281 } else if( (addr&0x1F800000) == 0x05000000 ) {1.282 - pvr2_render_buffer_invalidate(addr, TRUE);1.283 + pvr2_render_buffer_invalidate(addr, TRUE);1.284 }1.285 -1.286 +1.287 if( (addr&0x1FFFFFFF) < 0x200000 ) {1.288 WARN( "Attempted write to read-only memory: %08X => %08X", val, addr);1.289 sh4_stop();1.290 @@ -393,33 +393,33 @@1.291 */1.292 void mem_copy_from_sh4( sh4ptr_t dest, sh4addr_t srcaddr, size_t count ) {1.293 if( srcaddr >= 0x04000000 && srcaddr < 0x05000000 ) {1.294 - pvr2_vram64_read( dest, srcaddr, count );1.295 + pvr2_vram64_read( dest, srcaddr, count );1.296 } else {1.297 - sh4ptr_t src = mem_get_region(srcaddr);1.298 - if( src == NULL ) {1.299 - WARN( "Attempted block read from unknown address %08X", srcaddr );1.300 - } else {1.301 - memcpy( dest, src, count );1.302 - }1.303 + sh4ptr_t src = mem_get_region(srcaddr);1.304 + if( src == NULL ) {1.305 + WARN( "Attempted block read from unknown address %08X", srcaddr );1.306 + } else {1.307 + memcpy( dest, src, count );1.308 + }1.309 }1.310 }1.312 void mem_copy_to_sh4( sh4addr_t destaddr, sh4ptr_t src, size_t count ) {1.313 if( destaddr >= 0x10000000 && destaddr < 0x14000000 ) {1.314 - pvr2_dma_write( destaddr, src, count );1.315 - return;1.316 + pvr2_dma_write( destaddr, src, count );1.317 + return;1.318 } else if( (destaddr & 0x1F800000) == 0x05000000 ) {1.319 - pvr2_render_buffer_invalidate( destaddr, TRUE );1.320 + pvr2_render_buffer_invalidate( destaddr, TRUE );1.321 } else if( (destaddr & 0x1F800000) == 0x04000000 ) {1.322 - pvr2_vram64_write( destaddr, src, count );1.323 - return;1.324 + pvr2_vram64_write( destaddr, src, count );1.325 + return;1.326 }1.327 sh4ptr_t dest = mem_get_region(destaddr);1.328 if( dest == NULL )1.329 - WARN( "Attempted block write to unknown address %08X", destaddr );1.330 + WARN( "Attempted block write to unknown address %08X", destaddr );1.331 else {1.332 - xlat_invalidate_block( destaddr, count );1.333 - memcpy( dest, src, count );1.334 + xlat_invalidate_block( destaddr, count );1.335 + memcpy( dest, src, count );1.336 }1.337 }1.339 @@ -427,7 +427,7 @@1.340 {1.341 sh4addr_t addr = mmu_vma_to_phys_read(vma);1.342 if( addr == MMU_VMA_ERROR ) {1.343 - return NULL;1.344 + return NULL;1.345 }1.347 sh4ptr_t page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
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