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lxdream.org :: lxdream/src/asic.c :: diff
lxdream 0.9.1
released Jun 29
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filename src/asic.c
changeset 158:a0a82246b44e
prev155:be61d1a20937
next163:cf6b5e87f58d
author nkeynes
date Thu Jun 15 10:32:42 2006 +0000 (16 years ago)
permissions -rw-r--r--
last change Fix IDE DMA to actually work for real.
Implement the mystery packet 0x71 by cribbing a block of data from the dc.
file annotate diff log raw
1.1 --- a/src/asic.c Wed May 24 11:50:19 2006 +0000
1.2 +++ b/src/asic.c Thu Jun 15 10:32:42 2006 +0000
1.3 @@ -1,5 +1,5 @@
1.4 /**
1.5 - * $Id: asic.c,v 1.15 2006-05-24 11:50:19 nkeynes Exp $
1.6 + * $Id: asic.c,v 1.16 2006-06-15 10:32:38 nkeynes Exp $
1.7 *
1.8 * Support for the miscellaneous ASIC functions (Primarily event multiplexing,
1.9 * and DMA).
1.10 @@ -167,20 +167,19 @@
1.11
1.12 void asic_ide_dma_transfer( )
1.13 {
1.14 - if( MMIO_READ( EXTDMA, IDEDMACTL2 ) == 1 &&
1.15 - MMIO_READ( EXTDMA, IDEDMACTL1 ) == 0 ) {
1.16 - uint32_t addr = MMIO_READ( EXTDMA, IDEDMASH4 );
1.17 - uint32_t length = MMIO_READ( EXTDMA, IDEDMASIZ );
1.18 - int dir = MMIO_READ( EXTDMA, IDEDMADIR );
1.19 -
1.20 - uint32_t xfer = ide_read_data_dma( addr, length );
1.21 - if( xfer != 0 ) {
1.22 - MMIO_WRITE( EXTDMA, IDEDMASH4, addr + xfer );
1.23 - MMIO_WRITE( EXTDMA, IDEDMASIZ, length - xfer );
1.24 - if( xfer == length ) {
1.25 - MMIO_WRITE( EXTDMA, IDEDMACTL2, 0 );
1.26 - asic_event( EVENT_IDE_DMA );
1.27 - }
1.28 + if( MMIO_READ( EXTDMA, IDEDMACTL2 ) == 1 ) {
1.29 + if( MMIO_READ( EXTDMA, IDEDMACTL1 ) == 1 ) {
1.30 + MMIO_WRITE( EXTDMA, IDEDMATXSIZ, 0 );
1.31 +
1.32 + uint32_t addr = MMIO_READ( EXTDMA, IDEDMASH4 );
1.33 + uint32_t length = MMIO_READ( EXTDMA, IDEDMASIZ );
1.34 + int dir = MMIO_READ( EXTDMA, IDEDMADIR );
1.35 +
1.36 + uint32_t xfer = ide_read_data_dma( addr, length );
1.37 + MMIO_WRITE( EXTDMA, IDEDMATXSIZ, xfer );
1.38 + MMIO_WRITE( EXTDMA, IDEDMACTL2, 0 );
1.39 + } else { /* 0 */
1.40 + MMIO_WRITE( EXTDMA, IDEDMACTL2, 0 );
1.41 }
1.42 }
1.43
1.44 @@ -221,6 +220,9 @@
1.45 asic_event( EVENT_PVR_DMA );
1.46 }
1.47 break;
1.48 + case PVRDMADEST: case PVRDMACNT: case MAPLE_DMA:
1.49 + MMIO_WRITE( ASIC, reg, val );
1.50 + break;
1.51 default:
1.52 MMIO_WRITE( ASIC, reg, val );
1.53 WARN( "Write to ASIC (%03X <= %08X) [%s: %s]",
1.54 @@ -249,6 +251,7 @@
1.55 case IRQC0:
1.56 case IRQC1:
1.57 case IRQC2:
1.58 + case MAPLE_STATE:
1.59 val = MMIO_READ(ASIC, reg);
1.60 // WARN( "Read from ASIC (%03X => %08X) [%s: %s]",
1.61 // reg, val, MMIO_REGID(ASIC,reg), MMIO_REGDESC(ASIC,reg) );
1.62 @@ -266,7 +269,7 @@
1.63
1.64 MMIO_REGION_WRITE_FN( EXTDMA, reg, val )
1.65 {
1.66 - WARN( "EXTDMA write %08X <= %08X", reg, val );
1.67 + // WARN( "EXTDMA write %08X <= %08X", reg, val );
1.68
1.69 switch( reg ) {
1.70 case IDEALTSTATUS: /* Device control */
1.71 @@ -319,20 +322,22 @@
1.72 {
1.73 uint32_t val;
1.74 switch( reg ) {
1.75 - case IDEALTSTATUS: return idereg.status;
1.76 - case IDEDATA: return ide_read_data_pio( );
1.77 - case IDEFEAT: return idereg.error;
1.78 - case IDECOUNT:return idereg.count;
1.79 - case IDELBA0: return idereg.disc;
1.80 - case IDELBA1: return idereg.lba1;
1.81 - case IDELBA2: return idereg.lba2;
1.82 - case IDEDEV: return idereg.device;
1.83 - case IDECMD:
1.84 - return ide_read_status();
1.85 - default:
1.86 - val = MMIO_READ( EXTDMA, reg );
1.87 - //DEBUG( "EXTDMA read %08X => %08X", reg, val );
1.88 - return val;
1.89 + case IDEALTSTATUS:
1.90 + val = idereg.status;
1.91 + return val;
1.92 + case IDEDATA: return ide_read_data_pio( );
1.93 + case IDEFEAT: return idereg.error;
1.94 + case IDECOUNT:return idereg.count;
1.95 + case IDELBA0: return idereg.disc;
1.96 + case IDELBA1: return idereg.lba1;
1.97 + case IDELBA2: return idereg.lba2;
1.98 + case IDEDEV: return idereg.device;
1.99 + case IDECMD:
1.100 + val = ide_read_status();
1.101 + return val;
1.102 + default:
1.103 + val = MMIO_READ( EXTDMA, reg );
1.104 + return val;
1.105 }
1.106 }
1.107
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