1.1 --- a/src/pvr2/pvr2.c	Tue Sep 11 01:05:05 2007 +0000
     1.2 +++ b/src/pvr2/pvr2.c	Tue Oct 09 08:48:28 2007 +0000
     1.3 @@ -1,5 +1,5 @@
     1.4  /**
     1.5 - * $Id: pvr2.c,v 1.45 2007-09-11 01:05:05 nkeynes Exp $
     1.6 + * $Id: pvr2.c,v 1.46 2007-10-09 08:48:28 nkeynes Exp $
     1.7   *
     1.8   * PVR2 (Video) Core module implementation and MMIO registers.
     1.9   *
    1.10 @@ -688,7 +688,7 @@
    1.11  
    1.12  void mmio_region_PVR2TA_write( uint32_t reg, uint32_t val )
    1.13  {
    1.14 -    pvr2_ta_write( (char *)&val, sizeof(uint32_t) );
    1.15 +    pvr2_ta_write( (unsigned char *)&val, sizeof(uint32_t) );
    1.16  }
    1.17  
    1.18  /**
    1.19 @@ -728,7 +728,7 @@
    1.20      uint32_t render_mode = MMIO_READ( PVR2, RENDER_MODE );
    1.21      uint32_t render_scale = MMIO_READ( PVR2, RENDER_SCALER );
    1.22      uint32_t render_stride = MMIO_READ( PVR2, RENDER_SIZE ) << 3;
    1.23 -    gboolean render_to_tex;
    1.24 +
    1.25      if( render_addr & 0x01000000 ) { /* vram64 */
    1.26  	render_addr = (render_addr & 0x00FFFFFF) + PVR2_RAM_BASE_INT;
    1.27      } else { /* vram32 */
    1.28 @@ -757,7 +757,7 @@
    1.29  		width*height ) {
    1.30  		pvr2_render_buffer_copy_to_sh4( render_buffers[i] );
    1.31  	    }
    1.32 -	    render_buffers[i]->address == -1;
    1.33 +	    render_buffers[i]->address = -1;
    1.34  	}
    1.35      }
    1.36  
    1.37 @@ -812,7 +812,6 @@
    1.38      address = address & 0x1FFFFFFF;
    1.39      for( i=0; i<render_buffer_count; i++ ) {
    1.40  	uint32_t bufaddr = render_buffers[i]->address;
    1.41 -	uint32_t size = render_buffers[i]->size;
    1.42  	if( bufaddr != -1 && bufaddr <= address && 
    1.43  	    (bufaddr + render_buffers[i]->size) > address ) {
    1.44  	    if( !render_buffers[i]->flushed ) {