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lxdream 0.9.1
released Jun 29
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filename test/testspu.c
changeset 278:a66aaa522d31
next812:8cc61d5ea1f8
author nkeynes
date Sun Jan 14 02:53:11 2007 +0000 (13 years ago)
permissions -rw-r--r--
last change Initial (non-working) spu dma test case
file annotate diff log raw
1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/test/testspu.c Sun Jan 14 02:53:11 2007 +0000
1.3 @@ -0,0 +1,137 @@
1.4 +
1.5 +#include <stdlib.h>
1.6 +#include "asic.h"
1.7 +#include "lib.h"
1.8 +#include "testdata.h"
1.9 +
1.10 +#define SPUBASE 0xA05F7800
1.11 +#define SPUBASERAM 0x00800000
1.12 +#define SPUWAIT (SPUBASE+0x90)
1.13 +#define SPUMAGIC (SPUBASE+0xBC)
1.14 +
1.15 +
1.16 +#define SPUDMAEXT(x) (SPUBASE+(0x20*(x)))
1.17 +#define SPUDMAHOST(x) (SPUBASE+(0x20*(x))+0x04)
1.18 +#define SPUDMASIZE(x) (SPUBASE+(0x20*(x))+0x08)
1.19 +#define SPUDMADIR(x) (SPUBASE+(0x20*(x))+0x0C)
1.20 +#define SPUDMAMODE(x) (SPUBASE+(0x20*(x))+0x10)
1.21 +#define SPUDMACTL1(x) (SPUBASE+(0x20*(x))+0x14)
1.22 +#define SPUDMACTL2(x) (SPUBASE+(0x20*(x))+0x18)
1.23 +#define SPUDMASTOP(x) (SPUBASE+(0x20*(x))+0x1C)
1.24 +
1.25 +void dump_spu_regs()
1.26 +{
1.27 + fwrite_dump( stderr, (char *)(0xA05F7800), 0x100 );
1.28 +}
1.29 +
1.30 +int dma_to_spu( int chan, uint32_t target, char *data, uint32_t size )
1.31 +{
1.32 + long_write( SPUWAIT, 0 );
1.33 + long_write( SPUMAGIC, 0x4659404f );
1.34 + long_write( SPUDMACTL1(chan), 0 );
1.35 + long_write( SPUDMACTL2(chan), 0 );
1.36 + long_write( SPUDMAHOST(chan), ((uint32_t)data)&0x1FFFFFE0 );
1.37 + long_write( SPUDMASIZE(chan), size | 0x80000000 );
1.38 + long_write( SPUDMAEXT(chan), target );
1.39 + long_write( SPUDMADIR(chan), 0 );
1.40 + long_write( SPUDMAMODE(chan), 0 );
1.41 +
1.42 + long_write( SPUDMACTL1(chan), 1 );
1.43 + long_write( SPUDMACTL2(chan), 1 );
1.44 + if( asic_wait( EVENT_SPU_DMA0 + chan ) != 0 ) {
1.45 + fprintf( stderr, "Timeout waiting for DMA event\n" );
1.46 + dump_spu_regs();
1.47 + return -1;
1.48 + }
1.49 + return 0;
1.50 +}
1.51 +
1.52 +int dma_from_spu( int chan, char *data, uint32_t src, uint32_t size )
1.53 +{
1.54 + long_write( SPUWAIT, 0 );
1.55 + long_write( SPUMAGIC, 0x4659404f );
1.56 + long_write( SPUDMACTL1(chan), 0 );
1.57 + long_write( SPUDMACTL2(chan), 0 );
1.58 + long_write( SPUDMAHOST(chan), ((uint32_t)data)&0x1FFFFFE0 );
1.59 + long_write( SPUDMASIZE(chan), size | 0x80000000 );
1.60 + long_write( SPUDMAEXT(chan), src );
1.61 + long_write( SPUDMADIR(chan), 1 );
1.62 + long_write( SPUDMAMODE(chan), 5 );
1.63 +
1.64 + long_write( SPUDMACTL1(chan), 1 );
1.65 + long_write( SPUDMACTL2(chan), 1 );
1.66 + if( asic_wait( EVENT_SPU_DMA0 + chan ) != 0 ) {
1.67 + fprintf( stderr, "Timeout waiting for DMA event\n" );
1.68 + dump_spu_regs();
1.69 + return -1;
1.70 + }
1.71 + return 0;
1.72 +}
1.73 +
1.74 +#define SPUTARGETADDR (SPUBASERAM+0x10000)
1.75 +#define SPUTARGET ((char *)(SPUTARGETADDR))
1.76 +
1.77 +int test_spu_dma_channel( int chan )
1.78 +{
1.79 + char sampledata1[256+32];
1.80 + char sampledata2[256+32];
1.81 + char resultdata[256+32];
1.82 +
1.83 + int i;
1.84 + char *p1 = DMA_ALIGN(sampledata1), *p2 = DMA_ALIGN(sampledata2);
1.85 + char *r = DMA_ALIGN(resultdata);
1.86 +
1.87 + for( i=0; i<256; i++ ) {
1.88 + p1[i] = (char)(i*i);
1.89 + p2[i] = 256 - i;
1.90 + }
1.91 +
1.92 + if( dma_to_spu( chan, SPUTARGETADDR, p1, 256 ) != 0 ) {
1.93 + return -1;
1.94 + }
1.95 +
1.96 + if( memcmp( p1, SPUTARGET, 256 ) != 0 ) {
1.97 + fprintf( stderr, "First data mismatch:\n" );
1.98 + fwrite_diff( stderr, p1, 256, SPUTARGET, 256 );
1.99 + return -1;
1.100 + }
1.101 +
1.102 + if( dma_to_spu( chan, SPUTARGETADDR, p2, 256 ) != 0 ) {
1.103 + return -1;
1.104 + }
1.105 +
1.106 + if( memcmp( p2, SPUTARGET, 256 ) != 0 ) {
1.107 + fprintf( stderr, "Second data mismatch:\n" );
1.108 + fwrite_diff( stderr, p2, 256, SPUTARGET, 256 );
1.109 + return -1;
1.110 + }
1.111 +
1.112 + memset( r, 0, 256 );
1.113 + if( dma_from_spu( chan, r, SPUTARGETADDR, 256 ) != 0 ) {
1.114 + return -1;
1.115 + }
1.116 +
1.117 + if( memcmp( p2, r, 256 ) != 0 ) {
1.118 + fprintf( stderr, "Read data mismatch:\n" );
1.119 + fwrite_diff( stderr, p2, 256, r, 256 );
1.120 + return -1;
1.121 + }
1.122 +}
1.123 +
1.124 +
1.125 +int test_spu_dma()
1.126 +{
1.127 + int i;
1.128 + for( i=0; i<4; i++ ) {
1.129 + if( test_spu_dma_channel(i) != 0 ) {
1.130 + return -1;
1.131 + }
1.132 + }
1.133 +}
1.134 +
1.135 +test_func_t tests[] = { test_spu_dma, NULL };
1.136 +
1.137 +int main()
1.138 +{
1.139 + return run_tests(tests);
1.140 +}
.