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lxdream.org :: lxdream/src/aica/armmem.c :: diff
lxdream 0.9.1
released Jun 29
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filename src/aica/armmem.c
changeset 66:2ec5b6eb75e5
prev40:852ee31ace0d
next431:248dd77a9e44
author nkeynes
date Mon Jan 15 08:30:50 2007 +0000 (17 years ago)
permissions -rw-r--r--
last change Commit testyuv WIP
file annotate diff log raw
1.1 --- a/src/aica/armmem.c Mon Dec 26 10:48:20 2005 +0000
1.2 +++ b/src/aica/armmem.c Mon Jan 15 08:30:50 2007 +0000
1.3 @@ -1,5 +1,5 @@
1.4 /**
1.5 - * $Id: armmem.c,v 1.6 2005-12-26 10:48:20 nkeynes Exp $
1.6 + * $Id: armmem.c,v 1.7 2006-01-10 13:56:54 nkeynes Exp $
1.7 *
1.8 * Implements the ARM's memory map.
1.9 *
1.10 @@ -19,6 +19,7 @@
1.11 #include <stdlib.h>
1.12 #include "dream.h"
1.13 #include "mem.h"
1.14 +#include "aica.h"
1.15
1.16 char *arm_mem = NULL;
1.17 char *arm_mem_scratch = NULL;
1.18 @@ -38,13 +39,20 @@
1.19 return *(int32_t *)(arm_mem + addr);
1.20 /* Main sound ram */
1.21 } else {
1.22 + uint32_t val;
1.23 switch( addr & 0xFFFFF000 ) {
1.24 case 0x00800000:
1.25 - return mmio_region_AICA0_read(addr);
1.26 + val = mmio_region_AICA0_read(addr&0x0FFF);
1.27 + // DEBUG( "ARM long read from %08X => %08X", addr, val );
1.28 + return val;
1.29 case 0x00801000:
1.30 - return mmio_region_AICA1_read(addr);
1.31 + val = mmio_region_AICA1_read(addr&0x0FFF);
1.32 + // DEBUG( "ARM long read from %08X => %08X", addr, val );
1.33 + return val;
1.34 case 0x00802000:
1.35 - return mmio_region_AICA2_read(addr);
1.36 + val = mmio_region_AICA2_read(addr&0x0FFF);
1.37 + // DEBUG( "ARM long read from %08X => %08X", addr, val );
1.38 + return val;
1.39 case 0x00803000:
1.40 case 0x00804000:
1.41 return *(int32_t *)(arm_mem_scratch + addr - 0x00803000);
1.42 @@ -72,13 +80,16 @@
1.43 } else {
1.44 switch( addr & 0xFFFFF000 ) {
1.45 case 0x00800000:
1.46 - mmio_region_AICA0_write(addr, value);
1.47 + // DEBUG( "ARM long write to %08X <= %08X", addr, value );
1.48 + mmio_region_AICA0_write(addr&0x0FFF, value);
1.49 break;
1.50 case 0x00801000:
1.51 - mmio_region_AICA1_write(addr, value);
1.52 + // DEBUG( "ARM long write to %08X <= %08X", addr, value );
1.53 + mmio_region_AICA1_write(addr&0x0FFF, value);
1.54 break;
1.55 case 0x00802000:
1.56 - mmio_region_AICA2_write(addr, value);
1.57 + // DEBUG( "ARM long write to %08X <= %08X", addr, value );
1.58 + mmio_region_AICA2_write(addr&0x0FFF, value);
1.59 break;
1.60 case 0x00803000:
1.61 case 0x00804000:
1.62 @@ -93,21 +104,42 @@
1.63 return 0;
1.64 }
1.65
1.66 +uint32_t arm_combine_byte( uint32_t addr, uint32_t val, uint8_t byte )
1.67 +{
1.68 + switch( addr & 0x03 ) {
1.69 + case 0:
1.70 + return (val & 0xFFFFFF00) | byte;
1.71 + case 1:
1.72 + return (val & 0xFFFF00FF) | (byte<<8);
1.73 + case 2:
1.74 + return (val & 0xFF00FFFF) | (byte<<16);
1.75 + case 3:
1.76 + return (val & 0x00FFFFFF) | (byte<<24);
1.77 + }
1.78 +}
1.79 +
1.80 void arm_write_byte( uint32_t addr, uint32_t value )
1.81 {
1.82 if( addr < 0x00200000 ) {
1.83 /* Main sound ram */
1.84 *(uint8_t *)(arm_mem + addr) = (uint8_t)value;
1.85 } else {
1.86 + uint32_t tmp;
1.87 switch( addr & 0xFFFFF000 ) {
1.88 case 0x00800000:
1.89 - mmio_region_AICA0_write(addr, value);
1.90 + tmp = MMIO_READ( AICA0, addr & 0x0FFC );
1.91 + value = arm_combine_byte( addr, tmp, value );
1.92 + mmio_region_AICA0_write(addr&0x0FFC, value);
1.93 break;
1.94 case 0x00801000:
1.95 - mmio_region_AICA1_write(addr, value);
1.96 + tmp = MMIO_READ( AICA1, addr & 0x0FFC );
1.97 + value = arm_combine_byte( addr, tmp, value );
1.98 + mmio_region_AICA1_write(addr&0x0FFC, value);
1.99 break;
1.100 case 0x00802000:
1.101 - mmio_region_AICA2_write(addr, value);
1.102 + tmp = MMIO_READ( AICA2, addr & 0x0FFC );
1.103 + value = arm_combine_byte( addr, tmp, value );
1.104 + mmio_region_AICA2_write(addr&0x0FFC, value);
1.105 break;
1.106 case 0x00803000:
1.107 case 0x00804000:
.