1.1 --- a/src/sh4/sh4dasm.c Wed Jan 17 21:27:20 2007 +0000
1.2 +++ b/src/sh4/sh4dasm.c Tue Aug 28 08:46:14 2007 +0000
1.5 - * $Id: sh4dasm.c,v 1.10 2007-01-17 21:27:20 nkeynes Exp $
1.6 + * $Id: sh4dasm.c,v 1.11 2007-08-23 12:33:27 nkeynes Exp $
1.8 * SH4 CPU definition and disassembly functions
1.11 uint32_t sh4_disasm_instruction( uint32_t pc, char *buf, int len, char *opcode )
1.13 uint16_t ir = sh4_read_word(pc);
1.16 +#define UNDEF(ir) snprintf( buf, len, "???? " );
1.17 #define RN(ir) ((ir&0x0F00)>>8)
1.18 #define RN_BANK(ir) ((ir&0x0070)>>4)
1.19 #define RM(ir) ((ir&0x00F0)>>4)
1.20 @@ -66,316 +67,1485 @@
1.22 sprintf( opcode, "%02X %02X", ir&0xFF, ir>>8 );
1.24 - switch( (ir&0xF000)>>12 ) {
1.25 - case 0: /* 0000nnnnmmmmxxxx */
1.26 - switch( ir&0x000F ) {
1.28 - switch( (ir&0x00F0)>>4 ) {
1.29 - case 0: snprintf( buf, len, "STC SR, R%d", RN(ir) ); break;
1.30 - case 1: snprintf( buf, len, "STC GBR, R%d", RN(ir) ); break;
1.31 - case 2: snprintf( buf, len, "STC VBR, R%d", RN(ir) ); break;
1.32 - case 3: snprintf( buf, len, "STC SSR, R%d", RN(ir) ); break;
1.33 - case 4: snprintf( buf, len, "STC SPC, R%d", RN(ir) ); break;
1.34 - case 8: case 9: case 10: case 11: case 12: case 13: case 14:
1.35 - case 15:snprintf( buf, len, "STC R%d_bank, R%d", RN_BANK(ir), RN(ir) ); break;
1.36 - default: UNIMP(ir);
1.40 - switch( (ir&0x00F0)>>4 ) {
1.41 - case 0: snprintf( buf, len, "BSRF R%d", RN(ir) ); break;
1.42 - case 2: snprintf( buf, len, "BRAF R%d", RN(ir) ); break;
1.43 - case 8: snprintf( buf, len, "PREF [R%d]", RN(ir) ); break;
1.44 - case 9: snprintf( buf, len, "OCBI [R%d]", RN(ir) ); break;
1.45 - case 10:snprintf( buf, len, "OCBP [R%d]", RN(ir) ); break;
1.46 - case 11:snprintf( buf, len, "OCBWB [R%d]", RN(ir) ); break;
1.47 - case 12:snprintf( buf, len, "MOVCA.L R0, [R%d]", RN(ir) ); break;
1.48 - default: UNIMP(ir);
1.51 - case 4: snprintf( buf, len, "MOV.B R%d, [R0+R%d]", RM(ir), RN(ir) ); break;
1.52 - case 5: snprintf( buf, len, "MOV.W R%d, [R0+R%d]", RM(ir), RN(ir) ); break;
1.53 - case 6: snprintf( buf, len, "MOV.L R%d, [R0+R%d]", RM(ir), RN(ir) ); break;
1.54 - case 7: snprintf( buf, len, "MUL.L R%d, R%d", RM(ir), RN(ir) ); break;
1.56 - switch( (ir&0x0FF0)>>4 ) {
1.57 - case 0: snprintf( buf, len, "CLRT " ); break;
1.58 - case 1: snprintf( buf, len, "SETT " ); break;
1.59 - case 2: snprintf( buf, len, "CLRMAC " ); break;
1.60 - case 3: snprintf( buf, len, "LDTLB " ); break;
1.61 - case 4: snprintf( buf, len, "CLRS " ); break;
1.62 - case 5: snprintf( buf, len, "SETS " ); break;
1.63 - default: UNIMP(ir);
1.67 - if( (ir&0x00F0) == 0x20 )
1.68 - snprintf( buf, len, "MOVT R%d", RN(ir) );
1.69 - else if( ir == 0x0019 )
1.70 - snprintf( buf, len, "DIV0U " );
1.71 - else if( ir == 0x0009 )
1.72 - snprintf( buf, len, "NOP " );
1.76 - switch( (ir&0x00F0) >> 4 ) {
1.77 - case 0: snprintf( buf, len, "STS MACH, R%d", RN(ir) ); break;
1.78 - case 1: snprintf( buf, len, "STS MACL, R%d", RN(ir) ); break;
1.79 - case 2: snprintf( buf, len, "STS PR, R%d", RN(ir) ); break;
1.80 - case 3: snprintf( buf, len, "STC SGR, R%d", RN(ir) ); break;
1.81 - case 5: snprintf( buf, len, "STS FPUL, R%d", RN(ir) ); break;
1.82 - case 6: snprintf( buf, len, "STS FPSCR, R%d", RN(ir) ); break;
1.83 - case 15:snprintf( buf, len, "STC DBR, R%d", RN(ir) ); break;
1.84 - default: UNIMP(ir);
1.88 - switch( (ir&0x0FF0)>>4 ) {
1.89 - case 0: snprintf( buf, len, "RTS " ); break;
1.90 - case 1: snprintf( buf, len, "SLEEP " ); break;
1.91 - case 2: snprintf( buf, len, "RTE " ); break;
1.92 - default:UNIMP(ir);
1.95 - case 12:snprintf( buf, len, "MOV.B [R0+R%d], R%d", RM(ir), RN(ir) ); break;
1.96 - case 13:snprintf( buf, len, "MOV.W [R0+R%d], R%d", RM(ir), RN(ir) ); break;
1.97 - case 14:snprintf( buf, len, "MOV.L [R0+R%d], R%d", RM(ir), RN(ir) ); break;
1.98 - case 15:snprintf( buf, len, "MAC.L [R%d++], [R%d++]", RM(ir), RN(ir) ); break;
1.99 - default: UNIMP(ir);
1.102 - case 1: /* 0001nnnnmmmmdddd */
1.103 - snprintf( buf, len, "MOV.L R%d, [R%d%+d]", RM(ir), RN(ir), DISP4(ir)<<2 ); break;
1.104 - case 2: /* 0010nnnnmmmmxxxx */
1.105 - switch( ir&0x000F ) {
1.106 - case 0: snprintf( buf, len, "MOV.B R%d, [R%d]", RM(ir), RN(ir) ); break;
1.107 - case 1: snprintf( buf, len, "MOV.W R%d, [R%d]", RM(ir), RN(ir) ); break;
1.108 - case 2: snprintf( buf, len, "MOV.L R%d, [R%d]", RM(ir), RN(ir) ); break;
1.109 - case 3: UNIMP(ir); break;
1.110 - case 4: snprintf( buf, len, "MOV.B R%d, [--R%d]", RM(ir), RN(ir) ); break;
1.111 - case 5: snprintf( buf, len, "MOV.W R%d, [--R%d]", RM(ir), RN(ir) ); break;
1.112 - case 6: snprintf( buf, len, "MOV.L R%d, [--R%d]", RM(ir), RN(ir) ); break;
1.113 - case 7: snprintf( buf, len, "DIV0S R%d, R%d", RM(ir), RN(ir) ); break;
1.114 - case 8: snprintf( buf, len, "TST R%d, R%d", RM(ir), RN(ir) ); break;
1.115 - case 9: snprintf( buf, len, "AND R%d, R%d", RM(ir), RN(ir) ); break;
1.116 - case 10:snprintf( buf, len, "XOR R%d, R%d", RM(ir), RN(ir) ); break;
1.117 - case 11:snprintf( buf, len, "OR R%d, R%d", RM(ir), RN(ir) ); break;
1.118 - case 12:snprintf( buf, len, "CMP/STR R%d, R%d", RM(ir), RN(ir) ); break;
1.119 - case 13:snprintf( buf, len, "XTRCT R%d, R%d", RM(ir), RN(ir) ); break;
1.120 - case 14:snprintf( buf, len, "MULU.W R%d, R%d", RM(ir), RN(ir) ); break;
1.121 - case 15:snprintf( buf, len, "MULS.W R%d, R%d", RM(ir), RN(ir) ); break;
1.124 - case 3: /* 0011nnnnmmmmxxxx */
1.125 - switch( ir&0x000F ) {
1.126 - case 0: snprintf( buf, len, "CMP/EQ R%d, R%d", RM(ir), RN(ir) ); break;
1.127 - case 2: snprintf( buf, len, "CMP/HS R%d, R%d", RM(ir), RN(ir) ); break;
1.128 - case 3: snprintf( buf, len, "CMP/GE R%d, R%d", RM(ir), RN(ir) ); break;
1.129 - case 4: snprintf( buf, len, "DIV1 R%d, R%d", RM(ir), RN(ir) ); break;
1.130 - case 5: snprintf( buf, len, "DMULU.L R%d, R%d", RM(ir), RN(ir) ); break;
1.131 - case 6: snprintf( buf, len, "CMP/HI R%d, R%d", RM(ir), RN(ir) ); break;
1.132 - case 7: snprintf( buf, len, "CMP/GT R%d, R%d", RM(ir), RN(ir) ); break;
1.133 - case 8: snprintf( buf, len, "SUB R%d, R%d", RM(ir), RN(ir) ); break;
1.134 - case 10:snprintf( buf, len, "SUBC R%d, R%d", RM(ir), RN(ir) ); break;
1.135 - case 11:snprintf( buf, len, "SUBV R%d, R%d", RM(ir), RN(ir) ); break;
1.136 - case 12:snprintf( buf, len, "ADD R%d, R%d", RM(ir), RN(ir) ); break;
1.137 - case 13:snprintf( buf, len, "DMULS.L R%d, R%d", RM(ir), RN(ir) ); break;
1.138 - case 14:snprintf( buf, len, "ADDC R%d, R%d", RM(ir), RN(ir) ); break;
1.139 - case 15:snprintf( buf, len, "ADDV R%d, R%d", RM(ir), RN(ir) ); break;
1.140 - default: UNIMP(ir);
1.143 - case 4: /* 0100nnnnxxxxxxxx */
1.144 - switch( ir&0x00FF ) {
1.145 - case 0x00: snprintf( buf, len, "SHLL R%d", RN(ir) ); break;
1.146 - case 0x01: snprintf( buf, len, "SHLR R%d", RN(ir) ); break;
1.147 - case 0x02: snprintf( buf, len, "STS.L MACH, [--R%d]", RN(ir) ); break;
1.148 - case 0x03: snprintf( buf, len, "STC.L SR, [--R%d]", RN(ir) ); break;
1.149 - case 0x04: snprintf( buf, len, "ROTL R%d", RN(ir) ); break;
1.150 - case 0x05: snprintf( buf, len, "ROTR R%d", RN(ir) ); break;
1.151 - case 0x06: snprintf( buf, len, "LDS.L [R%d++], MACH", RN(ir) ); break;
1.152 - case 0x07: snprintf( buf, len, "LDC.L [R%d++], SR", RN(ir) ); break;
1.153 - case 0x08: snprintf( buf, len, "SHLL2 R%d", RN(ir) ); break;
1.154 - case 0x09: snprintf( buf, len, "SHLR2 R%d", RN(ir) ); break;
1.155 - case 0x0A: snprintf( buf, len, "LDS R%d, MACH", RN(ir) ); break;
1.156 - case 0x0B: snprintf( buf, len, "JSR [R%d]", RN(ir) ); break;
1.157 - case 0x0E: snprintf( buf, len, "LDC R%d, SR", RN(ir) ); break;
1.158 - case 0x10: snprintf( buf, len, "DT R%d", RN(ir) ); break;
1.159 - case 0x11: snprintf( buf, len, "CMP/PZ R%d", RN(ir) ); break;
1.160 - case 0x12: snprintf( buf, len, "STS.L MACL, [--R%d]", RN(ir) ); break;
1.161 - case 0x13: snprintf( buf, len, "STC.L GBR, [--R%d]", RN(ir) ); break;
1.162 - case 0x15: snprintf( buf, len, "CMP/PL R%d", RN(ir) ); break;
1.163 - case 0x16: snprintf( buf, len, "LDS.L [R%d++], MACL", RN(ir) ); break;
1.164 - case 0x17: snprintf( buf, len, "LDC.L [R%d++], GBR", RN(ir) ); break;
1.165 - case 0x18: snprintf( buf, len, "SHLL8 R%d", RN(ir) ); break;
1.166 - case 0x19: snprintf( buf, len, "SHLR8 R%d", RN(ir) ); break;
1.167 - case 0x1A: snprintf( buf, len, "LDS R%d, MACL", RN(ir) ); break;
1.168 - case 0x1B: snprintf( buf, len, "TAS.B [R%d]", RN(ir) ); break;
1.169 - case 0x1E: snprintf( buf, len, "LDC R%d, GBR", RN(ir) ); break;
1.170 - case 0x20: snprintf( buf, len, "SHAL R%d", RN(ir) ); break;
1.171 - case 0x21: snprintf( buf, len, "SHAR R%d", RN(ir) ); break;
1.172 - case 0x22: snprintf( buf, len, "STS.L PR, [--R%d]", RN(ir) ); break;
1.173 - case 0x23: snprintf( buf, len, "STC.L VBR, [--R%d]", RN(ir) ); break;
1.174 - case 0x24: snprintf( buf, len, "ROTCL R%d", RN(ir) ); break;
1.175 - case 0x25: snprintf( buf, len, "ROTCR R%d", RN(ir) ); break;
1.176 - case 0x26: snprintf( buf, len, "LDS.L [R%d++], PR", RN(ir) ); break;
1.177 - case 0x27: snprintf( buf, len, "LDC.L [R%d++], VBR", RN(ir) ); break;
1.178 - case 0x28: snprintf( buf, len, "SHLL16 R%d", RN(ir) ); break;
1.179 - case 0x29: snprintf( buf, len, "SHLR16 R%d", RN(ir) ); break;
1.180 - case 0x2A: snprintf( buf, len, "LDS R%d, PR", RN(ir) ); break;
1.181 - case 0x2B: snprintf( buf, len, "JMP [R%d]", RN(ir) ); break;
1.182 - case 0x2E: snprintf( buf, len, "LDC R%d, VBR", RN(ir) ); break;
1.183 - case 0x32: snprintf( buf, len, "STC.L SGR, [--R%d]", RN(ir) ); break;
1.184 - case 0x33: snprintf( buf, len, "STC.L SSR, [--R%d]", RN(ir) ); break;
1.185 - case 0x37: snprintf( buf, len, "LDC.L [R%d++], SSR", RN(ir) ); break;
1.186 - case 0x3E: snprintf( buf, len, "LDC R%d, SSR", RN(ir) ); break;
1.187 - case 0x43: snprintf( buf, len, "STC.L SPC, [--R%d]", RN(ir) ); break;
1.188 - case 0x47: snprintf( buf, len, "LDC.L [R%d++], SPC", RN(ir) ); break;
1.189 - case 0x4E: snprintf( buf, len, "LDC R%d, SPC", RN(ir) ); break;
1.190 - case 0x52: snprintf( buf, len, "STS.L FPUL, [--R%d]", RN(ir) ); break;
1.191 - case 0x56: snprintf( buf, len, "LDS.L [R%d++], FPUL", RN(ir) ); break;
1.192 - case 0x5A: snprintf( buf, len, "LDS R%d, FPUL", RN(ir) ); break;
1.193 - case 0x62: snprintf( buf, len, "STS.L FPSCR, [--R%d]", RN(ir) ); break;
1.194 - case 0x66: snprintf( buf, len, "LDS.L [R%d++], FPSCR", RN(ir) ); break;
1.195 - case 0x6A: snprintf( buf, len, "LDS R%d, FPSCR", RN(ir) ); break;
1.196 - case 0xF2: snprintf( buf, len, "STC.L DBR, [--R%d]", RN(ir) ); break;
1.197 - case 0xF6: snprintf( buf, len, "LDC.L [R%d++], DBR", RN(ir) ); break;
1.198 - case 0xFA: snprintf( buf, len, "LDC R%d, DBR", RN(ir) ); break;
1.199 - case 0x83: case 0x93: case 0xA3: case 0xB3: case 0xC3: case 0xD3: case 0xE3:
1.200 - case 0xF3: snprintf( buf, len, "STC.L R%d_BANK, [--R%d]", RN_BANK(ir), RN(ir) ); break;
1.201 - case 0x87: case 0x97: case 0xA7: case 0xB7: case 0xC7: case 0xD7: case 0xE7:
1.202 - case 0xF7: snprintf( buf, len, "LDC.L [R%d++], R%d_BANK", RN(ir), RN_BANK(ir) ); break;
1.203 - case 0x8E: case 0x9E: case 0xAE: case 0xBE: case 0xCE: case 0xDE: case 0xEE:
1.204 - case 0xFE: snprintf( buf, len, "LDC R%d, R%d_BANK", RN(ir), RN_BANK(ir) ); break;
1.206 - if( (ir&0x000F) == 0x0F ) {
1.207 - snprintf( buf, len, "MAC.W [R%d++], [R%d++]", RM(ir), RN(ir) );
1.208 - } else if( (ir&0x000F) == 0x0C ) {
1.209 - snprintf( buf, len, "SHAD R%d, R%d", RM(ir), RN(ir) );
1.210 - } else if( (ir&0x000F) == 0x0D ) {
1.211 - snprintf( buf, len, "SHLD R%d, R%d", RM(ir), RN(ir) );
1.212 - } else UNIMP(ir);
1.215 - case 5: /* 0101nnnnmmmmdddd */
1.216 - snprintf( buf, len, "MOV.L [R%d%+d], R%d", RM(ir), DISP4(ir)<<2, RN(ir) ); break;
1.217 - case 6: /* 0110xxxxxxxxxxxx */
1.218 - switch( ir&0x000f ) {
1.219 - case 0: snprintf( buf, len, "MOV.B [R%d], R%d", RM(ir), RN(ir) ); break;
1.220 - case 1: snprintf( buf, len, "MOV.W [R%d], R%d", RM(ir), RN(ir) ); break;
1.221 - case 2: snprintf( buf, len, "MOV.L [R%d], R%d", RM(ir), RN(ir) ); break;
1.222 - case 3: snprintf( buf, len, "MOV R%d, R%d", RM(ir), RN(ir) ); break;
1.223 - case 4: snprintf( buf, len, "MOV.B [R%d++], R%d", RM(ir), RN(ir) ); break;
1.224 - case 5: snprintf( buf, len, "MOV.W [R%d++], R%d", RM(ir), RN(ir) ); break;
1.225 - case 6: snprintf( buf, len, "MOV.L [R%d++], R%d", RM(ir), RN(ir) ); break;
1.226 - case 7: snprintf( buf, len, "NOT R%d, R%d", RM(ir), RN(ir) ); break;
1.227 - case 8: snprintf( buf, len, "SWAP.B R%d, R%d", RM(ir), RN(ir) ); break;
1.228 - case 9: snprintf( buf, len, "SWAP.W R%d, R%d", RM(ir), RN(ir) ); break;
1.229 - case 10:snprintf( buf, len, "NEGC R%d, R%d", RM(ir), RN(ir) ); break;
1.230 - case 11:snprintf( buf, len, "NEG R%d, R%d", RM(ir), RN(ir) ); break;
1.231 - case 12:snprintf( buf, len, "EXTU.B R%d, R%d", RM(ir), RN(ir) ); break;
1.232 - case 13:snprintf( buf, len, "EXTU.W R%d, R%d", RM(ir), RN(ir) ); break;
1.233 - case 14:snprintf( buf, len, "EXTS.B R%d, R%d", RM(ir), RN(ir) ); break;
1.234 - case 15:snprintf( buf, len, "EXTS.W R%d, R%d", RM(ir), RN(ir) ); break;
1.237 - case 7: /* 0111nnnniiiiiiii */
1.238 - snprintf( buf, len, "ADD #%d, R%d", SIGNEXT8(ir&0x00FF), RN(ir) ); break;
1.239 - case 8: /* 1000xxxxxxxxxxxx */
1.240 - switch( (ir&0x0F00) >> 8 ) {
1.241 - case 0: snprintf( buf, len, "MOV.B R0, [R%d%+d]", RM(ir), DISP4(ir) ); break;
1.242 - case 1: snprintf( buf, len, "MOV.W R0, [R%d%+d]", RM(ir), DISP4(ir)<<1 ); break;
1.243 - case 4: snprintf( buf, len, "MOV.B [R%d%+d], R0", RM(ir), DISP4(ir) ); break;
1.244 - case 5: snprintf( buf, len, "MOV.W [R%d%+d], R0", RM(ir), DISP4(ir)<<1 ); break;
1.245 - case 8: snprintf( buf, len, "CMP/EQ #%d, R0", IMM8(ir) ); break;
1.246 - case 9: snprintf( buf, len, "BT $%xh", (PCDISP8(ir)<<1)+pc+4 ); break;
1.247 - case 11:snprintf( buf, len, "BF $%xh", (PCDISP8(ir)<<1)+pc+4 ); break;
1.248 - case 13:snprintf( buf, len, "BT/S $%xh", (PCDISP8(ir)<<1)+pc+4 ); break;
1.249 - case 15:snprintf( buf, len, "BF/S $%xh", (PCDISP8(ir)<<1)+pc+4 ); break;
1.250 - default: UNIMP(ir);
1.253 - case 9: /* 1001xxxxxxxxxxxx */
1.254 - snprintf( buf, len, "MOV.W [$%xh], R%-2d ; <- #%08x", (DISP8(ir)<<1)+pc+4, RN(ir),
1.255 - sh4_read_word( (DISP8(ir)<<1)+pc+4 ) ); break;
1.256 - case 10:/* 1010xxxxxxxxxxxx */
1.257 - snprintf( buf, len, "BRA $%xh", (DISP12(ir)<<1)+pc+4 ); break;
1.258 - case 11:/* 1011xxxxxxxxxxxx */
1.259 - snprintf( buf, len, "BSR $%xh", (DISP12(ir)<<1)+pc+4 ); break;
1.260 - case 12:/* 1100xxxxdddddddd */
1.261 - switch( (ir&0x0F00)>>8 ) {
1.262 - case 0: snprintf( buf, len, "MOV.B R0, [GBR%+d]", DISP8(ir) ); break;
1.263 - case 1: snprintf( buf, len, "MOV.W R0, [GBR%+d]", DISP8(ir)<<1 ); break;
1.264 - case 2: snprintf( buf, len, "MOV.L R0, [GBR%+d]", DISP8(ir)<<2 ); break;
1.265 - case 3: snprintf( buf, len, "TRAPA #%d", UIMM8(ir) ); break;
1.266 - case 4: snprintf( buf, len, "MOV.B [GBR%+d], R0", DISP8(ir) ); break;
1.267 - case 5: snprintf( buf, len, "MOV.W [GBR%+d], R0", DISP8(ir)<<1 ); break;
1.268 - case 6: snprintf( buf, len, "MOV.L [GBR%+d], R0", DISP8(ir)<<2 ); break;
1.269 - case 7: snprintf( buf, len, "MOVA $%xh, R0", (DISP8(ir)<<2)+(pc&~3)+4 ); break;
1.270 - case 8: snprintf( buf, len, "TST #%02Xh, R0", UIMM8(ir) ); break;
1.271 - case 9: snprintf( buf, len, "AND #%02Xh, R0", UIMM8(ir) ); break;
1.272 - case 10:snprintf( buf, len, "XOR #%02Xh, R0", UIMM8(ir) ); break;
1.273 - case 11:snprintf( buf, len, "OR #%02Xh, R0", UIMM8(ir) ); break;
1.274 - case 12:snprintf( buf, len, "TST.B #%02Xh, [R0+GBR]", UIMM8(ir) ); break;
1.275 - case 13:snprintf( buf, len, "AND.B #%02Xh, [R0+GBR]", UIMM8(ir) ); break;
1.276 - case 14:snprintf( buf, len, "XOR.B #%02Xh, [R0+GBR]", UIMM8(ir) ); break;
1.277 - case 15:snprintf( buf, len, "OR.B #%02Xh, [R0+GBR]", UIMM8(ir) ); break;
1.280 - case 13:/* 1101xxxxxxxxxxxx */
1.281 - snprintf( buf, len, "MOV.L [$%xh], R%-2d ; <- #%08x", (DISP8(ir)<<2)+(pc&~3)+4, RN(ir),
1.282 - sh4_read_long( (DISP8(ir)<<2)+(pc&~3)+4 ) ); break;
1.283 - case 14:/* 1110xxxxxxxxxxxx */
1.284 - snprintf( buf, len, "MOV #%d, R%d", DISP8(ir), RN(ir)); break;
1.285 - case 15:/* 1111xxxxxxxxxxxx */
1.286 - switch( ir&0x000F ) {
1.287 - case 0: snprintf( buf, len, "FADD FR%d, FR%d", RM(ir), RN(ir) ); break;
1.288 - case 1: snprintf( buf, len, "FSUB FR%d, FR%d", RM(ir), RN(ir) ); break;
1.289 - case 2: snprintf( buf, len, "FMUL FR%d, FR%d", RM(ir), RN(ir) ); break;
1.290 - case 3: snprintf( buf, len, "FDIV FR%d, FR%d", RM(ir), RN(ir) ); break;
1.291 - case 4: snprintf( buf, len, "FCMP/EQ FR%d, FR%d", RM(ir), RN(ir) ); break;
1.292 - case 5: snprintf( buf, len, "FCMP/GT FR%d, FR%d", RM(ir), RN(ir) ); break;
1.293 - case 6: snprintf( buf, len, "FMOV.S [R%d+R0], FR%d", RM(ir), RN(ir) ); break;
1.294 - case 7: snprintf( buf, len, "FMOV.S FR%d, [R%d+R0]", RM(ir), RN(ir) ); break;
1.295 - case 8: snprintf( buf, len, "FMOV.S [R%d], FR%d", RM(ir), RN(ir) ); break;
1.296 - case 9: snprintf( buf, len, "FMOV.S [R%d++], FR%d", RM(ir), RN(ir) ); break;
1.297 - case 10:snprintf( buf, len, "FMOV.S FR%d, [R%d]", RM(ir), RN(ir) ); break;
1.298 - case 11:snprintf( buf, len, "FMOV.S FR%d, [--R%d]", RM(ir), RN(ir) ); break;
1.299 - case 12:snprintf( buf, len, "FMOV FR%d, FR%d", RM(ir), RN(ir) ); break;
1.301 - switch( (ir&0x00F0) >> 4 ) {
1.302 - case 0: snprintf( buf, len, "FSTS FPUL, FR%d", RN(ir) ); break;
1.303 - case 1: snprintf( buf, len, "FLDS FR%d, FPUL", RN(ir) ); break;
1.304 - case 2: snprintf( buf, len, "FLOAT FPUL, FR%d", RN(ir) ); break;
1.305 - case 3: snprintf( buf, len, "FTRC FR%d, FPUL", RN(ir) ); break;
1.306 - case 4: snprintf( buf, len, "FNEG FR%d", RN(ir) ); break;
1.307 - case 5: snprintf( buf, len, "FABS FR%d", RN(ir) ); break;
1.308 - case 6: snprintf( buf, len, "FSQRT FR%d", RN(ir) ); break;
1.309 - case 7: snprintf( buf, len, "FSRRA FR%d", RN(ir) ); break;
1.310 - case 8: snprintf( buf, len, "FLDI0 FR%d", RN(ir) ); break;
1.311 - case 9: snprintf( buf, len, "FLDI1 FR%d", RN(ir) ); break;
1.312 - case 10:snprintf( buf, len, "FCNVSD FPUL, DR%d", RN(ir)>>1 ); break;
1.313 - case 11:snprintf( buf, len, "FCNVDS DR%d, FPUL", RN(ir)>>1 ); break;
1.314 - case 14:snprintf( buf, len, "FIPR FV%d, FV%d", FVM(ir), FVN(ir) ); break;
1.316 - if( (ir & 0x0300) == 0x0100 )
1.317 - snprintf( buf, len, "FTRV XMTRX,FV%d", FVN(ir) );
1.318 - else if( (ir & 0x0100) == 0 )
1.319 - snprintf( buf, len, "FSCA FPUL, DR%d", RN(ir) );
1.320 - else if( ir == 0xFBFD )
1.321 - snprintf( buf, len, "FRCHG " );
1.322 - else if( ir == 0xF3FD )
1.323 - snprintf( buf, len, "FSCHG " );
1.326 - default: UNIMP(ir);
1.329 - case 14:snprintf( buf, len, "FMAC FR0, FR%d, FR%d", RM(ir), RN(ir) ); break;
1.330 - default: UNIMP(ir);
1.334 + switch( (ir&0xF000) >> 12 ) {
1.336 + switch( ir&0xF ) {
1.338 + switch( (ir&0x80) >> 7 ) {
1.340 + switch( (ir&0x70) >> 4 ) {
1.342 + { /* STC SR, Rn */
1.343 + uint32_t Rn = ((ir>>8)&0xF);
1.344 + snprintf( buf, len, "STC SR, R%d", Rn );
1.348 + { /* STC GBR, Rn */
1.349 + uint32_t Rn = ((ir>>8)&0xF);
1.350 + snprintf( buf, len, "STC GBR, R%d", Rn );
1.354 + { /* STC VBR, Rn */
1.355 + uint32_t Rn = ((ir>>8)&0xF);
1.356 + snprintf( buf, len, "STC VBR, R%d", Rn );
1.360 + { /* STC SSR, Rn */
1.361 + uint32_t Rn = ((ir>>8)&0xF);
1.362 + snprintf( buf, len, "STC SSR, R%d", Rn );
1.366 + { /* STC SPC, Rn */
1.367 + uint32_t Rn = ((ir>>8)&0xF);
1.368 + snprintf( buf, len, "STC SPC, R%d", Rn );
1.377 + { /* STC Rm_BANK, Rn */
1.378 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm_BANK = ((ir>>4)&0x7);
1.379 + snprintf( buf, len, "STC R%d_BANK, R%d", Rm_BANK, Rn );
1.385 + switch( (ir&0xF0) >> 4 ) {
1.388 + uint32_t Rn = ((ir>>8)&0xF);
1.389 + snprintf( buf, len, "BSRF R%d", Rn );
1.394 + uint32_t Rn = ((ir>>8)&0xF);
1.395 + snprintf( buf, len, "BRAF R%d", Rn );
1.400 + uint32_t Rn = ((ir>>8)&0xF);
1.401 + snprintf( buf, len, "PREF R%d", Rn );
1.406 + uint32_t Rn = ((ir>>8)&0xF);
1.407 + snprintf( buf, len, "OCBI @R%d", Rn );
1.412 + uint32_t Rn = ((ir>>8)&0xF);
1.413 + snprintf( buf, len, "OCBP @R%d", Rn );
1.417 + { /* OCBWB @Rn */
1.418 + uint32_t Rn = ((ir>>8)&0xF);
1.419 + snprintf( buf, len, "OCBWB @R%d", Rn );
1.423 + { /* MOVCA.L R0, @Rn */
1.424 + uint32_t Rn = ((ir>>8)&0xF);
1.425 + snprintf( buf, len, "MOVCA.L R0, @R%d", Rn );
1.434 + { /* MOV.B Rm, @(R0, Rn) */
1.435 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.436 + snprintf( buf, len, "MOV.B R%d, @(R0, R%d)", Rm, Rn );
1.440 + { /* MOV.W Rm, @(R0, Rn) */
1.441 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.442 + snprintf( buf, len, "MOV.W R%d, @(R0, R%d)", Rm, Rn );
1.446 + { /* MOV.L Rm, @(R0, Rn) */
1.447 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.448 + snprintf( buf, len, "MOV.L R%d, @(R0, R%d)", Rm, Rn );
1.452 + { /* MUL.L Rm, Rn */
1.453 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.454 + snprintf( buf, len, "MUL.L R%d, R%d", Rm, Rn );
1.458 + switch( (ir&0xFF0) >> 4 ) {
1.461 + snprintf( buf, len, "CLRT " );
1.466 + snprintf( buf, len, "SETT " );
1.471 + snprintf( buf, len, "CLRMAC " );
1.476 + snprintf( buf, len, "LDTLB " );
1.481 + snprintf( buf, len, "CLRS " );
1.486 + snprintf( buf, len, "SETS " );
1.495 + switch( (ir&0xF0) >> 4 ) {
1.498 + snprintf( buf, len, "NOP " );
1.503 + snprintf( buf, len, "DIV0U " );
1.508 + uint32_t Rn = ((ir>>8)&0xF);
1.509 + snprintf( buf, len, "MOVT R%d", Rn );
1.518 + switch( (ir&0xF0) >> 4 ) {
1.520 + { /* STS MACH, Rn */
1.521 + uint32_t Rn = ((ir>>8)&0xF);
1.522 + snprintf( buf, len, "STS MACH, R%d", Rn );
1.526 + { /* STS MACL, Rn */
1.527 + uint32_t Rn = ((ir>>8)&0xF);
1.528 + snprintf( buf, len, "STS MACL, R%d", Rn );
1.532 + { /* STS PR, Rn */
1.533 + uint32_t Rn = ((ir>>8)&0xF);
1.534 + snprintf( buf, len, "STS PR, R%d", Rn );
1.538 + { /* STC SGR, Rn */
1.539 + uint32_t Rn = ((ir>>8)&0xF);
1.540 + snprintf( buf, len, "STC SGR, R%d", Rn );
1.544 + { /* STS FPUL, Rn */
1.545 + uint32_t Rn = ((ir>>8)&0xF);
1.546 + snprintf( buf, len, "STS FPUL, R%d", Rn );
1.550 + { /* STS FPSCR, Rn */
1.551 + uint32_t Rn = ((ir>>8)&0xF);
1.552 + snprintf( buf, len, "STS FPSCR, R%d", Rn );
1.556 + { /* STC DBR, Rn */
1.557 + uint32_t Rn = ((ir>>8)&0xF);
1.558 + snprintf( buf, len, "STC DBR, R%d", Rn );
1.567 + switch( (ir&0xFF0) >> 4 ) {
1.570 + snprintf( buf, len, "RTS " );
1.575 + snprintf( buf, len, "SLEEP " );
1.580 + snprintf( buf, len, "RTE " );
1.589 + { /* MOV.B @(R0, Rm), Rn */
1.590 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.591 + snprintf( buf, len, "MOV.B @(R0, R%d), R%d", Rm, Rn );
1.595 + { /* MOV.W @(R0, Rm), Rn */
1.596 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.597 + snprintf( buf, len, "MOV.W @(R0, R%d), R%d", Rm, Rn );
1.601 + { /* MOV.L @(R0, Rm), Rn */
1.602 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.603 + snprintf( buf, len, "MOV.L @(R0, R%d), R%d", Rm, Rn );
1.607 + { /* MAC.L @Rm+, @Rn+ */
1.608 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.609 + snprintf( buf, len, "MAC.L @R%d+, @R%d+", Rm, Rn );
1.618 + { /* MOV.L Rm, @(disp, Rn) */
1.619 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<2;
1.620 + snprintf( buf, len, "MOV.L R%d, @(%d, R%d)", Rm, disp, Rn );
1.624 + switch( ir&0xF ) {
1.626 + { /* MOV.B Rm, @Rn */
1.627 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.628 + snprintf( buf, len, "MOV.B R%d, @R%d", Rm, Rn );
1.632 + { /* MOV.W Rm, @Rn */
1.633 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.634 + snprintf( buf, len, "MOV.W R%d, @R%d", Rm, Rn );
1.638 + { /* MOV.L Rm, @Rn */
1.639 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.640 + snprintf( buf, len, "MOV.L R%d, @R%d", Rm, Rn );
1.644 + { /* MOV.B Rm, @-Rn */
1.645 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.646 + snprintf( buf, len, "MOV.B R%d, @-R%d", Rm, Rn );
1.650 + { /* MOV.W Rm, @-Rn */
1.651 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.652 + snprintf( buf, len, "MOV.W R%d, @-R%d", Rm, Rn );
1.656 + { /* MOV.L Rm, @-Rn */
1.657 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.658 + snprintf( buf, len, "MOV.L R%d, @-R%d", Rm, Rn );
1.662 + { /* DIV0S Rm, Rn */
1.663 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.664 + snprintf( buf, len, "DIV0S R%d, R%d", Rm, Rn );
1.668 + { /* TST Rm, Rn */
1.669 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.670 + snprintf( buf, len, "TST R%d, R%d", Rm, Rn );
1.674 + { /* AND Rm, Rn */
1.675 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.676 + snprintf( buf, len, "AND R%d, R%d", Rm, Rn );
1.680 + { /* XOR Rm, Rn */
1.681 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.682 + snprintf( buf, len, "XOR R%d, R%d", Rm, Rn );
1.686 + { /* OR Rm, Rn */
1.687 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.688 + snprintf( buf, len, "OR R%d, R%d", Rm, Rn );
1.692 + { /* CMP/STR Rm, Rn */
1.693 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.694 + snprintf( buf, len, "CMP/STR R%d, R%d", Rm, Rn );
1.698 + { /* XTRCT Rm, Rn */
1.699 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.700 + snprintf( buf, len, "XTRCT R%d, R%d", Rm, Rn );
1.704 + { /* MULU.W Rm, Rn */
1.705 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.706 + snprintf( buf, len, "MULU.W R%d, R%d", Rm, Rn );
1.710 + { /* MULS.W Rm, Rn */
1.711 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.712 + snprintf( buf, len, "MULS.W R%d, R%d", Rm, Rn );
1.721 + switch( ir&0xF ) {
1.723 + { /* CMP/EQ Rm, Rn */
1.724 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.725 + snprintf( buf, len, "CMP/EQ R%d, R%d", Rm, Rn );
1.729 + { /* CMP/HS Rm, Rn */
1.730 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.731 + snprintf( buf, len, "CMP/HS R%d, R%d", Rm, Rn );
1.735 + { /* CMP/GE Rm, Rn */
1.736 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.737 + snprintf( buf, len, "CMP/GE R%d, R%d", Rm, Rn );
1.741 + { /* DIV1 Rm, Rn */
1.742 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.743 + snprintf( buf, len, "DIV1 R%d, R%d", Rm, Rn );
1.747 + { /* DMULU.L Rm, Rn */
1.748 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.749 + snprintf( buf, len, "DMULU.L R%d, R%d", Rm, Rn );
1.753 + { /* CMP/HI Rm, Rn */
1.754 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.755 + snprintf( buf, len, "CMP/HI R%d, R%d", Rm, Rn );
1.759 + { /* CMP/GT Rm, Rn */
1.760 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.761 + snprintf( buf, len, "CMP/GT R%d, R%d", Rm, Rn );
1.765 + { /* SUB Rm, Rn */
1.766 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.767 + snprintf( buf, len, "SUB R%d, R%d", Rm, Rn );
1.771 + { /* SUBC Rm, Rn */
1.772 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.773 + snprintf( buf, len, "SUBC R%d, R%d", Rm, Rn );
1.777 + { /* SUBV Rm, Rn */
1.778 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.779 + snprintf( buf, len, "SUBV R%d, R%d", Rm, Rn );
1.783 + { /* ADD Rm, Rn */
1.784 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.785 + snprintf( buf, len, "ADD R%d, R%d", Rm, Rn );
1.789 + { /* DMULS.L Rm, Rn */
1.790 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.791 + snprintf( buf, len, "DMULS.L R%d, R%d", Rm, Rn );
1.795 + { /* ADDC Rm, Rn */
1.796 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.797 + snprintf( buf, len, "ADDC R%d, R%d", Rm, Rn );
1.801 + { /* ADDV Rm, Rn */
1.802 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.803 + snprintf( buf, len, "ADDV R%d, R%d", Rm, Rn );
1.812 + switch( ir&0xF ) {
1.814 + switch( (ir&0xF0) >> 4 ) {
1.817 + uint32_t Rn = ((ir>>8)&0xF);
1.818 + snprintf( buf, len, "SHLL R%d", Rn );
1.823 + uint32_t Rn = ((ir>>8)&0xF);
1.824 + snprintf( buf, len, "DT R%d", Rn );
1.829 + uint32_t Rn = ((ir>>8)&0xF);
1.830 + snprintf( buf, len, "SHAL R%d", Rn );
1.839 + switch( (ir&0xF0) >> 4 ) {
1.842 + uint32_t Rn = ((ir>>8)&0xF);
1.843 + snprintf( buf, len, "SHLR R%d", Rn );
1.847 + { /* CMP/PZ Rn */
1.848 + uint32_t Rn = ((ir>>8)&0xF);
1.849 + snprintf( buf, len, "CMP/PZ R%d", Rn );
1.854 + uint32_t Rn = ((ir>>8)&0xF);
1.855 + snprintf( buf, len, "SHAR R%d", Rn );
1.864 + switch( (ir&0xF0) >> 4 ) {
1.866 + { /* STS.L MACH, @-Rn */
1.867 + uint32_t Rn = ((ir>>8)&0xF);
1.868 + snprintf( buf, len, "STS.L MACH, @-R%d", Rn );
1.872 + { /* STS.L MACL, @-Rn */
1.873 + uint32_t Rn = ((ir>>8)&0xF);
1.874 + snprintf( buf, len, "STS.L MACL, @-R%d", Rn );
1.878 + { /* STS.L PR, @-Rn */
1.879 + uint32_t Rn = ((ir>>8)&0xF);
1.880 + snprintf( buf, len, "STS.L PR, @-R%d", Rn );
1.884 + { /* STC.L SGR, @-Rn */
1.885 + uint32_t Rn = ((ir>>8)&0xF);
1.886 + snprintf( buf, len, "STC.L SGR, @-R%d", Rn );
1.890 + { /* STS.L FPUL, @-Rn */
1.891 + uint32_t Rn = ((ir>>8)&0xF);
1.892 + snprintf( buf, len, "STS.L FPUL, @-R%d", Rn );
1.896 + { /* STS.L FPSCR, @-Rn */
1.897 + uint32_t Rn = ((ir>>8)&0xF);
1.898 + snprintf( buf, len, "STS.L FPSCR, @-R%d", Rn );
1.902 + { /* STC.L DBR, @-Rn */
1.903 + uint32_t Rn = ((ir>>8)&0xF);
1.904 + snprintf( buf, len, "STC.L DBR, @-R%d", Rn );
1.913 + switch( (ir&0x80) >> 7 ) {
1.915 + switch( (ir&0x70) >> 4 ) {
1.917 + { /* STC.L SR, @-Rn */
1.918 + uint32_t Rn = ((ir>>8)&0xF);
1.919 + snprintf( buf, len, "STC.L SR, @-R%d", Rn );
1.923 + { /* STC.L GBR, @-Rn */
1.924 + uint32_t Rn = ((ir>>8)&0xF);
1.925 + snprintf( buf, len, "STC.L GBR, @-R%d", Rn );
1.929 + { /* STC.L VBR, @-Rn */
1.930 + uint32_t Rn = ((ir>>8)&0xF);
1.931 + snprintf( buf, len, "STC.L VBR, @-R%d", Rn );
1.935 + { /* STC.L SSR, @-Rn */
1.936 + uint32_t Rn = ((ir>>8)&0xF);
1.937 + snprintf( buf, len, "STC.L SSR, @-R%d", Rn );
1.941 + { /* STC.L SPC, @-Rn */
1.942 + uint32_t Rn = ((ir>>8)&0xF);
1.943 + snprintf( buf, len, "STC.L SPC, @-R%d", Rn );
1.952 + { /* STC.L Rm_BANK, @-Rn */
1.953 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm_BANK = ((ir>>4)&0x7);
1.954 + snprintf( buf, len, "STC.L @-R%d_BANK, @-R%d", Rm_BANK, Rn );
1.960 + switch( (ir&0xF0) >> 4 ) {
1.963 + uint32_t Rn = ((ir>>8)&0xF);
1.964 + snprintf( buf, len, "ROTL R%d", Rn );
1.969 + uint32_t Rn = ((ir>>8)&0xF);
1.970 + snprintf( buf, len, "ROTCL R%d", Rn );
1.979 + switch( (ir&0xF0) >> 4 ) {
1.982 + uint32_t Rn = ((ir>>8)&0xF);
1.983 + snprintf( buf, len, "ROTR R%d", Rn );
1.987 + { /* CMP/PL Rn */
1.988 + uint32_t Rn = ((ir>>8)&0xF);
1.989 + snprintf( buf, len, "CMP/PL R%d", Rn );
1.994 + uint32_t Rn = ((ir>>8)&0xF);
1.995 + snprintf( buf, len, "ROTCR R%d", Rn );
1.1004 + switch( (ir&0xF0) >> 4 ) {
1.1006 + { /* LDS.L @Rm+, MACH */
1.1007 + uint32_t Rm = ((ir>>8)&0xF);
1.1008 + snprintf( buf, len, "LDS.L @R%d+, MACH", Rm );
1.1012 + { /* LDS.L @Rm+, MACL */
1.1013 + uint32_t Rm = ((ir>>8)&0xF);
1.1014 + snprintf( buf, len, "LDS.L @R%d+, MACL", Rm );
1.1018 + { /* LDS.L @Rm+, PR */
1.1019 + uint32_t Rm = ((ir>>8)&0xF);
1.1020 + snprintf( buf, len, "LDS.L @R%d+, PR", Rm );
1.1024 + { /* LDC.L @Rm+, SGR */
1.1025 + uint32_t Rm = ((ir>>8)&0xF);
1.1026 + snprintf( buf, len, "LDC.L @R%d+, SGR", Rm );
1.1030 + { /* LDS.L @Rm+, FPUL */
1.1031 + uint32_t Rm = ((ir>>8)&0xF);
1.1032 + snprintf( buf, len, "LDS.L @R%d+, FPUL", Rm );
1.1036 + { /* LDS.L @Rm+, FPSCR */
1.1037 + uint32_t Rm = ((ir>>8)&0xF);
1.1038 + snprintf( buf, len, "LDS.L @R%d+, FPSCR", Rm );
1.1042 + { /* LDC.L @Rm+, DBR */
1.1043 + uint32_t Rm = ((ir>>8)&0xF);
1.1044 + snprintf( buf, len, "LDC.L @R%d+, DBR", Rm );
1.1053 + switch( (ir&0x80) >> 7 ) {
1.1055 + switch( (ir&0x70) >> 4 ) {
1.1057 + { /* LDC.L @Rm+, SR */
1.1058 + uint32_t Rm = ((ir>>8)&0xF);
1.1059 + snprintf( buf, len, "LDC.L @R%d+, SR", Rm );
1.1063 + { /* LDC.L @Rm+, GBR */
1.1064 + uint32_t Rm = ((ir>>8)&0xF);
1.1065 + snprintf( buf, len, "LDC.L @R%d+, GBR", Rm );
1.1069 + { /* LDC.L @Rm+, VBR */
1.1070 + uint32_t Rm = ((ir>>8)&0xF);
1.1071 + snprintf( buf, len, "LDC.L @R%d+, VBR", Rm );
1.1075 + { /* LDC.L @Rm+, SSR */
1.1076 + uint32_t Rm = ((ir>>8)&0xF);
1.1077 + snprintf( buf, len, "LDC.L @R%d+, SSR", Rm );
1.1081 + { /* LDC.L @Rm+, SPC */
1.1082 + uint32_t Rm = ((ir>>8)&0xF);
1.1083 + snprintf( buf, len, "LDC.L @R%d+, SPC", Rm );
1.1092 + { /* LDC.L @Rm+, Rn_BANK */
1.1093 + uint32_t Rm = ((ir>>8)&0xF); uint32_t Rn_BANK = ((ir>>4)&0x7);
1.1094 + snprintf( buf, len, "LDC.L @R%d+, @R%d+_BANK", Rm, Rn_BANK );
1.1100 + switch( (ir&0xF0) >> 4 ) {
1.1103 + uint32_t Rn = ((ir>>8)&0xF);
1.1104 + snprintf( buf, len, "SHLL2 R%d", Rn );
1.1109 + uint32_t Rn = ((ir>>8)&0xF);
1.1110 + snprintf( buf, len, "SHLL8 R%d", Rn );
1.1115 + uint32_t Rn = ((ir>>8)&0xF);
1.1116 + snprintf( buf, len, "SHLL16 R%d", Rn );
1.1125 + switch( (ir&0xF0) >> 4 ) {
1.1128 + uint32_t Rn = ((ir>>8)&0xF);
1.1129 + snprintf( buf, len, "SHLR2 R%d", Rn );
1.1134 + uint32_t Rn = ((ir>>8)&0xF);
1.1135 + snprintf( buf, len, "SHLR8 R%d", Rn );
1.1140 + uint32_t Rn = ((ir>>8)&0xF);
1.1141 + snprintf( buf, len, "SHLR16 R%d", Rn );
1.1150 + switch( (ir&0xF0) >> 4 ) {
1.1153 + uint32_t Rm = ((ir>>8)&0xF);
1.1154 + snprintf( buf, len, "LDS R%d, MACH", Rm );
1.1159 + uint32_t Rm = ((ir>>8)&0xF);
1.1160 + snprintf( buf, len, "LDS R%d, MACL", Rm );
1.1165 + uint32_t Rm = ((ir>>8)&0xF);
1.1166 + snprintf( buf, len, "LDS R%d, PR", Rm );
1.1171 + uint32_t Rm = ((ir>>8)&0xF);
1.1172 + snprintf( buf, len, "LDC R%d, SGR", Rm );
1.1177 + uint32_t Rm = ((ir>>8)&0xF);
1.1178 + snprintf( buf, len, "LDS R%d, FPUL", Rm );
1.1182 + { /* LDS Rm, FPSCR */
1.1183 + uint32_t Rm = ((ir>>8)&0xF);
1.1184 + snprintf( buf, len, "LDS R%d, FPSCR", Rm );
1.1189 + uint32_t Rm = ((ir>>8)&0xF);
1.1190 + snprintf( buf, len, "LDC R%d, DBR", Rm );
1.1199 + switch( (ir&0xF0) >> 4 ) {
1.1202 + uint32_t Rn = ((ir>>8)&0xF);
1.1203 + snprintf( buf, len, "JSR @R%d", Rn );
1.1208 + uint32_t Rn = ((ir>>8)&0xF);
1.1209 + snprintf( buf, len, "TAS.B R%d", Rn );
1.1214 + uint32_t Rn = ((ir>>8)&0xF);
1.1215 + snprintf( buf, len, "JMP @R%d", Rn );
1.1225 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1226 + snprintf( buf, len, "SHAD R%d, R%d", Rm, Rn );
1.1231 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1232 + snprintf( buf, len, "SHLD R%d, R%d", Rm, Rn );
1.1236 + switch( (ir&0x80) >> 7 ) {
1.1238 + switch( (ir&0x70) >> 4 ) {
1.1241 + uint32_t Rm = ((ir>>8)&0xF);
1.1242 + snprintf( buf, len, "LDC R%d, SR", Rm );
1.1247 + uint32_t Rm = ((ir>>8)&0xF);
1.1248 + snprintf( buf, len, "LDC R%d, GBR", Rm );
1.1253 + uint32_t Rm = ((ir>>8)&0xF);
1.1254 + snprintf( buf, len, "LDC R%d, VBR", Rm );
1.1259 + uint32_t Rm = ((ir>>8)&0xF);
1.1260 + snprintf( buf, len, "LDC R%d, SSR", Rm );
1.1265 + uint32_t Rm = ((ir>>8)&0xF);
1.1266 + snprintf( buf, len, "LDC R%d, SPC", Rm );
1.1275 + { /* LDC Rm, Rn_BANK */
1.1276 + uint32_t Rm = ((ir>>8)&0xF); uint32_t Rn_BANK = ((ir>>4)&0x7);
1.1277 + snprintf( buf, len, "LDC R%d, R%d_BANK", Rm, Rn_BANK );
1.1283 + { /* MAC.W @Rm+, @Rn+ */
1.1284 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1285 + snprintf( buf, len, "MAC.W @R%d+, @R%d+", Rm, Rn );
1.1291 + { /* MOV.L @(disp, Rm), Rn */
1.1292 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<2;
1.1293 + snprintf( buf, len, "MOV.L @(%d, R%d), @R%d", disp, Rm, Rn );
1.1299 + { /* MOV.B @Rm, Rn */
1.1300 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1301 + snprintf( buf, len, "MOV.B @R%d, R%d", Rm, Rn );
1.1305 + { /* MOV.W @Rm, Rn */
1.1306 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1307 + snprintf( buf, len, "MOV.W @R%d, R%d", Rm, Rn );
1.1311 + { /* MOV.L @Rm, Rn */
1.1312 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1313 + snprintf( buf, len, "MOV.L @R%d, R%d", Rm, Rn );
1.1318 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1319 + snprintf( buf, len, "MOV R%d, R%d", Rm, Rn );
1.1323 + { /* MOV.B @Rm+, Rn */
1.1324 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1325 + snprintf( buf, len, "MOV.B @R%d+, R%d", Rm, Rn );
1.1329 + { /* MOV.W @Rm+, Rn */
1.1330 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1331 + snprintf( buf, len, "MOV.W @R%d+, R%d", Rm, Rn );
1.1335 + { /* MOV.L @Rm+, Rn */
1.1336 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1337 + snprintf( buf, len, "MOV.L @R%d+, R%d", Rm, Rn );
1.1342 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1343 + snprintf( buf, len, "NOT R%d, R%d", Rm, Rn );
1.1347 + { /* SWAP.B Rm, Rn */
1.1348 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1349 + snprintf( buf, len, "SWAP.B R%d, R%d", Rm, Rn );
1.1353 + { /* SWAP.W Rm, Rn */
1.1354 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1355 + snprintf( buf, len, "SWAP.W R%d, R%d", Rm, Rn );
1.1360 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1361 + snprintf( buf, len, "NEGC R%d, R%d", Rm, Rn );
1.1366 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1367 + snprintf( buf, len, "NEG R%d, R%d", Rm, Rn );
1.1371 + { /* EXTU.B Rm, Rn */
1.1372 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1373 + snprintf( buf, len, "EXTU.B R%d, R%d", Rm, Rn );
1.1377 + { /* EXTU.W Rm, Rn */
1.1378 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1379 + snprintf( buf, len, "EXTU.W R%d, R%d", Rm, Rn );
1.1383 + { /* EXTS.B Rm, Rn */
1.1384 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1385 + snprintf( buf, len, "EXTS.B R%d, R%d", Rm, Rn );
1.1389 + { /* EXTS.W Rm, Rn */
1.1390 + uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1391 + snprintf( buf, len, "EXTS.W R%d, R%d", Rm, Rn );
1.1398 + uint32_t Rn = ((ir>>8)&0xF); int32_t imm = SIGNEXT8(ir&0xFF);
1.1399 + snprintf( buf, len, "ADD #%d, R%d", imm, Rn );
1.1403 + switch( (ir&0xF00) >> 8 ) {
1.1405 + { /* MOV.B R0, @(disp, Rn) */
1.1406 + uint32_t Rn = ((ir>>4)&0xF); uint32_t disp = (ir&0xF);
1.1407 + snprintf( buf, len, "MOV.B R0, @(%d, R%d)", disp, Rn );
1.1411 + { /* MOV.W R0, @(disp, Rn) */
1.1412 + uint32_t Rn = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<1;
1.1413 + snprintf( buf, len, "MOV.W R0, @(%d, Rn)", disp, Rn );
1.1417 + { /* MOV.B @(disp, Rm), R0 */
1.1418 + uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF);
1.1419 + snprintf( buf, len, "MOV.B @(%d, R%d), R0", disp, Rm );
1.1423 + { /* MOV.W @(disp, Rm), R0 */
1.1424 + uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<1;
1.1425 + snprintf( buf, len, "MOV.W @(%d, R%d), R0", disp, Rm );
1.1429 + { /* CMP/EQ #imm, R0 */
1.1430 + int32_t imm = SIGNEXT8(ir&0xFF);
1.1431 + snprintf( buf, len, "CMP/EQ #%d, R0", imm );
1.1436 + int32_t disp = SIGNEXT8(ir&0xFF)<<1;
1.1437 + snprintf( buf, len, "BT $%xh", disp+pc+4 );
1.1442 + int32_t disp = SIGNEXT8(ir&0xFF)<<1;
1.1443 + snprintf( buf, len, "BF $%xh", disp+pc+4 );
1.1448 + int32_t disp = SIGNEXT8(ir&0xFF)<<1;
1.1449 + snprintf( buf, len, "BT/S $%xh", disp+pc+4 );
1.1454 + int32_t disp = SIGNEXT8(ir&0xFF)<<1;
1.1455 + snprintf( buf, len, "BF/S $%xh", disp+pc+4 );
1.1464 + { /* MOV.W @(disp, PC), Rn */
1.1465 + uint32_t Rn = ((ir>>8)&0xF); uint32_t disp = (ir&0xFF)<<1;
1.1466 + snprintf( buf, len, "MOV.W @($%xh), R%d ; <- #%08x", disp + pc + 4, Rn, sh4_read_word(disp+pc+4) );
1.1471 + int32_t disp = SIGNEXT12(ir&0xFFF)<<1;
1.1472 + snprintf( buf, len, "BRA $%xh", disp+pc+4 );
1.1477 + int32_t disp = SIGNEXT12(ir&0xFFF)<<1;
1.1478 + snprintf( buf, len, "BSR $%xh", disp+pc+4 );
1.1482 + switch( (ir&0xF00) >> 8 ) {
1.1484 + { /* MOV.B R0, @(disp, GBR) */
1.1485 + uint32_t disp = (ir&0xFF);
1.1486 + snprintf( buf, len, "MOV.B R0, @(%d, GBR)", disp );
1.1490 + { /* MOV.W R0, @(disp, GBR) */
1.1491 + uint32_t disp = (ir&0xFF)<<1;
1.1492 + snprintf( buf, len, "MOV.W R0, @(%d, GBR)", disp);
1.1496 + { /* MOV.L R0, @(disp, GBR) */
1.1497 + uint32_t disp = (ir&0xFF)<<2;
1.1498 + snprintf( buf, len, "MOV.L R0, @(%d, GBR)", disp );
1.1503 + uint32_t imm = (ir&0xFF);
1.1504 + snprintf( buf, len, "TRAPA #%d", imm );
1.1508 + { /* MOV.B @(disp, GBR), R0 */
1.1509 + uint32_t disp = (ir&0xFF);
1.1510 + snprintf( buf, len, "MOV.B @(%d, GBR), R0", disp );
1.1514 + { /* MOV.W @(disp, GBR), R0 */
1.1515 + uint32_t disp = (ir&0xFF)<<1;
1.1516 + snprintf( buf, len, "MOV.W @(%d, GBR), R0", disp );
1.1520 + { /* MOV.L @(disp, GBR), R0 */
1.1521 + uint32_t disp = (ir&0xFF)<<2;
1.1522 + snprintf( buf, len, "MOV.L @(%d, GBR), R0",disp );
1.1526 + { /* MOVA @(disp, PC), R0 */
1.1527 + uint32_t disp = (ir&0xFF)<<2;
1.1528 + snprintf( buf, len, "MOVA @($%xh), R0", disp + (pc&0xFFFFFFFC) + 4 );
1.1533 + uint32_t imm = (ir&0xFF);
1.1534 + snprintf( buf, len, "TST #%d, R0", imm );
1.1539 + uint32_t imm = (ir&0xFF);
1.1540 + snprintf( buf, len, "ADD #%d, R0", imm );
1.1545 + uint32_t imm = (ir&0xFF);
1.1546 + snprintf( buf, len, "XOR #%d, R0", imm );
1.1551 + uint32_t imm = (ir&0xFF);
1.1552 + snprintf( buf, len, "OR #%d, R0", imm );
1.1556 + { /* TST.B #imm, @(R0, GBR) */
1.1557 + uint32_t imm = (ir&0xFF);
1.1558 + snprintf( buf, len, "TST.B #%d, @(R0, GBR)", imm );
1.1562 + { /* AND.B #imm, @(R0, GBR) */
1.1563 + uint32_t imm = (ir&0xFF);
1.1564 + snprintf( buf, len, "AND.B #%d, @(R0, GBR)", imm );
1.1568 + { /* XOR.B #imm, @(R0, GBR) */
1.1569 + uint32_t imm = (ir&0xFF);
1.1570 + snprintf( buf, len, "XOR.B #%d, @(R0, GBR)", imm );
1.1574 + { /* OR.B #imm, @(R0, GBR) */
1.1575 + uint32_t imm = (ir&0xFF);
1.1576 + snprintf( buf, len, "OR.B #%d, @(R0, GBR)", imm );
1.1582 + { /* MOV.L @(disp, PC), Rn */
1.1583 + uint32_t Rn = ((ir>>8)&0xF); uint32_t disp = (ir&0xFF)<<2;
1.1584 + snprintf( buf, len, "MOV.L @($%xh), R%d ; <- #%08x", disp + (pc & 0xFFFFFFFC) + 4, Rn, sh4_read_long(disp+(pc&0xFFFFFFFC)+4) );
1.1589 + uint32_t Rn = ((ir>>8)&0xF); int32_t imm = SIGNEXT8(ir&0xFF);
1.1590 + snprintf( buf, len, "MOV #%d, R%d", imm, Rn );
1.1596 + { /* FADD FRm, FRn */
1.1597 + uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1.1598 + snprintf( buf, len, "FADD FR%d, FR%d", FRm, FRn );
1.1602 + { /* FSUB FRm, FRn */
1.1603 + uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1.1604 + snprintf( buf, len, "FSUB FRm, FR%d", FRm, FRn );
1.1608 + { /* FMUL FRm, FRn */
1.1609 + uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1.1610 + snprintf( buf, len, "FMUL FRm, FR%d", FRm, FRn );
1.1614 + { /* FDIV FRm, FRn */
1.1615 + uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1.1616 + snprintf( buf, len, "FDIV FR%d, FR%d", FRm, FRn );
1.1620 + { /* FCMP/EQ FRm, FRn */
1.1621 + uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1.1622 + snprintf( buf, len, "FCMP/EQ FR%d, FR%d", FRm, FRn );
1.1626 + { /* FCMP/GT FRm, FRn */
1.1627 + uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1.1628 + snprintf( buf, len, "FCMP/QT FR%d, FR%d", FRm, FRn );
1.1632 + { /* FMOV @(R0, Rm), FRn */
1.1633 + uint32_t FRn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1634 + snprintf( buf, len, "FMOV @(R0, R%d), FR%d", Rm, FRn );
1.1638 + { /* FMOV FRm, @(R0, Rn) */
1.1639 + uint32_t Rn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1.1640 + snprintf( buf, len, "FMOV FR%d, @(R0, R%d)", FRm, Rn );
1.1644 + { /* FMOV @Rm, FRn */
1.1645 + uint32_t FRn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1646 + snprintf( buf, len, "FMOV @R%d, FR%d", Rm, FRn );
1.1650 + { /* FMOV @Rm+, FRn */
1.1651 + uint32_t FRn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.1652 + snprintf( buf, len, "FMOV @R%d+, FR%d", Rm, FRn );
1.1656 + { /* FMOV FRm, @Rn */
1.1657 + uint32_t Rn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1.1658 + snprintf( buf, len, "FMOV FR%d, @R%d", FRm, Rn );
1.1662 + { /* FMOV FRm, @-Rn */
1.1663 + uint32_t Rn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1.1664 + snprintf( buf, len, "FMOV FR%d, @-R%d", FRm, Rn );
1.1668 + { /* FMOV FRm, FRn */
1.1669 + uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1.1670 + snprintf( buf, len, "FMOV FR%d, FR%d", FRm, FRn );
1.1674 + switch( (ir&0xF0) >> 4 ) {
1.1676 + { /* FSTS FPUL, FRn */
1.1677 + uint32_t FRn = ((ir>>8)&0xF);
1.1678 + snprintf( buf, len, "FSTS FPUL, FR%d", FRn );
1.1682 + { /* FLDS FRm, FPUL */
1.1683 + uint32_t FRm = ((ir>>8)&0xF);
1.1684 + snprintf( buf, len, "FLDS FR%d, FPUL", FRm );
1.1688 + { /* FLOAT FPUL, FRn */
1.1689 + uint32_t FRn = ((ir>>8)&0xF);
1.1690 + snprintf( buf, len, "FLOAT FPUL, FR%d", FRn );
1.1694 + { /* FTRC FRm, FPUL */
1.1695 + uint32_t FRm = ((ir>>8)&0xF);
1.1696 + snprintf( buf, len, "FTRC FR%d, FPUL", FRm );
1.1701 + uint32_t FRn = ((ir>>8)&0xF);
1.1702 + snprintf( buf, len, "FNEG FR%d", FRn );
1.1707 + uint32_t FRn = ((ir>>8)&0xF);
1.1708 + snprintf( buf, len, "FABS FR%d", FRn );
1.1713 + uint32_t FRn = ((ir>>8)&0xF);
1.1714 + snprintf( buf, len, "FSQRT FR%d", FRn );
1.1719 + uint32_t FRn = ((ir>>8)&0xF);
1.1720 + snprintf( buf, len, "FSRRA FR%d", FRn );
1.1725 + uint32_t FRn = ((ir>>8)&0xF);
1.1726 + snprintf( buf, len, "FLDI0 FR%d", FRn );
1.1731 + uint32_t FRn = ((ir>>8)&0xF);
1.1732 + snprintf( buf, len, "FLDI1 FR%d", FRn );
1.1736 + { /* FCNVSD FPUL, FRn */
1.1737 + uint32_t FRn = ((ir>>8)&0xF);
1.1738 + snprintf( buf, len, "FCNVSD FPUL, FR%d", FRn );
1.1742 + { /* FCNVDS FRm, FPUL */
1.1743 + uint32_t FRm = ((ir>>8)&0xF);
1.1744 + snprintf( buf, len, "FCNVDS FR%d, FPUL", FRm );
1.1748 + { /* FIPR FVm, FVn */
1.1749 + uint32_t FVn = ((ir>>10)&0x3); uint32_t FVm = ((ir>>8)&0x3);
1.1750 + snprintf( buf, len, "FIPR FV%d, FV%d", FVm, FVn );
1.1754 + switch( (ir&0x100) >> 8 ) {
1.1756 + { /* FSCA FPUL, FRn */
1.1757 + uint32_t FRn = ((ir>>9)&0x7)<<1;
1.1758 + snprintf( buf, len, "FSCA FPUL, FR%d", FRn );
1.1762 + switch( (ir&0x200) >> 9 ) {
1.1764 + { /* FTRV XMTRX, FVn */
1.1765 + uint32_t FVn = ((ir>>10)&0x3);
1.1766 + snprintf( buf, len, "FTRV XMTRX, FV%d", FVn );
1.1770 + switch( (ir&0xC00) >> 10 ) {
1.1773 + snprintf( buf, len, "FSCHG " );
1.1778 + snprintf( buf, len, "FRCHG " );
1.1783 + snprintf( buf, len, "UNDEF " );
1.1801 + { /* FMAC FR0, FRm, FRn */
1.1802 + uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1.1803 + snprintf( buf, len, "FMAC FR0, FR%d, FR%d", FRm, FRn );