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lxdream.org :: lxdream/src/sh4/sh4dasm.in :: diff
lxdream 0.9.1
released Jun 29
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filename src/sh4/sh4dasm.in
changeset 359:c588dce7ebde
next430:467519b050f4
author nkeynes
date Thu Aug 23 12:33:27 2007 +0000 (13 years ago)
permissions -rw-r--r--
last change Commit decoder generator
Translator work in progress
Fix mac.l, mac.w in emu core
file annotate diff log raw
1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/src/sh4/sh4dasm.in Thu Aug 23 12:33:27 2007 +0000
1.3 @@ -0,0 +1,303 @@
1.4 +/**
1.5 + * $Id: sh4dasm.in,v 1.1 2007-08-23 12:33:27 nkeynes Exp $
1.6 + *
1.7 + * SH4 CPU definition and disassembly functions
1.8 + *
1.9 + * Copyright (c) 2005 Nathan Keynes.
1.10 + *
1.11 + * This program is free software; you can redistribute it and/or modify
1.12 + * it under the terms of the GNU General Public License as published by
1.13 + * the Free Software Foundation; either version 2 of the License, or
1.14 + * (at your option) any later version.
1.15 + *
1.16 + * This program is distributed in the hope that it will be useful,
1.17 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1.18 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1.19 + * GNU General Public License for more details.
1.20 + */
1.21 +
1.22 +#include "sh4core.h"
1.23 +#include "sh4dasm.h"
1.24 +#include "mem.h"
1.25 +
1.26 +#define UNIMP(ir) snprintf( buf, len, "??? " )
1.27 +
1.28 +
1.29 +const struct reg_desc_struct sh4_reg_map[] =
1.30 + { {"R0", REG_INT, &sh4r.r[0]}, {"R1", REG_INT, &sh4r.r[1]},
1.31 + {"R2", REG_INT, &sh4r.r[2]}, {"R3", REG_INT, &sh4r.r[3]},
1.32 + {"R4", REG_INT, &sh4r.r[4]}, {"R5", REG_INT, &sh4r.r[5]},
1.33 + {"R6", REG_INT, &sh4r.r[6]}, {"R7", REG_INT, &sh4r.r[7]},
1.34 + {"R8", REG_INT, &sh4r.r[8]}, {"R9", REG_INT, &sh4r.r[9]},
1.35 + {"R10",REG_INT, &sh4r.r[10]}, {"R11",REG_INT, &sh4r.r[11]},
1.36 + {"R12",REG_INT, &sh4r.r[12]}, {"R13",REG_INT, &sh4r.r[13]},
1.37 + {"R14",REG_INT, &sh4r.r[14]}, {"R15",REG_INT, &sh4r.r[15]},
1.38 + {"SR", REG_INT, &sh4r.sr}, {"GBR", REG_INT, &sh4r.gbr},
1.39 + {"SSR",REG_INT, &sh4r.ssr}, {"SPC", REG_INT, &sh4r.spc},
1.40 + {"SGR",REG_INT, &sh4r.sgr}, {"DBR", REG_INT, &sh4r.dbr},
1.41 + {"VBR",REG_INT, &sh4r.vbr},
1.42 + {"PC", REG_INT, &sh4r.pc}, {"PR", REG_INT, &sh4r.pr},
1.43 + {"MACL",REG_INT, &sh4r.mac},{"MACH",REG_INT, ((uint32_t *)&sh4r.mac)+1},
1.44 + {"FPUL", REG_INT, &sh4r.fpul}, {"FPSCR", REG_INT, &sh4r.fpscr},
1.45 + {NULL, 0, NULL} };
1.46 +
1.47 +
1.48 +const struct cpu_desc_struct sh4_cpu_desc =
1.49 + { "SH4", sh4_disasm_instruction, sh4_execute_instruction, mem_has_page,
1.50 + sh4_set_breakpoint, sh4_clear_breakpoint, sh4_get_breakpoint, 2,
1.51 + (char *)&sh4r, sizeof(sh4r), sh4_reg_map,
1.52 + &sh4r.pc };
1.53 +
1.54 +uint32_t sh4_disasm_instruction( uint32_t pc, char *buf, int len, char *opcode )
1.55 +{
1.56 + uint16_t ir = sh4_read_word(pc);
1.57 +
1.58 +#define UNDEF(ir) snprintf( buf, len, "???? " );
1.59 +#define RN(ir) ((ir&0x0F00)>>8)
1.60 +#define RN_BANK(ir) ((ir&0x0070)>>4)
1.61 +#define RM(ir) ((ir&0x00F0)>>4)
1.62 +#define DISP4(ir) (ir&0x000F) /* 4-bit displacements are *not* sign extended */
1.63 +#define DISP8(ir) (ir&0x00FF)
1.64 +#define PCDISP8(ir) SIGNEXT8(ir&0x00FF)
1.65 +#define UIMM8(ir) (ir&0x00FF)
1.66 +#define IMM8(ir) SIGNEXT8(ir&0x00FF)
1.67 +#define DISP12(ir) SIGNEXT12(ir&0x0FFF)
1.68 +#define FVN(ir) ((ir&0x0C00)>>10)
1.69 +#define FVM(ir) ((ir&0x0300)>>8)
1.70 +
1.71 + sprintf( opcode, "%02X %02X", ir&0xFF, ir>>8 );
1.72 +
1.73 +%%
1.74 +ADD Rm, Rn {: snprintf( buf, len, "ADD R%d, R%d", Rm, Rn ); :}
1.75 +ADD #imm, Rn {: snprintf( buf, len, "ADD #%d, R%d", imm, Rn ); :}
1.76 +ADDC Rm, Rn {: snprintf( buf, len, "ADDC R%d, R%d", Rm, Rn ); :}
1.77 +ADDV Rm, Rn {: snprintf( buf, len, "ADDV R%d, R%d", Rm, Rn ); :}
1.78 +AND Rm, Rn {: snprintf( buf, len, "AND R%d, R%d", Rm, Rn ); :}
1.79 +AND #imm, R0 {: snprintf( buf, len, "ADD #%d, R0", imm ); :}
1.80 +AND.B #imm, @(R0, GBR) {: snprintf( buf, len, "AND.B #%d, @(R0, GBR)", imm ); :}
1.81 +BF disp {: snprintf( buf, len, "BF $%xh", disp+pc+4 ); :}
1.82 +BF/S disp {: snprintf( buf, len, "BF/S $%xh", disp+pc+4 ); :}
1.83 +BRA disp {: snprintf( buf, len, "BRA $%xh", disp+pc+4 ); :}
1.84 +BRAF Rn {: snprintf( buf, len, "BRAF R%d", Rn ); :}
1.85 +BSR disp {: snprintf( buf, len, "BSR $%xh", disp+pc+4 ); :}
1.86 +BSRF Rn {: snprintf( buf, len, "BSRF R%d", Rn ); :}
1.87 +BT disp {: snprintf( buf, len, "BT $%xh", disp+pc+4 ); :}
1.88 +BT/S disp {: snprintf( buf, len, "BT/S $%xh", disp+pc+4 ); :}
1.89 +CLRMAC {: snprintf( buf, len, "CLRMAC " ); :}
1.90 +CLRS {: snprintf( buf, len, "CLRS " ); :}
1.91 +CLRT {: snprintf( buf, len, "CLRT " ); :}
1.92 +CMP/EQ Rm, Rn {: snprintf( buf, len, "CMP/EQ R%d, R%d", Rm, Rn ); :}
1.93 +CMP/EQ #imm, R0 {: snprintf( buf, len, "CMP/EQ #%d, R0", imm ); :}
1.94 +CMP/GE Rm, Rn {: snprintf( buf, len, "CMP/GE R%d, R%d", Rm, Rn ); :}
1.95 +CMP/GT Rm, Rn {: snprintf( buf, len, "CMP/GT R%d, R%d", Rm, Rn ); :}
1.96 +CMP/HI Rm, Rn {: snprintf( buf, len, "CMP/HI R%d, R%d", Rm, Rn ); :}
1.97 +CMP/HS Rm, Rn {: snprintf( buf, len, "CMP/HS R%d, R%d", Rm, Rn ); :}
1.98 +CMP/PL Rn {: snprintf( buf, len, "CMP/PL R%d", Rn ); :}
1.99 +CMP/PZ Rn {: snprintf( buf, len, "CMP/PZ R%d", Rn ); :}
1.100 +CMP/STR Rm, Rn {: snprintf( buf, len, "CMP/STR R%d, R%d", Rm, Rn ); :}
1.101 +DIV0S Rm, Rn {: snprintf( buf, len, "DIV0S R%d, R%d", Rm, Rn ); :}
1.102 +DIV0U {: snprintf( buf, len, "DIV0U " ); :}
1.103 +DIV1 Rm, Rn {: snprintf( buf, len, "DIV1 R%d, R%d", Rm, Rn ); :}
1.104 +DMULS.L Rm, Rn {: snprintf( buf, len, "DMULS.L R%d, R%d", Rm, Rn ); :}
1.105 +DMULU.L RM, Rn {: snprintf( buf, len, "DMULU.L R%d, R%d", Rm, Rn ); :}
1.106 +DT Rn {: snprintf( buf, len, "DT R%d", Rn ); :}
1.107 +EXTS.B Rm, Rn {: snprintf( buf, len, "EXTS.B R%d, R%d", Rm, Rn ); :}
1.108 +EXTS.W Rm, Rn {: snprintf( buf, len, "EXTS.W R%d, R%d", Rm, Rn ); :}
1.109 +EXTU.B Rm, Rn {: snprintf( buf, len, "EXTU.B R%d, R%d", Rm, Rn ); :}
1.110 +EXTU.W Rm, Rn {: snprintf( buf, len, "EXTU.W R%d, R%d", Rm, Rn ); :}
1.111 +FABS FRn {: snprintf( buf, len, "FABS FR%d", FRn ); :}
1.112 +FADD FRm, FRn {: snprintf( buf, len, "FADD FR%d, FR%d", FRm, FRn ); :}
1.113 +FCMP/EQ FRm, FRn {: snprintf( buf, len, "FCMP/EQ FR%d, FR%d", FRm, FRn ); :}
1.114 +FCMP/GT FRm, FRn {: snprintf( buf, len, "FCMP/QT FR%d, FR%d", FRm, FRn ); :}
1.115 +FCNVDS FRm, FPUL {: snprintf( buf, len, "FCNVDS FR%d, FPUL", FRm ); :}
1.116 +FCNVSD FPUL, FRn {: snprintf( buf, len, "FCNVSD FPUL, FR%d", FRn ); :}
1.117 +FDIV FRm, FRn {: snprintf( buf, len, "FDIV FR%d, FR%d", FRm, FRn ); :}
1.118 +FIPR FVm, FVn {: snprintf( buf, len, "FIPR FV%d, FV%d", FVm, FVn ); :}
1.119 +FLDS FRm, FPUL {: snprintf( buf, len, "FLDS FR%d, FPUL", FRm ); :}
1.120 +FLDI0 FRn {: snprintf( buf, len, "FLDI0 FR%d", FRn ); :}
1.121 +FLDI1 FRn {: snprintf( buf, len, "FLDI1 FR%d", FRn ); :}
1.122 +FLOAT FPUL, FRn {: snprintf( buf, len, "FLOAT FPUL, FR%d", FRn ); :}
1.123 +FMAC FR0, FRm, FRn {: snprintf( buf, len, "FMAC FR0, FR%d, FR%d", FRm, FRn ); :}
1.124 +FMOV FRm, FRn {: snprintf( buf, len, "FMOV FR%d, FR%d", FRm, FRn ); :}
1.125 +FMOV FRm, @Rn {: snprintf( buf, len, "FMOV FR%d, @R%d", FRm, Rn ); :}
1.126 +FMOV FRm, @-Rn {: snprintf( buf, len, "FMOV FR%d, @-R%d", FRm, Rn ); :}
1.127 +FMOV FRm, @(R0, Rn) {: snprintf( buf, len, "FMOV FR%d, @(R0, R%d)", FRm, Rn ); :}
1.128 +FMOV @Rm, FRn {: snprintf( buf, len, "FMOV @R%d, FR%d", Rm, FRn ); :}
1.129 +FMOV @Rm+, FRn {: snprintf( buf, len, "FMOV @R%d+, FR%d", Rm, FRn ); :}
1.130 +FMOV @(R0, Rm), FRn {: snprintf( buf, len, "FMOV @(R0, R%d), FR%d", Rm, FRn ); :}
1.131 +FMUL FRm, FRn {: snprintf( buf, len, "FMUL FRm, FR%d", FRm, FRn ); :}
1.132 +FNEG FRn {: snprintf( buf, len, "FNEG FR%d", FRn ); :}
1.133 +FRCHG {: snprintf( buf, len, "FRCHG " ); :}
1.134 +FSCA FPUL, FRn {: snprintf( buf, len, "FSCA FPUL, FR%d", FRn ); :}
1.135 +FSCHG {: snprintf( buf, len, "FSCHG " ); :}
1.136 +FSQRT FRn {: snprintf( buf, len, "FSQRT FR%d", FRn ); :}
1.137 +FSRRA FRn {: snprintf( buf, len, "FSRRA FR%d", FRn ); :}
1.138 +FSTS FPUL, FRn {: snprintf( buf, len, "FSTS FPUL, FR%d", FRn ); :}
1.139 +FSUB FRm, FRn {: snprintf( buf, len, "FSUB FRm, FR%d", FRm, FRn ); :}
1.140 +FTRC FRm, FPUL {: snprintf( buf, len, "FTRC FR%d, FPUL", FRm ); :}
1.141 +FTRV XMTRX, FVn {: snprintf( buf, len, "FTRV XMTRX, FV%d", FVn ); :}
1.142 +JMP @Rn {: snprintf( buf, len, "JMP @R%d", Rn ); :}
1.143 +JSR @Rn {: snprintf( buf, len, "JSR @R%d", Rn ); :}
1.144 +LDC Rm, GBR {: snprintf( buf, len, "LDC R%d, GBR", Rm ); :}
1.145 +LDC Rm, SR {: snprintf( buf, len, "LDC R%d, SR", Rm ); :}
1.146 +LDC Rm, VBR {: snprintf( buf, len, "LDC R%d, VBR", Rm ); :}
1.147 +LDC Rm, SSR {: snprintf( buf, len, "LDC R%d, SSR", Rm ); :}
1.148 +LDC Rm, SGR {: snprintf( buf, len, "LDC R%d, SGR", Rm ); :}
1.149 +LDC Rm, SPC {: snprintf( buf, len, "LDC R%d, SPC", Rm ); :}
1.150 +LDC Rm, DBR {: snprintf( buf, len, "LDC R%d, DBR", Rm ); :}
1.151 +LDC Rm, Rn_BANK {: snprintf( buf, len, "LDC R%d, R%d_BANK", Rm, Rn_BANK ); :}
1.152 +LDS Rm, FPSCR {: snprintf( buf, len, "LDS R%d, FPSCR", Rm ); :}
1.153 +LDS Rm, FPUL {: snprintf( buf, len, "LDS R%d, FPUL", Rm ); :}
1.154 +LDS Rm, MACH {: snprintf( buf, len, "LDS R%d, MACH", Rm ); :}
1.155 +LDS Rm, MACL {: snprintf( buf, len, "LDS R%d, MACL", Rm ); :}
1.156 +LDS Rm, PR {: snprintf( buf, len, "LDS R%d, PR", Rm ); :}
1.157 +LDC.L @Rm+, GBR {: snprintf( buf, len, "LDC.L @R%d+, GBR", Rm ); :}
1.158 +LDC.L @Rm+, SR {: snprintf( buf, len, "LDC.L @R%d+, SR", Rm ); :}
1.159 +LDC.L @Rm+, VBR {: snprintf( buf, len, "LDC.L @R%d+, VBR", Rm ); :}
1.160 +LDC.L @Rm+, SSR {: snprintf( buf, len, "LDC.L @R%d+, SSR", Rm ); :}
1.161 +LDC.L @Rm+, SGR {: snprintf( buf, len, "LDC.L @R%d+, SGR", Rm ); :}
1.162 +LDC.L @Rm+, SPC {: snprintf( buf, len, "LDC.L @R%d+, SPC", Rm ); :}
1.163 +LDC.L @Rm+, DBR {: snprintf( buf, len, "LDC.L @R%d+, DBR", Rm ); :}
1.164 +LDC.L @Rm+, Rn_BANK{: snprintf( buf, len, "LDC.L @R%d+, @R%d+_BANK", Rm, Rn_BANK ); :}
1.165 +LDS.L @Rm+, FPSCR{: snprintf( buf, len, "LDS.L @R%d+, FPSCR", Rm ); :}
1.166 +LDS.L @Rm+, FPUL {: snprintf( buf, len, "LDS.L @R%d+, FPUL", Rm ); :}
1.167 +LDS.L @Rm+, MACH {: snprintf( buf, len, "LDS.L @R%d+, MACH", Rm ); :}
1.168 +LDS.L @Rm+, MACL {: snprintf( buf, len, "LDS.L @R%d+, MACL", Rm ); :}
1.169 +LDS.L @Rm+, PR {: snprintf( buf, len, "LDS.L @R%d+, PR", Rm ); :}
1.170 +LDTLB {: snprintf( buf, len, "LDTLB " ); :}
1.171 +MAC.L @Rm+, @Rn+ {: snprintf( buf, len, "MAC.L @R%d+, @R%d+", Rm, Rn ); :}
1.172 +MAC.W @Rm+, @Rn+ {: snprintf( buf, len, "MAC.W @R%d+, @R%d+", Rm, Rn ); :}
1.173 +MOV Rm, Rn {: snprintf( buf, len, "MOV R%d, R%d", Rm, Rn ); :}
1.174 +MOV #imm, Rn {: snprintf( buf, len, "MOV #%d, R%d", imm, Rn ); :}
1.175 +MOV.B Rm, @Rn {: snprintf( buf, len, "MOV.B R%d, @R%d", Rm, Rn ); :}
1.176 +MOV.B Rm, @-Rn {: snprintf( buf, len, "MOV.B R%d, @-R%d", Rm, Rn ); :}
1.177 +MOV.B Rm, @(R0, Rn) {: snprintf( buf, len, "MOV.B R%d, @(R0, R%d)", Rm, Rn ); :}
1.178 +MOV.B R0, @(disp, GBR) {: snprintf( buf, len, "MOV.B R0, @(%d, GBR)", disp ); :}
1.179 +MOV.B R0, @(disp, Rn) {: snprintf( buf, len, "MOV.B R0, @(%d, R%d)", disp, Rn ); :}
1.180 +MOV.B @Rm, Rn {: snprintf( buf, len, "MOV.B @R%d, R%d", Rm, Rn ); :}
1.181 +MOV.B @Rm+, Rn {: snprintf( buf, len, "MOV.B @R%d+, R%d", Rm, Rn ); :}
1.182 +MOV.B @(R0, Rm), Rn {: snprintf( buf, len, "MOV.B @(R0, R%d), R%d", Rm, Rn ); :}
1.183 +MOV.B @(disp, GBR), R0{: snprintf( buf, len, "MOV.B @(%d, GBR), R0", disp ); :}
1.184 +MOV.B @(disp, Rm), R0 {: snprintf( buf, len, "MOV.B @(%d, R%d), R0", disp, Rm ); :}
1.185 +MOV.L Rm, @Rn {: snprintf( buf, len, "MOV.L R%d, @R%d", Rm, Rn ); :}
1.186 +MOV.L Rm, @-Rn {: snprintf( buf, len, "MOV.L R%d, @-R%d", Rm, Rn ); :}
1.187 +MOV.L Rm, @(R0, Rn) {: snprintf( buf, len, "MOV.L R%d, @(R0, R%d)", Rm, Rn ); :}
1.188 +MOV.L R0, @(disp, GBR) {: snprintf( buf, len, "MOV.L R0, @(%d, GBR)", disp ); :}
1.189 +MOV.L Rm, @(disp, Rn) {: snprintf( buf, len, "MOV.L R%d, @(%d, R%d)", Rm, disp, Rn ); :}
1.190 +MOV.L @Rm, Rn {: snprintf( buf, len, "MOV.L @R%d, R%d", Rm, Rn ); :}
1.191 +MOV.L @Rm+, Rn {: snprintf( buf, len, "MOV.L @R%d+, R%d", Rm, Rn ); :}
1.192 +MOV.L @(R0, Rm), Rn {: snprintf( buf, len, "MOV.L @(R0, R%d), R%d", Rm, Rn ); :}
1.193 +MOV.L @(disp, GBR), R0 {: snprintf( buf, len, "MOV.L @(%d, GBR), R0",disp ); :}
1.194 +MOV.L @(disp, PC), Rn {: snprintf( buf, len, "MOV.L @($%xh), R%d ; <- #%08x", disp + (pc & 0xFFFFFFFC) + 4, Rn, sh4_read_long(disp+(pc&0xFFFFFFFC)+4) ); :}
1.195 +MOV.L @(disp, Rm), Rn {: snprintf( buf, len, "MOV.L @(%d, R%d), @R%d", disp, Rm, Rn ); :}
1.196 +MOV.W Rm, @Rn {: snprintf( buf, len, "MOV.W R%d, @R%d", Rm, Rn ); :}
1.197 +MOV.W Rm, @-Rn {: snprintf( buf, len, "MOV.W R%d, @-R%d", Rm, Rn ); :}
1.198 +MOV.W Rm, @(R0, Rn) {: snprintf( buf, len, "MOV.W R%d, @(R0, R%d)", Rm, Rn ); :}
1.199 +MOV.W R0, @(disp, GBR) {: snprintf( buf, len, "MOV.W R0, @(%d, GBR)", disp); :}
1.200 +MOV.W R0, @(disp, Rn) {: snprintf( buf, len, "MOV.W R0, @(%d, Rn)", disp, Rn ); :}
1.201 +MOV.W @Rm, Rn {: snprintf( buf, len, "MOV.W @R%d, R%d", Rm, Rn ); :}
1.202 +MOV.W @Rm+, Rn {: snprintf( buf, len, "MOV.W @R%d+, R%d", Rm, Rn ); :}
1.203 +MOV.W @(R0, Rm), Rn {: snprintf( buf, len, "MOV.W @(R0, R%d), R%d", Rm, Rn ); :}
1.204 +MOV.W @(disp, GBR), R0 {: snprintf( buf, len, "MOV.W @(%d, GBR), R0", disp ); :}
1.205 +MOV.W @(disp, PC), Rn {: snprintf( buf, len, "MOV.W @($%xh), R%d ; <- #%08x", disp + pc + 4, Rn, sh4_read_word(disp+pc+4) ); :}
1.206 +MOV.W @(disp, Rm), R0 {: snprintf( buf, len, "MOV.W @(%d, R%d), R0", disp, Rm ); :}
1.207 +MOVA @(disp, PC), R0 {: snprintf( buf, len, "MOVA @($%xh), R0", disp + (pc&0xFFFFFFFC) + 4 ); :}
1.208 +MOVCA.L R0, @Rn {: snprintf( buf, len, "MOVCA.L R0, @R%d", Rn ); :}
1.209 +MOVT Rn {: snprintf( buf, len, "MOVT R%d", Rn ); :}
1.210 +MUL.L Rm, Rn {: snprintf( buf, len, "MUL.L R%d, R%d", Rm, Rn ); :}
1.211 +MULS.W Rm, Rn {: snprintf( buf, len, "MULS.W R%d, R%d", Rm, Rn ); :}
1.212 +MULU.W Rm, Rn {: snprintf( buf, len, "MULU.W R%d, R%d", Rm, Rn ); :}
1.213 +NEG Rm, Rn {: snprintf( buf, len, "NEG R%d, R%d", Rm, Rn ); :}
1.214 +NEGC Rm, Rn {: snprintf( buf, len, "NEGC R%d, R%d", Rm, Rn ); :}
1.215 +NOP {: snprintf( buf, len, "NOP " ); :}
1.216 +NOT Rm, Rn {: snprintf( buf, len, "NOT R%d, R%d", Rm, Rn ); :}
1.217 +OCBI @Rn {: snprintf( buf, len, "OCBI @R%d", Rn ); :}
1.218 +OCBP @Rn {: snprintf( buf, len, "OCBP @R%d", Rn ); :}
1.219 +OCBWB @Rn {: snprintf( buf, len, "OCBWB @R%d", Rn ); :}
1.220 +OR Rm, Rn {: snprintf( buf, len, "OR R%d, R%d", Rm, Rn ); :}
1.221 +OR #imm, R0 {: snprintf( buf, len, "OR #%d, R0", imm ); :}
1.222 +OR.B #imm, @(R0, GBR) {: snprintf( buf, len, "OR.B #%d, @(R0, GBR)", imm ); :}
1.223 +PREF @Rn {: snprintf( buf, len, "PREF R%d", Rn ); :}
1.224 +ROTCL Rn {: snprintf( buf, len, "ROTCL R%d", Rn ); :}
1.225 +ROTCR Rn {: snprintf( buf, len, "ROTCR R%d", Rn ); :}
1.226 +ROTL Rn {: snprintf( buf, len, "ROTL R%d", Rn ); :}
1.227 +ROTR Rn {: snprintf( buf, len, "ROTR R%d", Rn ); :}
1.228 +RTE {: snprintf( buf, len, "RTE " ); :}
1.229 +RTS {: snprintf( buf, len, "RTS " ); :}
1.230 +SETS {: snprintf( buf, len, "SETS " ); :}
1.231 +SETT {: snprintf( buf, len, "SETT " ); :}
1.232 +SHAD Rm, Rn {: snprintf( buf, len, "SHAD R%d, R%d", Rm, Rn ); :}
1.233 +SHAL Rn {: snprintf( buf, len, "SHAL R%d", Rn ); :}
1.234 +SHAR Rn {: snprintf( buf, len, "SHAR R%d", Rn ); :}
1.235 +SHLD Rm, Rn {: snprintf( buf, len, "SHLD R%d, R%d", Rm, Rn ); :}
1.236 +SHLL Rn {: snprintf( buf, len, "SHLL R%d", Rn ); :}
1.237 +SHLL2 Rn {: snprintf( buf, len, "SHLL2 R%d", Rn ); :}
1.238 +SHLL8 Rn {: snprintf( buf, len, "SHLL8 R%d", Rn ); :}
1.239 +SHLL16 Rn {: snprintf( buf, len, "SHLL16 R%d", Rn ); :}
1.240 +SHLR Rn {: snprintf( buf, len, "SHLR R%d", Rn ); :}
1.241 +SHLR2 Rn {: snprintf( buf, len, "SHLR2 R%d", Rn ); :}
1.242 +SHLR8 Rn {: snprintf( buf, len, "SHLR8 R%d", Rn ); :}
1.243 +SHLR16 Rn {: snprintf( buf, len, "SHLR16 R%d", Rn ); :}
1.244 +SLEEP {: snprintf( buf, len, "SLEEP " ); :}
1.245 +STC SR, Rn {: snprintf( buf, len, "STC SR, R%d", Rn ); :}
1.246 +STC GBR, Rn {: snprintf( buf, len, "STC GBR, R%d", Rn ); :}
1.247 +STC VBR, Rn {: snprintf( buf, len, "STC VBR, R%d", Rn ); :}
1.248 +STC SSR, Rn {: snprintf( buf, len, "STC SSR, R%d", Rn ); :}
1.249 +STC SPC, Rn {: snprintf( buf, len, "STC SPC, R%d", Rn ); :}
1.250 +STC SGR, Rn {: snprintf( buf, len, "STC SGR, R%d", Rn ); :}
1.251 +STC DBR, Rn {: snprintf( buf, len, "STC DBR, R%d", Rn ); :}
1.252 +STC Rm_BANK, Rn {: snprintf( buf, len, "STC R%d_BANK, R%d", Rm_BANK, Rn ); :}
1.253 +STS FPSCR, Rn {: snprintf( buf, len, "STS FPSCR, R%d", Rn ); :}
1.254 +STS FPUL, Rn {: snprintf( buf, len, "STS FPUL, R%d", Rn ); :}
1.255 +STS MACH, Rn {: snprintf( buf, len, "STS MACH, R%d", Rn ); :}
1.256 +STS MACL, Rn {: snprintf( buf, len, "STS MACL, R%d", Rn ); :}
1.257 +STS PR, Rn {: snprintf( buf, len, "STS PR, R%d", Rn ); :}
1.258 +STC.L SR, @-Rn {: snprintf( buf, len, "STC.L SR, @-R%d", Rn ); :}
1.259 +STC.L GBR, @-Rn {: snprintf( buf, len, "STC.L GBR, @-R%d", Rn ); :}
1.260 +STC.L VBR, @-Rn {: snprintf( buf, len, "STC.L VBR, @-R%d", Rn ); :}
1.261 +STC.L SSR, @-Rn {: snprintf( buf, len, "STC.L SSR, @-R%d", Rn ); :}
1.262 +STC.L SPC, @-Rn {: snprintf( buf, len, "STC.L SPC, @-R%d", Rn ); :}
1.263 +STC.L SGR, @-Rn {: snprintf( buf, len, "STC.L SGR, @-R%d", Rn ); :}
1.264 +STC.L DBR, @-Rn {: snprintf( buf, len, "STC.L DBR, @-R%d", Rn ); :}
1.265 +STC.L Rm_BANK, @-Rn {: snprintf( buf, len, "STC.L @-R%d_BANK, @-R%d", Rm_BANK, Rn ); :}
1.266 +STS.L FPSCR, @-Rn{: snprintf( buf, len, "STS.L FPSCR, @-R%d", Rn ); :}
1.267 +STS.L FPUL, @-Rn {: snprintf( buf, len, "STS.L FPUL, @-R%d", Rn ); :}
1.268 +STS.L MACH, @-Rn {: snprintf( buf, len, "STS.L MACH, @-R%d", Rn ); :}
1.269 +STS.L MACL, @-Rn {: snprintf( buf, len, "STS.L MACL, @-R%d", Rn ); :}
1.270 +STS.L PR, @-Rn {: snprintf( buf, len, "STS.L PR, @-R%d", Rn ); :}
1.271 +SUB Rm, Rn {: snprintf( buf, len, "SUB R%d, R%d", Rm, Rn ); :}
1.272 +SUBC Rm, Rn {: snprintf( buf, len, "SUBC R%d, R%d", Rm, Rn ); :}
1.273 +SUBV Rm, Rn {: snprintf( buf, len, "SUBV R%d, R%d", Rm, Rn ); :}
1.274 +SWAP.B Rm, Rn {: snprintf( buf, len, "SWAP.B R%d, R%d", Rm, Rn ); :}
1.275 +SWAP.W Rm, Rn {: snprintf( buf, len, "SWAP.W R%d, R%d", Rm, Rn ); :}
1.276 +TAS.B @Rn {: snprintf( buf, len, "TAS.B R%d", Rn ); :}
1.277 +TRAPA #imm {: snprintf( buf, len, "TRAPA #%d", imm ); :}
1.278 +TST Rm, Rn {: snprintf( buf, len, "TST R%d, R%d", Rm, Rn ); :}
1.279 +TST #imm, R0 {: snprintf( buf, len, "TST #%d, R0", imm ); :}
1.280 +TST.B #imm, @(R0, GBR) {: snprintf( buf, len, "TST.B #%d, @(R0, GBR)", imm ); :}
1.281 +XOR Rm, Rn {: snprintf( buf, len, "XOR R%d, R%d", Rm, Rn ); :}
1.282 +XOR #imm, R0 {: snprintf( buf, len, "XOR #%d, R0", imm ); :}
1.283 +XOR.B #imm, @(R0, GBR) {: snprintf( buf, len, "XOR.B #%d, @(R0, GBR)", imm ); :}
1.284 +XTRCT Rm, Rn {: snprintf( buf, len, "XTRCT R%d, R%d", Rm, Rn ); :}
1.285 +UNDEF {: snprintf( buf, len, "UNDEF " ); :}
1.286 +%%
1.287 + return pc+2;
1.288 +}
1.289 +
1.290 +
1.291 +void sh4_disasm_region( const gchar *filename, int from, int to )
1.292 +{
1.293 + int pc;
1.294 + char buf[80];
1.295 + char opcode[16];
1.296 + FILE *f;
1.297 +
1.298 + f = fopen( filename, "w" );
1.299 + for( pc = from; pc < to; pc+=2 ) {
1.300 + buf[0] = '\0';
1.301 + sh4_disasm_instruction( pc,
1.302 + buf, sizeof(buf), opcode );
1.303 + fprintf( f, " %08x: %s %s\n", pc, opcode, buf );
1.304 + }
1.305 + fclose(f);
1.306 +}
.