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lxdream.org :: lxdream/src/sh4/x86op.h :: diff
lxdream 0.9.1
released Jun 29
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filename src/sh4/x86op.h
changeset 359:c588dce7ebde
next361:be3de4ecd954
author nkeynes
date Thu Aug 23 12:33:27 2007 +0000 (13 years ago)
permissions -rw-r--r--
last change Commit decoder generator
Translator work in progress
Fix mac.l, mac.w in emu core
file annotate diff log raw
1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/src/sh4/x86op.h Thu Aug 23 12:33:27 2007 +0000
1.3 @@ -0,0 +1,157 @@
1.4 +/**
1.5 + * $Id: x86op.h,v 1.1 2007-08-23 12:33:27 nkeynes Exp $
1.6 + *
1.7 + * Definitions of x86 opcodes for use by the translator.
1.8 + *
1.9 + * Copyright (c) 2007 Nathan Keynes.
1.10 + *
1.11 + * This program is free software; you can redistribute it and/or modify
1.12 + * it under the terms of the GNU General Public License as published by
1.13 + * the Free Software Foundation; either version 2 of the License, or
1.14 + * (at your option) any later version.
1.15 + *
1.16 + * This program is distributed in the hope that it will be useful,
1.17 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1.18 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1.19 + * GNU General Public License for more details.
1.20 + */
1.21 +
1.22 +#ifndef __lxdream_x86op_H
1.23 +#define __lxdream_x86op_H
1.24 +
1.25 +#define R_NONE -1
1.26 +#define R_EAX 0
1.27 +#define R_ECX 1
1.28 +#define R_EDX 2
1.29 +#define R_EBX 3
1.30 +#define R_ESP 4
1.31 +#define R_EBP 5
1.32 +#define R_ESI 6
1.33 +#define R_EDI 7
1.34 +
1.35 +#define R_AL 0
1.36 +#define R_CL 1
1.37 +#define R_DL 2
1.38 +#define R_BL 3
1.39 +#define R_AH 4
1.40 +#define R_CH 5
1.41 +#define R_DH 6
1.42 +#define R_BH 7
1.43 +
1.44 +
1.45 +#define OP(x) *xlat_output++ = x
1.46 +#define OP32(x) *((uint32_t *)xlat_output) = x; xlat_output+=2
1.47 +
1.48 +/* Offset of a reg relative to the sh4r structure */
1.49 +#define REG_OFFSET(reg) (((char *)&sh4r.reg) - ((char *)&sh4r))
1.50 +
1.51 +#define R_T REG_OFFSET(t)
1.52 +#define R_GBR REG_OFFSET(gbr)
1.53 +#define R_SSR REG_OFFSET(ssr)
1.54 +#define R_SPC REG_OFFSET(spc)
1.55 +#define R_VBR REG_OFFSET(vbr)
1.56 +#define R_MACH REG_OFFSET(mac)+4
1.57 +#define R_MACL REG_OFFSET(mac)
1.58 +#define R_PR REG_OFFSET(pr)
1.59 +#define R_SGR REG_OFFSET(sgr)
1.60 +#define R_FPUL REG_OFFSET(fpul)
1.61 +#define R_FPSCR REG_OFFSET(fpscr)
1.62 +#define R_DBR REG_OFFSET(dbr)
1.63 +
1.64 +/**************** Basic X86 operations *********************/
1.65 +/* Note: operands follow SH4 convention (source, dest) rather than x86
1.66 + * conventions (dest, source)
1.67 + */
1.68 +
1.69 +/* Two-reg modrm form - first arg is the r32 reg, second arg is the r/m32 reg */
1.70 +#define MODRM_r32_rm32(r1,r2) OP(0xC0 | (r1<<3) | r2)
1.71 +#define MODRM_rm32_r32(r1,r2) OP(0xC0 | (r2<<3) | r1)
1.72 +
1.73 +/* ebp+disp8 modrm form */
1.74 +#define MODRM_r32_ebp8(r1,disp) OP(0x45 | (r1<<3)); OP(disp)
1.75 +
1.76 +/* ebp+disp32 modrm form */
1.77 +#define MODRM_r32_ebp32(r1,disp) OP(0x85 | (r1<<3)); OP32(disp)
1.78 +
1.79 +/* Major opcodes */
1.80 +#define ADD_r32_r32(r1,r2) OP(0x03); MODRM_rm32_r32(r1,r2)
1.81 +#define ADD_imm8s_r32(imm,r1) OP(0x83); MODRM_rm32_r32(r1, 0); OP(imm)
1.82 +#define ADC_r32_r32(r1,r2) OP(0x13); MODRM_rm32_r32(r1,r2)
1.83 +#define AND_r32_r32(r1,r2) OP(0x23); MODRM_rm32_r32(r1,r2)
1.84 +#define AND_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,4); OP32(imm)
1.85 +#define CMC() OP(0xF5)
1.86 +#define CMP_r32_r32(r1,r2) OP(0x3B); MODRM_rm32_r32(r1,r2)
1.87 +#define CMP_imm8s_r32(imm,r1) OP(0x83); MODRM_rm32_r32(r1,7); OP(imm)
1.88 +#define MOV_r32_ebp8(r1,disp) OP(0x89); MODRM_r32_ebp8(r1,disp)
1.89 +#define MOV_r32_ebp32(r1,disp) OP(0x89); MODRM_r32_ebp32(r1,disp)
1.90 +#define MOV_ebp8_r32(r1,disp) OP(0x8B); MODRM_r32_ebp8(r1,disp)
1.91 +#define MOV_ebp32_r32(r1,disp) OP(0x8B); MODRM_r32_ebp32(r1,disp)
1.92 +#define MOVSX_r8_r32(r1,r2) OP(0x0F); OP(0xBE); MODRM_rm32_r32(r1,r2)
1.93 +#define MOVSX_r16_r32(r1,r2) OP(0x0F); OP(0xBF); MODRM_rm32_r32(r1,r2)
1.94 +#define MOVZX_r8_r32(r1,r2) OP(0x0F); OP(0xB6); MODRM_rm32_r32(r1,r2)
1.95 +#define MOVZX_r16_r32(r1,r2) OP(0x0F); OP(0xB7); MODRM_rm32_r32(r1,r2)
1.96 +#define NEG_r32(r1) OP(0xF7); MODRM_rm32_r32(r1,3)
1.97 +#define NOT_r32(r1) OP(0xF7); MODRM_rm32_r32(r1,2)
1.98 +#define OR_r32_r32(r1,r2) OP(0x0B); MODRM_rm32_r32(r1,r2)
1.99 +#define OR_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,1); OP32(imm)
1.100 +#define RCL1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,2)
1.101 +#define RCR1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,3)
1.102 +#define RET() OP(0xC3)
1.103 +#define ROL1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,0)
1.104 +#define ROR1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,1)
1.105 +#define SAR1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,7)
1.106 +#define SAR_imm8_r32(imm,r1) OP(0xC1); MODRM_rm32_r32(r1,7); OP(imm)
1.107 +#define SBB_r32_r32(r1,r2) OP(0x1B); MODRM_rm32_r32(r1,r2)
1.108 +#define SHL1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,4)
1.109 +#define SHL_imm8_r32(imm,r1) OP(0xC1); MODRM_rm32_r32(r1,4); OP(imm)
1.110 +#define SHR1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,5)
1.111 +#define SHR_imm8_r32(imm,r1) OP(0xC1); MODRM_rm32_r32(r1,5); OP(imm)
1.112 +#define SUB_r32_r32(r1,r2) OP(0x2B); MODRM_rm32_r32(r1,r2)
1.113 +#define TEST_r32_r32(r1,r2) OP(0x85); MODRM_rm32_r32(r1,r2)
1.114 +#define TEST_imm32_r32(imm,r1) OP(0xF7); MODRM_rm32_r32(r1,0); OP32(imm)
1.115 +#define XOR_r32_r32(r1,r2) OP(0x33); MODRM_rm32_r32(r1,r2)
1.116 +#define XOR_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,6); OP32(imm)
1.117 +
1.118 +#define ADD_imm32_r32(imm32,r1)
1.119 +#define MOV_r32_r32(r1,r2)
1.120 +#define XCHG_r8_r8(r1,r2)
1.121 +
1.122 +/* Conditional branches */
1.123 +#define JE_rel8(rel) OP(0x74); OP(rel)
1.124 +#define JA_rel8(rel) OP(0x77); OP(rel)
1.125 +#define JAE_rel8(rel) OP(0x73); OP(rel)
1.126 +#define JG_rel8(rel) OP(0x7F); OP(rel)
1.127 +#define JGE_rel8(rel) OP(0x7D); OP(rel)
1.128 +#define JC_rel8(rel) OP(0x72); OP(rel)
1.129 +#define JO_rel8(rel) OP(0x70); OP(rel)
1.130 +
1.131 +/* Negated forms */
1.132 +#define JNE_rel8(rel) OP(0x75); OP(rel)
1.133 +#define JNA_rel8(rel) OP(0x76); OP(rel)
1.134 +#define JNAE_rel8(rel) OP(0x72); OP(rel)
1.135 +#define JNG_rel8(rel) OP(0x7E); OP(rel)
1.136 +#define JNGE_rel8(rel) OP(0x7C); OP(rel)
1.137 +#define JNC_rel8(rel) OP(0x73); OP(rel)
1.138 +#define JNO_rel8(rel) OP(0x71); OP(rel)
1.139 +
1.140 +/* Conditional setcc - writeback to sh4r.t */
1.141 +#define SETE_t() OP(0x0F); OP(0x94); MODRM_r32_ebp8(0, R_T);
1.142 +#define SETA_t() OP(0x0F); OP(0x97); MODRM_r32_ebp8(0, R_T);
1.143 +#define SETAE_t() OP(0x0F); OP(0x93); MODRM_r32_ebp8(0, R_T);
1.144 +#define SETG_t() OP(0x0F); OP(0x9F); MODRM_r32_ebp8(0, R_T);
1.145 +#define SETGE_t() OP(0x0F); OP(0x9D); MODRM_r32_ebp8(0, R_T);
1.146 +#define SETC_t() OP(0x0F); OP(0x92); MODRM_r32_ebp8(0, R_T);
1.147 +#define SETO_t() OP(0x0F); OP(0x90); MODRM_r32_ebp8(0, R_T);
1.148 +
1.149 +#define SETNE_t() OP(0x0F); OP(0x95); MODRM_r32_ebp8(0, R_T);
1.150 +#define SETNA_t() OP(0x0F); OP(0x96); MODRM_r32_ebp8(0, R_T);
1.151 +#define SETNAE_t() OP(0x0F); OP(0x92); MODRM_r32_ebp8(0, R_T);
1.152 +#define SETNG_t() OP(0x0F); OP(0x9E); MODRM_r32_ebp8(0, R_T);
1.153 +#define SETNGE_t() OP(0x0F); OP(0x9C); MODRM_r32_ebp8(0, R_T);
1.154 +#define SETNC_t() OP(0x0F); OP(0x93); MODRM_r32_ebp8(0, R_T);
1.155 +#define SETNO_t() OP(0x0F); OP(0x91); MODRM_r32_ebp8(0, R_T);
1.156 +
1.157 +/* Pseudo-op Load carry from T: CMP [EBP+t], #01 ; CMC */
1.158 +#define LDC_t() OP(0x83); MODRM_r32_ebp8(7,R_T); OP(0x01); CMC()
1.159 +
1.160 +#endif /* !__lxdream_x86op_H */
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