filename | src/sh4/mmu.h |
changeset | 946:d41ee7994db7 |
prev | 945:787729653236 |
next | 1067:d3c00ffccfcd |
author | nkeynes |
date | Tue Jan 06 01:58:08 2009 +0000 (15 years ago) |
branch | lxdream-mem |
permissions | -rw-r--r-- |
last change | Fully integrate SQ with the new address space code - added additional 'prefetch' memory accessor. TLB is utterly untested, but non-TLB at least still works. |
file | annotate | diff | log | raw |
1.1 --- a/src/sh4/mmu.h Mon Jan 05 04:19:46 2009 +00001.2 +++ b/src/sh4/mmu.h Tue Jan 06 01:58:08 2009 +00001.3 @@ -87,9 +87,9 @@1.5 struct utlb_page_entry {1.6 struct mem_region_fn fn;1.7 - mem_region_fn_t user_fn;1.8 + struct mem_region_fn *user_fn;1.9 mem_region_fn_t target;1.10 - unsigned char code[TLB_FUNC_SIZE*8];1.11 + unsigned char code[TLB_FUNC_SIZE*9];1.12 };1.14 struct utlb_1k_entry {1.15 @@ -97,11 +97,19 @@1.16 struct mem_region_fn user_fn;1.17 struct mem_region_fn *subpages[4];1.18 struct mem_region_fn *user_subpages[4];1.19 - unsigned char code[TLB_FUNC_SIZE*16];1.20 + unsigned char code[TLB_FUNC_SIZE*18];1.21 };1.23 +struct utlb_default_regions {1.24 + mem_region_fn_t tlb_miss;1.25 + mem_region_fn_t tlb_prot;1.26 + mem_region_fn_t tlb_multihit;1.27 +};1.28 +1.29 +1.30 void mmu_utlb_init_vtable( struct utlb_entry *ent, struct utlb_page_entry *page, gboolean writable );1.31 void mmu_utlb_1k_init_vtable( struct utlb_1k_entry *ent );1.32 +void mmu_utlb_init_storequeue_vtable( struct utlb_entry *ent, struct utlb_page_entry *page );1.34 extern uint32_t mmu_urc;1.35 extern uint32_t mmu_urb;1.36 @@ -114,12 +122,36 @@1.37 extern struct mem_region_fn **sh4_address_space;1.38 extern struct mem_region_fn **sh4_user_address_space;1.40 -/** Store-queue (prefetch) address space (privileged and user access)1.41 - * Page map (4KB) of the 0xE0000000..0xE4000000 region1.42 - * Same caveats apply as for the primary address space above.1.43 - */1.44 -extern struct mem_region_fn **storequeue_address_space;1.45 -extern struct mem_region_fn **storequeue_user_address_space;1.46 +/************ Storequeue/cache functions ***********/1.47 +void FASTCALL ccn_storequeue_write_long( sh4addr_t addr, uint32_t val );1.48 +int32_t FASTCALL ccn_storequeue_read_long( sh4addr_t addr );1.49 +1.50 +/** Default storequeue prefetch when TLB is disabled */1.51 +void FASTCALL ccn_storequeue_prefetch( sh4addr_t addr );1.52 +1.53 +/** TLB-enabled variant of the storequeue prefetch */1.54 +void FASTCALL ccn_storequeue_prefetch_tlb( sh4addr_t addr );1.55 +1.56 +/** Non-storequeue prefetch */1.57 +void FASTCALL ccn_prefetch( sh4addr_t addr );1.58 +1.59 +/** Non-cached prefetch (ie, no-op) */1.60 +void FASTCALL ccn_uncached_prefetch( sh4addr_t addr );1.61 +1.62 +1.63 +extern struct mem_region_fn mem_region_address_error;1.64 +extern struct mem_region_fn mem_region_tlb_miss;1.65 +extern struct mem_region_fn mem_region_tlb_multihit;1.66 +extern struct mem_region_fn mem_region_tlb_protected;1.67 +1.68 +extern struct mem_region_fn p4_region_storequeue;1.69 +extern struct mem_region_fn p4_region_storequeue_multihit;1.70 +extern struct mem_region_fn p4_region_storequeue_miss;1.71 +extern struct mem_region_fn p4_region_storequeue_protected;1.72 +extern struct mem_region_fn p4_region_storequeue_sqmd;1.73 +extern struct mem_region_fn p4_region_storequeue_sqmd_miss;1.74 +extern struct mem_region_fn p4_region_storequeue_sqmd_multihit;1.75 +extern struct mem_region_fn p4_region_storequeue_sqmd_protected;1.77 #ifdef __cplusplus1.78 }
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