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filename src/sh4/sh4core.in
changeset 1125:9dd5dee45db9
prev1103:de9ad2c0cf56
next1187:266e7a1bae90
author nkeynes
date Wed Nov 10 08:37:42 2010 +1000 (13 years ago)
permissions -rw-r--r--
last change Add chain pointer to the xlat cache, so that we can maintain multiple blocks
for the same address. This prevents thrashing in cases where we would other
keep retranslating the same blocks over and over again due to varying
xlat_sh4_mode values
file annotate diff log raw 
     1.1 --- a/src/sh4/sh4core.in	Sun Feb 21 11:19:59 2010 +1000

     1.2 +++ b/src/sh4/sh4core.in	Wed Nov 10 08:37:42 2010 +1000

     1.3 @@ -178,6 +178,7 @@

     1.4  static FASTCALL __attribute__((noinline)) void *__first_arg(void *a, void *b) { return a; }

     1.5  #define INIT_EXCEPTIONS(label) goto *__first_arg(&&fnstart,&&label); fnstart:

     1.6  #define MEM_READ_BYTE( addr, val ) val = ((mem_read_exc_fn_t)ADDRSPACE[(addr)>>12]->read_byte)((addr), &&except)

     1.7 +#define MEM_READ_BYTE_FOR_WRITE( addr, val ) val = ((mem_read_exc_fn_t)ADDRSPACE[(addr)>>12]->read_byte_for_write)((addr), &&except)

     1.8  #define MEM_READ_WORD( addr, val ) val = ((mem_read_exc_fn_t)ADDRSPACE[(addr)>>12]->read_word)((addr), &&except)

     1.9  #define MEM_READ_LONG( addr, val ) val = ((mem_read_exc_fn_t)ADDRSPACE[(addr)>>12]->read_long)((addr), &&except)

    1.10  #define MEM_WRITE_BYTE( addr, val ) ((mem_write_exc_fn_t)ADDRSPACE[(addr)>>12]->write_byte)((addr), (val), &&except)

    1.11 @@ -187,6 +188,7 @@

    1.12  #else

    1.13  #define INIT_EXCEPTIONS(label)

    1.14  #define MEM_READ_BYTE( addr, val ) val = ADDRSPACE[(addr)>>12]->read_byte(addr)

    1.15 +#define MEM_READ_BYTE_FOR_WRITE( addr, val ) val = ADDRSPACE[(addr)>>12]->read_byte_for_write(addr)

    1.16  #define MEM_READ_WORD( addr, val ) val = ADDRSPACE[(addr)>>12]->read_word(addr)

    1.17  #define MEM_READ_LONG( addr, val ) val = ADDRSPACE[(addr)>>12]->read_long(addr)

    1.18  #define MEM_WRITE_BYTE( addr, val ) ADDRSPACE[(addr)>>12]->write_byte(addr, val)

    1.19 @@ -406,13 +408,13 @@

    1.20  %%

    1.21  AND Rm, Rn {: sh4r.r[Rn] &= sh4r.r[Rm]; :}

    1.22  AND #imm, R0 {: R0 &= imm; :}

    1.23 - AND.B #imm, @(R0, GBR) {: MEM_READ_BYTE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm & tmp ); :}

    1.24 + AND.B #imm, @(R0, GBR) {: MEM_READ_BYTE_FOR_WRITE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm & tmp ); :}

    1.25  NOT Rm, Rn {: sh4r.r[Rn] = ~sh4r.r[Rm]; :}

    1.26  OR Rm, Rn {: sh4r.r[Rn] |= sh4r.r[Rm]; :}

    1.27  OR #imm, R0  {: R0 |= imm; :}

    1.28 - OR.B #imm, @(R0, GBR) {: MEM_READ_BYTE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm | tmp ); :}

    1.29 + OR.B #imm, @(R0, GBR) {: MEM_READ_BYTE_FOR_WRITE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm | tmp ); :}

    1.30  TAS.B @Rn {:

    1.31 -    MEM_READ_BYTE( sh4r.r[Rn], tmp );

    1.32 +    MEM_READ_BYTE_FOR_WRITE( sh4r.r[Rn], tmp );

    1.33      sh4r.t = ( tmp == 0 ? 1 : 0 );

    1.34      MEM_WRITE_BYTE( sh4r.r[Rn], tmp | 0x80 );

    1.35  :}

    1.36 @@ -421,7 +423,7 @@

    1.37   TST.B #imm, @(R0, GBR) {: MEM_READ_BYTE(R0+sh4r.gbr, tmp); sh4r.t = ( tmp & imm ? 0 : 1 ); :}

    1.38  XOR Rm, Rn {: sh4r.r[Rn] ^= sh4r.r[Rm]; :}

    1.39  XOR #imm, R0 {: R0 ^= imm; :}

    1.40 - XOR.B #imm, @(R0, GBR) {: MEM_READ_BYTE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm ^ tmp ); :}

    1.41 + XOR.B #imm, @(R0, GBR) {: MEM_READ_BYTE_FOR_WRITE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm ^ tmp ); :}

    1.42  XTRCT Rm, Rn {: sh4r.r[Rn] = (sh4r.r[Rn]>>16) | (sh4r.r[Rm]<<16); :}

    1.43  

    1.44  ROTL Rn {:
.