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lxdream.org :: lxdream/src/sh4/sh4core.in :: diff
lxdream 0.9.1
released Jun 29
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filename src/sh4/sh4core.in
changeset 740:dd11269ee48b
prev736:a02d1475ccfd
next758:99ae000d4e09
author nkeynes
date Wed Jul 16 10:40:10 2008 +0000 (11 years ago)
permissions -rw-r--r--
last change Rationalize the two SH4 run slice impls into sh4.c, and tidy up the vm exits.
Fixes broken soft-reset with emulator core
Fixes broken build without translator
file annotate diff log raw
1.1 --- a/src/sh4/sh4core.in Mon Jul 14 07:44:42 2008 +0000
1.2 +++ b/src/sh4/sh4core.in Wed Jul 16 10:40:10 2008 +0000
1.3 @@ -40,14 +40,9 @@
1.4
1.5 /********************** SH4 Module Definition ****************************/
1.6
1.7 -uint32_t sh4_run_slice( uint32_t nanosecs )
1.8 +uint32_t sh4_emulate_run_slice( uint32_t nanosecs )
1.9 {
1.10 int i;
1.11 - sh4r.slice_cycle = 0;
1.12 -
1.13 - if( sh4r.sh4_state != SH4_STATE_RUNNING ) {
1.14 - sh4_sleep_run_slice(nanosecs);
1.15 - }
1.16
1.17 if( sh4_breakpoint_count == 0 ) {
1.18 for( ; sh4r.slice_cycle < nanosecs; sh4r.slice_cycle += sh4_cpu_period ) {
1.19 @@ -85,10 +80,7 @@
1.20 }
1.21 }
1.22 if( i != sh4_breakpoint_count ) {
1.23 - dreamcast_stop();
1.24 - if( sh4_breakpoints[i].type == BREAK_ONESHOT )
1.25 - sh4_clear_breakpoint( sh4r.pc, BREAK_ONESHOT );
1.26 - break;
1.27 + sh4_core_exit( CORE_EXIT_BREAKPOINT );
1.28 }
1.29 #endif
1.30 }
1.31 @@ -111,7 +103,7 @@
1.32 /********************** SH4 emulation core ****************************/
1.33
1.34 #define UNDEF(ir) return sh4_raise_slot_exception(EXC_ILLEGAL, EXC_SLOT_ILLEGAL)
1.35 -#define UNIMP(ir) do{ ERROR( "Halted on unimplemented instruction at %08x, opcode = %04x", sh4r.pc, ir ); dreamcast_stop(); return FALSE; }while(0)
1.36 +#define UNIMP(ir) do{ ERROR( "Halted on unimplemented instruction at %08x, opcode = %04x", sh4r.pc, ir ); sh4_core_exit(CORE_EXIT_HALT); return FALSE; }while(0)
1.37
1.38 #if(SH4_CALLTRACE == 1)
1.39 #define MAX_CALLSTACK 32
1.40 @@ -169,7 +161,7 @@
1.41 #define CHECKWALIGN64(addr) if( (addr)&0x07 ) return sh4_raise_exception( EXC_DATA_ADDR_WRITE )
1.42
1.43 #define CHECKFPUEN() if( !IS_FPU_ENABLED() ) { if( ir == 0xFFFD ) { UNDEF(ir); } else { return sh4_raise_slot_exception( EXC_FPU_DISABLED, EXC_SLOT_FPU_DISABLED ); } }
1.44 -#define CHECKDEST(p) if( (p) == 0 ) { ERROR( "%08X: Branch/jump to NULL, CPU halted", sh4r.pc ); dreamcast_stop(); return FALSE; }
1.45 +#define CHECKDEST(p) if( (p) == 0 ) { ERROR( "%08X: Branch/jump to NULL, CPU halted", sh4r.pc ); sh4_core_exit(CORE_EXIT_HALT); return FALSE; }
1.46 #define CHECKSLOTILLEGAL() if(sh4r.in_delay_slot) return sh4_raise_exception(EXC_SLOT_ILLEGAL)
1.47
1.48 #define MEM_READ_BYTE( addr, val ) memtmp = mmu_vma_to_phys_read(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { val = sh4_read_byte(memtmp); }
1.49 @@ -262,7 +254,7 @@
1.50 if( !mmu_update_icache(sh4r.pc) ) {
1.51 // double fault - halt
1.52 ERROR( "Double fault - halting" );
1.53 - dreamcast_stop();
1.54 + sh4_core_exit(CORE_EXIT_HALT);
1.55 return FALSE;
1.56 }
1.57 }
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