1.1 --- a/src/asic.c Mon Feb 15 17:27:14 2010 +1000
1.2 +++ b/src/asic.c Sat Mar 03 15:52:59 2012 +1000
1.10 #include "sh4/intc.h"
1.11 @@ -416,6 +417,22 @@
1.12 MMIO_WRITE( ASIC, SORTDMACTL, 0 );
1.15 +void maple_set_dma_state( uint32_t val )
1.17 + gboolean in_transfer = MMIO_READ( ASIC, MAPLE_STATE ) & 1;
1.18 + gboolean transfer_requested = val & 1;
1.19 + if( !in_transfer && transfer_requested ) {
1.20 + /* Initiate new DMA transfer */
1.21 + uint32_t maple_addr = MMIO_READ( ASIC, MAPLE_DMA) &0x1FFFFFE0;
1.22 + maple_handle_buffer( maple_addr );
1.24 + else if ( in_transfer && !transfer_requested ) {
1.25 + /* Cancel current DMA transfer */
1.26 + event_cancel( EVENT_MAPLE_DMA );
1.28 + MMIO_WRITE( ASIC, MAPLE_STATE, val );
1.31 gboolean asic_enable_ide_interface( gboolean enable )
1.33 gboolean oldval = idereg.interface_enabled;
1.34 @@ -494,12 +511,7 @@
1.38 - MMIO_WRITE( ASIC, reg, val );
1.40 - uint32_t maple_addr = MMIO_READ( ASIC, MAPLE_DMA) &0x1FFFFFE0;
1.41 - maple_handle_buffer( maple_addr );
1.42 - MMIO_WRITE( ASIC, reg, 0 );
1.44 + maple_set_dma_state( val );
1.47 MMIO_WRITE( ASIC, reg, (val & 0x03FFFFE0) | 0x10000000 );