filename | src/sh4/mmu.c |
changeset | 817:e9d2d9be7cb6 |
prev | 810:833cc4960556 |
next | 818:2e08d8237d33 |
author | nkeynes |
date | Tue Aug 19 08:38:10 2008 +0000 (14 years ago) |
permissions | -rw-r--r-- |
last change | Fix CCR register mask |
file | annotate | diff | log | raw |
1.1 --- a/src/sh4/mmu.c Sat Aug 09 11:17:06 2008 +00001.2 +++ b/src/sh4/mmu.c Tue Aug 19 08:38:10 2008 +00001.3 @@ -169,7 +169,8 @@1.4 }1.5 break;1.6 case CCR:1.7 - mmu_set_cache_mode( val & (CCR_OIX|CCR_ORA) );1.8 + mmu_set_cache_mode( val & (CCR_OIX|CCR_ORA|CCR_OCE) );1.9 + val &= 0x81A7;1.10 break;1.11 default:1.12 break;
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