1.1 --- a/src/aica/aica.c	Mon Dec 26 11:52:56 2005 +0000
     1.2 +++ b/src/aica/aica.c	Mon Jan 02 14:50:12 2006 +0000
     1.3 @@ -1,5 +1,5 @@
     1.4  /**
     1.5 - * $Id: aica.c,v 1.9 2005-12-26 11:52:56 nkeynes Exp $
     1.6 + * $Id: aica.c,v 1.10 2006-01-02 14:50:12 nkeynes Exp $
     1.7   * 
     1.8   * This is the core sound system (ie the bit which does the actual work)
     1.9   *
    1.10 @@ -21,6 +21,7 @@
    1.11  #include "dream.h"
    1.12  #include "mem.h"
    1.13  #include "aica.h"
    1.14 +#include "armcore.h"
    1.15  #define MMIO_IMPL
    1.16  #include "aica.h"
    1.17  
    1.18 @@ -90,6 +91,47 @@
    1.19      return arm_load_state( f );
    1.20  }
    1.21  
    1.22 +int aica_event_pending = 0;
    1.23 +int aica_clear_count = 0;
    1.24 +
    1.25 +/* Note: This is probably not necessarily technically correct but it should
    1.26 + * work in the meantime.
    1.27 + */
    1.28 +
    1.29 +void aica_event( int event )
    1.30 +{
    1.31 +    if( aica_event_pending == 0 )
    1.32 +	armr.int_pending |= CPSR_F;
    1.33 +    aica_event_pending |= (1<<event);
    1.34 +    
    1.35 +    int pending = MMIO_READ( AICA2, AICA_IRQ );
    1.36 +    if( pending == 0 || event < pending )
    1.37 +	MMIO_WRITE( AICA2, AICA_IRQ, event );
    1.38 +}
    1.39 +
    1.40 +void aica_clear_event( )
    1.41 +{
    1.42 +    aica_clear_count++;
    1.43 +    if( aica_clear_count == 4 ) {
    1.44 +	int i;
    1.45 +	aica_clear_count = 0;
    1.46 +
    1.47 +	for( i=0; i<8; i++ ) {
    1.48 +	    if( aica_event_pending & (1<<i) ) {
    1.49 +		aica_event_pending &= ~(1<<i);
    1.50 +		break;
    1.51 +	    }
    1.52 +	}
    1.53 +	for( ;i<8; i++ ) {
    1.54 +	    if( aica_event_pending & (1<<i) ) {
    1.55 +		MMIO_WRITE( AICA2, AICA_IRQ, i );
    1.56 +		break;
    1.57 +	    }
    1.58 +	}
    1.59 +	if( aica_event_pending == 0 )
    1.60 +	    armr.int_pending &= ~CPSR_F;
    1.61 +    }
    1.62 +}
    1.63  /** Channel register structure:
    1.64   * 00  4  Channel config
    1.65   * 04  4  Waveform address lo (16 bits)
    1.66 @@ -142,6 +184,9 @@
    1.67  	}
    1.68  	MMIO_WRITE( AICA2, AICA_RESET, val );
    1.69  	break;
    1.70 +    case AICA_IRQCLEAR:
    1.71 +	aica_clear_event();
    1.72 +	break;
    1.73      default:
    1.74  	MMIO_WRITE( AICA2, reg, val );
    1.75  	break;