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lxdream.org :: lxdream/src/aica/armdasm.c :: diff
lxdream 0.9.1
released Jun 29
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filename src/aica/armdasm.c
changeset 51:ed6c27067502
prev48:de09cb63b4d0
next60:d09f85b2a583
author nkeynes
date Wed Dec 28 22:49:26 2005 +0000 (14 years ago)
permissions -rw-r--r--
last change Add several missing M instructions
Add SWI instruction
Fix disasm of LDM
Accept interrupts
file annotate diff log raw
1.1 --- a/src/aica/armdasm.c Tue Dec 27 12:42:00 2005 +0000
1.2 +++ b/src/aica/armdasm.c Wed Dec 28 22:49:26 2005 +0000
1.3 @@ -1,5 +1,5 @@
1.4 /**
1.5 - * $Id: armdasm.c,v 1.8 2005-12-27 12:42:00 nkeynes Exp $
1.6 + * $Id: armdasm.c,v 1.9 2005-12-28 22:49:26 nkeynes Exp $
1.7 *
1.8 * armdasm.c 21 Aug 2004 - ARM7tdmi (ARMv4) disassembler
1.9 *
1.10 @@ -119,7 +119,7 @@
1.11 operand = IMM8(ir);
1.12 tmp = IMMROT(ir);
1.13 operand = ROTATE_RIGHT_LONG(operand, tmp);
1.14 - return snprintf(buf, len, "%08X", operand );
1.15 + return snprintf(buf, len, "#%08Xh", operand );
1.16 }
1.17 }
1.18
1.19 @@ -159,17 +159,17 @@
1.20 switch( (ir>>21)&0x19 ) {
1.21 case 0: /* Rn -= imm offset (post-indexed) [5.2.8 A5-28] */
1.22 case 1:
1.23 - return snprintf( buf, len, "[R%d], R%d %c= %04X", RN(ir), RN(ir), sign, IMM12(ir) );
1.24 + return snprintf( buf, len, "[R%d], R%d %c= #%04Xh", RN(ir), RN(ir), sign, IMM12(ir) );
1.25 case 8: /* Rn - imm offset [5.2.2 A5-20] */
1.26 if( RN(ir) == 15 ) { /* PC relative - decode here */
1.27 uint32_t addr = pc + 8 + (UFLAG(ir) ? IMM12(ir) : -IMM12(ir));
1.28 return snprintf( buf, len, "[$%08Xh] <- #%08Xh", addr,
1.29 arm_read_long( addr ) );
1.30 } else {
1.31 - return snprintf( buf, len, "[R%d %c %04X]", RN(ir), sign, IMM12(ir) );
1.32 + return snprintf( buf, len, "[R%d %c #%04Xh]", RN(ir), sign, IMM12(ir) );
1.33 }
1.34 case 9: /* Rn -= imm offset (pre-indexed) [5.2.5 A5-24] */
1.35 - return snprintf( buf, len, "[R%d %c= %04X]", RN(ir), sign, IMM12(ir) );
1.36 + return snprintf( buf, len, "[R%d %c= #%04Xh]", RN(ir), sign, IMM12(ir) );
1.37 case 16: /* Rn -= Rm (post-indexed) [5.2.10 A5-32 ] */
1.38 case 17:
1.39 arm_disasm_address_index( ir, shift, sizeof(shift) );
1.40 @@ -391,11 +391,19 @@
1.41 arm_disasm_shift_operand(ir, operand, sizeof(operand));
1.42 snprintf(buf, len, "ORRS%s R%d, R%d, %s", cond, RD(ir), RN(ir), operand);
1.43 break;
1.44 - case 26: /* MOV Rd, Rn, operand */
1.45 + case 26: /* MOV Rd, operand */
1.46 + if( ir == 0xE1A00000 ) {
1.47 + /* Not technically a different instruction,
1.48 + * but this one is commonly used as a NOP,
1.49 + * so...
1.50 + */
1.51 + snprintf(buf, len, "NOP");
1.52 + } else {
1.53 arm_disasm_shift_operand(ir, operand, sizeof(operand));
1.54 snprintf(buf, len, "MOV%s R%d, %s", cond, RD(ir), operand);
1.55 - break;
1.56 - case 27: /* MOVS Rd, Rn, operand */
1.57 + }
1.58 + break;
1.59 + case 27: /* MOVS Rd, operand */
1.60 arm_disasm_shift_operand(ir, operand, sizeof(operand));
1.61 snprintf(buf, len, "MOVS%s R%d, %s", cond, RD(ir), operand);
1.62 break;
1.63 @@ -461,9 +469,9 @@
1.64 if( (ir & 0x02000000) == 0x02000000 ) {
1.65 int32_t offset = SIGNEXT24(ir&0x00FFFFFF) << 2;
1.66 if( (ir & 0x01000000) == 0x01000000 ) {
1.67 - snprintf( buf, len, "BL%s $%08Xh", cond, pc + offset + 8 );
1.68 + snprintf( buf, len, "BL%s $%08Xh", cond, pc + offset + 8 );
1.69 } else {
1.70 - snprintf( buf, len, "B%s $%08Xh", cond, pc + offset + 8 );
1.71 + snprintf( buf, len, "B%s $%08Xh", cond, pc + offset + 8 );
1.72 }
1.73 } else {
1.74 /* Load/store multiple */
1.75 @@ -472,20 +480,24 @@
1.76 buf += j;
1.77 len -= j;
1.78 for( i = 0; i<16 && len > 2; i++ ) {
1.79 - if( (ir >> i)&1 ) {
1.80 - j = snprintf( buf, len, "R%d", i );
1.81 - buf+=j;
1.82 - len-=j;
1.83 - }
1.84 + if( ir & (1<<i) ) {
1.85 + j = snprintf( buf, len, "R%d", i );
1.86 + buf+=j;
1.87 + len-=j;
1.88 + }
1.89 }
1.90 - if( SFLAG(ir) && len > 0 ) {
1.91 + if( BFLAG(ir) && len > 0 ) {
1.92 buf[0] = '^';
1.93 buf[1] = '\0';
1.94 }
1.95 }
1.96 break;
1.97 case 3: /* Copro */
1.98 - UNIMP(ir);
1.99 + if( (ir & 0x0F000000) == 0x0F000000 ) {
1.100 + snprintf( buf, len, "SWI%s #%08Xh", SIGNEXT24(ir) );
1.101 + } else {
1.102 + UNIMP(ir);
1.103 + }
1.104 break;
1.105 }
1.106
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