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lxdream.org :: lxdream/src/sh4/sh4dasm.c :: diff
lxdream 0.9.1
released Jun 29
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filename src/sh4/sh4dasm.c
changeset 1:eea311cfd33e
next2:42349f6ea216
author nkeynes
date Sat Mar 13 00:03:32 2004 +0000 (15 years ago)
permissions -rw-r--r--
last change This commit was generated by cvs2svn to compensate for changes in r2,
which included commits to RCS files with non-trunk default branches.
file annotate diff log raw
1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/src/sh4/sh4dasm.c Sat Mar 13 00:03:32 2004 +0000
1.3 @@ -0,0 +1,345 @@
1.4 +#include "sh4core.h"
1.5 +#include "sh4dasm.h"
1.6 +#include "mem.h"
1.7 +
1.8 +#define UNIMP(ir) snprintf( buf, len, "??? " )
1.9 +
1.10 +int sh4_disasm_instruction( int pc, char *buf, int len )
1.11 +{
1.12 + uint16_t ir = mem_read_word(pc);
1.13 +
1.14 +#define RN(ir) ((ir&0x0F00)>>8)
1.15 +#define RN_BANK(ir) ((ir&0x0070)>>4)
1.16 +#define RM(ir) ((ir&0x00F0)>>4)
1.17 +#define DISP4(ir) (ir&0x000F) /* 4-bit displacements are *not* sign extended */
1.18 +#define DISP8(ir) (ir&0x00FF)
1.19 +#define PCDISP8(ir) SIGNEXT8(ir&0x00FF)
1.20 +#define UIMM8(ir) (ir&0x00FF)
1.21 +#define IMM8(ir) SIGNEXT8(ir&0x00FF)
1.22 +#define DISP12(ir) SIGNEXT12(ir&0x0FFF)
1.23 +#define FVN(ir) ((ir&0x0C00)>>10)
1.24 +#define FVM(ir) ((ir&0x0300)>>8)
1.25 +
1.26 + switch( (ir&0xF000)>>12 ) {
1.27 + case 0: /* 0000nnnnmmmmxxxx */
1.28 + switch( ir&0x000F ) {
1.29 + case 2:
1.30 + switch( (ir&0x00F0)>>4 ) {
1.31 + case 0: snprintf( buf, len, "STC SR, R%d", RN(ir) ); break;
1.32 + case 1: snprintf( buf, len, "STC GBR, R%d", RN(ir) ); break;
1.33 + case 2: snprintf( buf, len, "STC VBR, R%d", RN(ir) ); break;
1.34 + case 3: snprintf( buf, len, "STC SSR, R%d", RN(ir) ); break;
1.35 + case 4: snprintf( buf, len, "STC SPC, R%d", RN(ir) ); break;
1.36 + case 8: case 9: case 10: case 11: case 12: case 13: case 14:
1.37 + case 15:snprintf( buf, len, "STC R%d_bank, R%d", RN_BANK(ir), RN(ir) ); break;
1.38 + default: UNIMP(ir);
1.39 + }
1.40 + break;
1.41 + case 3:
1.42 + switch( (ir&0x00F0)>>4 ) {
1.43 + case 0: snprintf( buf, len, "BSRF R%d", RN(ir) ); break;
1.44 + case 2: snprintf( buf, len, "BRAF R%d", RN(ir) ); break;
1.45 + case 8: snprintf( buf, len, "PREF [R%d]", RN(ir) ); break;
1.46 + case 9: snprintf( buf, len, "OCBI [R%d]", RN(ir) ); break;
1.47 + case 10:snprintf( buf, len, "OCBP [R%d]", RN(ir) ); break;
1.48 + case 11:snprintf( buf, len, "OCBWB [R%d]", RN(ir) ); break;
1.49 + case 12:snprintf( buf, len, "MOVCA.L R0, [R%d]", RN(ir) ); break;
1.50 + default: UNIMP(ir);
1.51 + }
1.52 + break;
1.53 + case 4: snprintf( buf, len, "MOV.B R%d, [R0+R%d]", RM(ir), RN(ir) ); break;
1.54 + case 5: snprintf( buf, len, "MOV.W R%d, [R0+R%d]", RM(ir), RN(ir) ); break;
1.55 + case 6: snprintf( buf, len, "MOV.L R%d, [R0+R%d]", RM(ir), RN(ir) ); break;
1.56 + case 7: snprintf( buf, len, "MUL.L R%d, R%d", RM(ir), RN(ir) ); break;
1.57 + case 8:
1.58 + switch( (ir&0x0FF0)>>4 ) {
1.59 + case 0: snprintf( buf, len, "CLRT " ); break;
1.60 + case 1: snprintf( buf, len, "SETT " ); break;
1.61 + case 2: snprintf( buf, len, "CLRMAC " ); break;
1.62 + case 3: snprintf( buf, len, "LDTLB " ); break;
1.63 + case 4: snprintf( buf, len, "CLRS " ); break;
1.64 + case 5: snprintf( buf, len, "SETS " ); break;
1.65 + default: UNIMP(ir);
1.66 + }
1.67 + break;
1.68 + case 9:
1.69 + if( (ir&0x00F0) == 0x20 )
1.70 + snprintf( buf, len, "MOVT R%d", RN(ir) );
1.71 + else if( ir == 0x0019 )
1.72 + snprintf( buf, len, "DIV0U " );
1.73 + else if( ir == 0x0009 )
1.74 + snprintf( buf, len, "NOP " );
1.75 + else UNIMP(ir);
1.76 + break;
1.77 + case 10:
1.78 + switch( (ir&0x00F0) >> 4 ) {
1.79 + case 0: snprintf( buf, len, "STS MACH, R%d", RN(ir) ); break;
1.80 + case 1: snprintf( buf, len, "STS MACL, R%d", RN(ir) ); break;
1.81 + case 2: snprintf( buf, len, "STS PR, R%d", RN(ir) ); break;
1.82 + case 3: snprintf( buf, len, "STC SGR, R%d", RN(ir) ); break;
1.83 + case 5: snprintf( buf, len, "STS FPUL, R%d", RN(ir) ); break;
1.84 + case 6: snprintf( buf, len, "STS FPSCR, R%d", RN(ir) ); break;
1.85 + case 15:snprintf( buf, len, "STC DBR, R%d", RN(ir) ); break;
1.86 + default: UNIMP(ir);
1.87 + }
1.88 + break;
1.89 + case 11:
1.90 + switch( (ir&0x0FF0)>>4 ) {
1.91 + case 0: snprintf( buf, len, "RTS " ); break;
1.92 + case 1: snprintf( buf, len, "SLEEP " ); break;
1.93 + case 2: snprintf( buf, len, "RTE " ); break;
1.94 + default:UNIMP(ir);
1.95 + }
1.96 + break;
1.97 + case 12:snprintf( buf, len, "MOV.B [R0+R%d], R%d", RM(ir), RN(ir) ); break;
1.98 + case 13:snprintf( buf, len, "MOV.W [R0+R%d], R%d", RM(ir), RN(ir) ); break;
1.99 + case 14:snprintf( buf, len, "MOV.L [R0+R%d], R%d", RM(ir), RN(ir) ); break;
1.100 + case 15:snprintf( buf, len, "MAC.L [R%d++], [R%d++]", RM(ir), RN(ir) ); break;
1.101 + default: UNIMP(ir);
1.102 + }
1.103 + break;
1.104 + case 1: /* 0001nnnnmmmmdddd */
1.105 + snprintf( buf, len, "MOV.L R%d, [R%d%+d]", RM(ir), RN(ir), DISP4(ir)<<2 ); break;
1.106 + case 2: /* 0010nnnnmmmmxxxx */
1.107 + switch( ir&0x000F ) {
1.108 + case 0: snprintf( buf, len, "MOV.B R%d, [R%d]", RM(ir), RN(ir) ); break;
1.109 + case 1: snprintf( buf, len, "MOV.W R%d, [R%d]", RM(ir), RN(ir) ); break;
1.110 + case 2: snprintf( buf, len, "MOV.L R%d, [R%d]", RM(ir), RN(ir) ); break;
1.111 + case 3: UNIMP(ir); break;
1.112 + case 4: snprintf( buf, len, "MOV.B R%d, [--R%d]", RM(ir), RN(ir) ); break;
1.113 + case 5: snprintf( buf, len, "MOV.W R%d, [--R%d]", RM(ir), RN(ir) ); break;
1.114 + case 6: snprintf( buf, len, "MOV.L R%d, [--R%d]", RM(ir), RN(ir) ); break;
1.115 + case 7: snprintf( buf, len, "DIV0S R%d, R%d", RM(ir), RN(ir) ); break;
1.116 + case 8: snprintf( buf, len, "TST R%d, R%d", RM(ir), RN(ir) ); break;
1.117 + case 9: snprintf( buf, len, "AND R%d, R%d", RM(ir), RN(ir) ); break;
1.118 + case 10:snprintf( buf, len, "XOR R%d, R%d", RM(ir), RN(ir) ); break;
1.119 + case 11:snprintf( buf, len, "OR R%d, R%d", RM(ir), RN(ir) ); break;
1.120 + case 12:snprintf( buf, len, "CMP/STR R%d, R%d", RM(ir), RN(ir) ); break;
1.121 + case 13:snprintf( buf, len, "XTRCT R%d, R%d", RM(ir), RN(ir) ); break;
1.122 + case 14:snprintf( buf, len, "MULU.W R%d, R%d", RM(ir), RN(ir) ); break;
1.123 + case 15:snprintf( buf, len, "MULS.W R%d, R%d", RM(ir), RN(ir) ); break;
1.124 + }
1.125 + break;
1.126 + case 3: /* 0011nnnnmmmmxxxx */
1.127 + switch( ir&0x000F ) {
1.128 + case 0: snprintf( buf, len, "CMP/EQ R%d, R%d", RM(ir), RN(ir) ); break;
1.129 + case 2: snprintf( buf, len, "CMP/HS R%d, R%d", RM(ir), RN(ir) ); break;
1.130 + case 3: snprintf( buf, len, "CMP/GE R%d, R%d", RM(ir), RN(ir) ); break;
1.131 + case 4: snprintf( buf, len, "DIV1 R%d, R%d", RM(ir), RN(ir) ); break;
1.132 + case 5: snprintf( buf, len, "DMULU.L R%d, R%d", RM(ir), RN(ir) ); break;
1.133 + case 6: snprintf( buf, len, "CMP/HI R%d, R%d", RM(ir), RN(ir) ); break;
1.134 + case 7: snprintf( buf, len, "CMP/GT R%d, R%d", RM(ir), RN(ir) ); break;
1.135 + case 8: snprintf( buf, len, "SUB R%d, R%d", RM(ir), RN(ir) ); break;
1.136 + case 10:snprintf( buf, len, "SUBC R%d, R%d", RM(ir), RN(ir) ); break;
1.137 + case 11:snprintf( buf, len, "SUBV R%d, R%d", RM(ir), RN(ir) ); break;
1.138 + case 12:snprintf( buf, len, "ADD R%d, R%d", RM(ir), RN(ir) ); break;
1.139 + case 13:snprintf( buf, len, "DMULS.L R%d, R%d", RM(ir), RN(ir) ); break;
1.140 + case 14:snprintf( buf, len, "ADDC R%d, R%d", RM(ir), RN(ir) ); break;
1.141 + case 15:snprintf( buf, len, "ADDV R%d, R%d", RM(ir), RN(ir) ); break;
1.142 + default: UNIMP(ir);
1.143 + }
1.144 + break;
1.145 + case 4: /* 0100nnnnxxxxxxxx */
1.146 + switch( ir&0x00FF ) {
1.147 + case 0x00: snprintf( buf, len, "SHLL R%d", RN(ir) ); break;
1.148 + case 0x01: snprintf( buf, len, "SHLR R%d", RN(ir) ); break;
1.149 + case 0x02: snprintf( buf, len, "STS.L MACH, [--R%d]", RN(ir) ); break;
1.150 + case 0x03: snprintf( buf, len, "STC.L SR, [--R%d]", RN(ir) ); break;
1.151 + case 0x04: snprintf( buf, len, "ROTL R%d", RN(ir) ); break;
1.152 + case 0x05: snprintf( buf, len, "ROTR R%d", RN(ir) ); break;
1.153 + case 0x06: snprintf( buf, len, "LDS.L [R%d++], MACH", RN(ir) ); break;
1.154 + case 0x07: snprintf( buf, len, "LDC.L [R%d++], SR", RN(ir) ); break;
1.155 + case 0x08: snprintf( buf, len, "SHLL2 R%d", RN(ir) ); break;
1.156 + case 0x09: snprintf( buf, len, "SHLR2 R%d", RN(ir) ); break;
1.157 + case 0x0A: snprintf( buf, len, "LDS R%d, MACH", RN(ir) ); break;
1.158 + case 0x0B: snprintf( buf, len, "JSR [R%d]", RN(ir) ); break;
1.159 + case 0x0E: snprintf( buf, len, "LDC R%d, SR", RN(ir) ); break;
1.160 + case 0x10: snprintf( buf, len, "DT R%d", RN(ir) ); break;
1.161 + case 0x11: snprintf( buf, len, "CMP/PZ R%d", RN(ir) ); break;
1.162 + case 0x12: snprintf( buf, len, "STS.L MACL, [--R%d]", RN(ir) ); break;
1.163 + case 0x13: snprintf( buf, len, "STC.L GBR, [--R%d]", RN(ir) ); break;
1.164 + case 0x15: snprintf( buf, len, "CMP/PL R%d", RN(ir) ); break;
1.165 + case 0x16: snprintf( buf, len, "LDS.L [R%d++], MACL", RN(ir) ); break;
1.166 + case 0x17: snprintf( buf, len, "LDC.L [R%d++], GBR", RN(ir) ); break;
1.167 + case 0x18: snprintf( buf, len, "SHLL8 R%d", RN(ir) ); break;
1.168 + case 0x19: snprintf( buf, len, "SHLR8 R%d", RN(ir) ); break;
1.169 + case 0x1A: snprintf( buf, len, "LDS R%d, MACL", RN(ir) ); break;
1.170 + case 0x1B: snprintf( buf, len, "TAS.B [R%d]", RN(ir) ); break;
1.171 + case 0x1E: snprintf( buf, len, "LDC R%d, GBR", RN(ir) ); break;
1.172 + case 0x20: snprintf( buf, len, "SHAL R%d", RN(ir) ); break;
1.173 + case 0x21: snprintf( buf, len, "SHAR R%d", RN(ir) ); break;
1.174 + case 0x22: snprintf( buf, len, "STS.L PR, [--R%d]", RN(ir) ); break;
1.175 + case 0x23: snprintf( buf, len, "STC.L VBR, [--R%d]", RN(ir) ); break;
1.176 + case 0x24: snprintf( buf, len, "ROTCL R%d", RN(ir) ); break;
1.177 + case 0x25: snprintf( buf, len, "ROTCR R%d", RN(ir) ); break;
1.178 + case 0x26: snprintf( buf, len, "LDS.L [R%d++], PR", RN(ir) ); break;
1.179 + case 0x27: snprintf( buf, len, "LDC.L [R%d++], VBR", RN(ir) ); break;
1.180 + case 0x28: snprintf( buf, len, "SHLL16 R%d", RN(ir) ); break;
1.181 + case 0x29: snprintf( buf, len, "SHLR16 R%d", RN(ir) ); break;
1.182 + case 0x2A: snprintf( buf, len, "LDS R%d, PR", RN(ir) ); break;
1.183 + case 0x2B: snprintf( buf, len, "JMP [R%d]", RN(ir) ); break;
1.184 + case 0x2E: snprintf( buf, len, "LDC R%d, VBR", RN(ir) ); break;
1.185 + case 0x32: snprintf( buf, len, "STC.L SGR, [--R%d]", RN(ir) ); break;
1.186 + case 0x33: snprintf( buf, len, "STC.L SSR, [--R%d]", RN(ir) ); break;
1.187 + case 0x37: snprintf( buf, len, "LDC.L [R%d++], SSR", RN(ir) ); break;
1.188 + case 0x3E: snprintf( buf, len, "LDC R%d, SSR", RN(ir) ); break;
1.189 + case 0x43: snprintf( buf, len, "STC.L SPC, [--R%d]", RN(ir) ); break;
1.190 + case 0x47: snprintf( buf, len, "LDC.L [R%d++], SPC", RN(ir) ); break;
1.191 + case 0x4E: snprintf( buf, len, "LDC R%d, SPC", RN(ir) ); break;
1.192 + case 0x52: snprintf( buf, len, "STS.L FPUL, [--R%d]", RN(ir) ); break;
1.193 + case 0x56: snprintf( buf, len, "LDS.L [R%d++], FPUL", RN(ir) ); break;
1.194 + case 0x5A: snprintf( buf, len, "LDS R%d, FPUL", RN(ir) ); break;
1.195 + case 0x62: snprintf( buf, len, "STS.L FPSCR, [--R%d]", RN(ir) ); break;
1.196 + case 0x66: snprintf( buf, len, "LDS.L [R%d++], FPSCR", RN(ir) ); break;
1.197 + case 0x6A: snprintf( buf, len, "LDS R%d, FPSCR", RN(ir) ); break;
1.198 + case 0xF2: snprintf( buf, len, "STC.L DBR, [--R%d]", RN(ir) ); break;
1.199 + case 0xF6: snprintf( buf, len, "LDC.L [R%d++], DBR", RN(ir) ); break;
1.200 + case 0xFA: snprintf( buf, len, "LDC R%d, DBR", RN(ir) ); break;
1.201 + case 0x83: case 0x93: case 0xA3: case 0xB3: case 0xC3: case 0xD3: case 0xE3:
1.202 + case 0xF3: snprintf( buf, len, "STC.L R%d_BANK, [--R%d]", RN_BANK(ir), RN(ir) ); break;
1.203 + case 0x87: case 0x97: case 0xA7: case 0xB7: case 0xC7: case 0xD7: case 0xE7:
1.204 + case 0xF7: snprintf( buf, len, "LDC.L [R%d++], R%d_BANK", RN(ir), RN_BANK(ir) ); break;
1.205 + case 0x8E: case 0x9E: case 0xAE: case 0xBE: case 0xCE: case 0xDE: case 0xEE:
1.206 + case 0xFE: snprintf( buf, len, "LDC R%d, R%d_BANK", RN(ir), RN_BANK(ir) ); break;
1.207 + default:
1.208 + if( (ir&0x000F) == 0x0F ) {
1.209 + snprintf( buf, len, "MAC.W [R%d++], [R%d++]", RM(ir), RN(ir) );
1.210 + } else if( (ir&0x000F) == 0x0C ) {
1.211 + snprintf( buf, len, "SHAD R%d, R%d", RM(ir), RN(ir) );
1.212 + } else if( (ir&0x000F) == 0x0D ) {
1.213 + snprintf( buf, len, "SHLD R%d, R%d", RM(ir), RN(ir) );
1.214 + } else UNIMP(ir);
1.215 + }
1.216 + break;
1.217 + case 5: /* 0101nnnnmmmmdddd */
1.218 + snprintf( buf, len, "MOV.L [R%d%+d], R%d", RM(ir), DISP4(ir)<<2, RN(ir) ); break;
1.219 + case 6: /* 0110xxxxxxxxxxxx */
1.220 + switch( ir&0x000f ) {
1.221 + case 0: snprintf( buf, len, "MOV.B [R%d], R%d", RM(ir), RN(ir) ); break;
1.222 + case 1: snprintf( buf, len, "MOV.W [R%d], R%d", RM(ir), RN(ir) ); break;
1.223 + case 2: snprintf( buf, len, "MOV.L [R%d], R%d", RM(ir), RN(ir) ); break;
1.224 + case 3: snprintf( buf, len, "MOV R%d, R%d", RM(ir), RN(ir) ); break;
1.225 + case 4: snprintf( buf, len, "MOV.B [R%d++], R%d", RM(ir), RN(ir) ); break;
1.226 + case 5: snprintf( buf, len, "MOV.W [R%d++], R%d", RM(ir), RN(ir) ); break;
1.227 + case 6: snprintf( buf, len, "MOV.L [R%d++], R%d", RM(ir), RN(ir) ); break;
1.228 + case 7: snprintf( buf, len, "NOT R%d, R%d", RM(ir), RN(ir) ); break;
1.229 + case 8: snprintf( buf, len, "SWAP.B R%d, R%d", RM(ir), RN(ir) ); break;
1.230 + case 9: snprintf( buf, len, "SWAP.W R%d, R%d", RM(ir), RN(ir) ); break;
1.231 + case 10:snprintf( buf, len, "NEGC R%d, R%d", RM(ir), RN(ir) ); break;
1.232 + case 11:snprintf( buf, len, "NEG R%d, R%d", RM(ir), RN(ir) ); break;
1.233 + case 12:snprintf( buf, len, "EXTU.B R%d, R%d", RM(ir), RN(ir) ); break;
1.234 + case 13:snprintf( buf, len, "EXTU.W R%d, R%d", RM(ir), RN(ir) ); break;
1.235 + case 14:snprintf( buf, len, "EXTS.B R%d, R%d", RM(ir), RN(ir) ); break;
1.236 + case 15:snprintf( buf, len, "EXTS.W R%d, R%d", RM(ir), RN(ir) ); break;
1.237 + }
1.238 + break;
1.239 + case 7: /* 0111nnnniiiiiiii */
1.240 + snprintf( buf, len, "ADD #%d, R%d", SIGNEXT8(ir&0x00FF), RN(ir) ); break;
1.241 + case 8: /* 1000xxxxxxxxxxxx */
1.242 + switch( (ir&0x0F00) >> 8 ) {
1.243 + case 0: snprintf( buf, len, "MOV.B R0, [R%d%+d]", RM(ir), DISP4(ir) ); break;
1.244 + case 1: snprintf( buf, len, "MOV.W R0, [R%d%+d]", RM(ir), DISP4(ir)<<1 ); break;
1.245 + case 4: snprintf( buf, len, "MOV.B [R%d%+d], R0", RM(ir), DISP4(ir) ); break;
1.246 + case 5: snprintf( buf, len, "MOV.W [R%d%+d], R0", RM(ir), DISP4(ir)<<1 ); break;
1.247 + case 8: snprintf( buf, len, "CMP/EQ #%d, R0", IMM8(ir) ); break;
1.248 + case 9: snprintf( buf, len, "BT $%xh", (PCDISP8(ir)<<1)+pc+4 ); break;
1.249 + case 11:snprintf( buf, len, "BF $%xh", (PCDISP8(ir)<<1)+pc+4 ); break;
1.250 + case 13:snprintf( buf, len, "BT/S $%xh", (PCDISP8(ir)<<1)+pc+4 ); break;
1.251 + case 15:snprintf( buf, len, "BF/S $%xh", (PCDISP8(ir)<<1)+pc+4 ); break;
1.252 + default: UNIMP(ir);
1.253 + }
1.254 + break;
1.255 + case 9: /* 1001xxxxxxxxxxxx */
1.256 + snprintf( buf, len, "MOV.W [$%xh], R%-2d ; <- #%08x", (DISP8(ir)<<1)+pc+4, RN(ir),
1.257 + mem_read_word( (DISP8(ir)<<1)+pc+4 ) ); break;
1.258 + case 10:/* 1010xxxxxxxxxxxx */
1.259 + snprintf( buf, len, "BRA $%xh", (DISP12(ir)<<1)+pc+4 ); break;
1.260 + case 11:/* 1011xxxxxxxxxxxx */
1.261 + snprintf( buf, len, "BSR $%xh", (DISP12(ir)<<1)+pc+4 ); break;
1.262 + case 12:/* 1100xxxxdddddddd */
1.263 + switch( (ir&0x0F00)>>8 ) {
1.264 + case 0: snprintf( buf, len, "MOV.B R0, [GBR%+d]", DISP8(ir) ); break;
1.265 + case 1: snprintf( buf, len, "MOV.W R0, [GBR%+d]", DISP8(ir)<<1 ); break;
1.266 + case 2: snprintf( buf, len, "MOV.L R0, [GBR%+d]", DISP8(ir)<<2 ); break;
1.267 + case 3: snprintf( buf, len, "TRAPA #%d", UIMM8(ir) ); break;
1.268 + case 4: snprintf( buf, len, "MOV.B [GBR%+d], R0", DISP8(ir) ); break;
1.269 + case 5: snprintf( buf, len, "MOV.W [GBR%+d], R0", DISP8(ir)<<1 ); break;
1.270 + case 6: snprintf( buf, len, "MOV.L [GBR%+d], R0", DISP8(ir)<<2 ); break;
1.271 + case 7: snprintf( buf, len, "MOVA $%xh, R0", (DISP8(ir)<<2)+(pc&~3)+4 ); break;
1.272 + case 8: snprintf( buf, len, "TST #%02Xh, R0", UIMM8(ir) ); break;
1.273 + case 9: snprintf( buf, len, "AND #%02Xh, R0", UIMM8(ir) ); break;
1.274 + case 10:snprintf( buf, len, "XOR #%02Xh, R0", UIMM8(ir) ); break;
1.275 + case 11:snprintf( buf, len, "OR #%02Xh, R0", UIMM8(ir) ); break;
1.276 + case 12:snprintf( buf, len, "TST.B #%02Xh, [R0+GBR]", UIMM8(ir) ); break;
1.277 + case 13:snprintf( buf, len, "AND.B #%02Xh, [R0+GBR]", UIMM8(ir) ); break;
1.278 + case 14:snprintf( buf, len, "XOR.B #%02Xh, [R0+GBR]", UIMM8(ir) ); break;
1.279 + case 15:snprintf( buf, len, "OR.B #%02Xh, [R0+GBR]", UIMM8(ir) ); break;
1.280 + }
1.281 + break;
1.282 + case 13:/* 1101xxxxxxxxxxxx */
1.283 + snprintf( buf, len, "MOV.L [$%xh], R%-2d ; <- #%08x", (DISP8(ir)<<2)+(pc&~3)+4, RN(ir),
1.284 + mem_read_long( (DISP8(ir)<<2)+(pc&~3)+4 ) ); break;
1.285 + case 14:/* 1110xxxxxxxxxxxx */
1.286 + snprintf( buf, len, "MOV #%d, R%d", DISP8(ir), RN(ir)); break;
1.287 + case 15:/* 1111xxxxxxxxxxxx */
1.288 + switch( ir&0x000F ) {
1.289 + case 0: snprintf( buf, len, "FADD FR%d, FR%d", RM(ir), RN(ir) ); break;
1.290 + case 1: snprintf( buf, len, "FSUB FR%d, FR%d", RM(ir), RN(ir) ); break;
1.291 + case 2: snprintf( buf, len, "FMUL FR%d, FR%d", RM(ir), RN(ir) ); break;
1.292 + case 3: snprintf( buf, len, "FDIV FR%d, FR%d", RM(ir), RN(ir) ); break;
1.293 + case 4: snprintf( buf, len, "FCMP/EQ FR%d, FR%d", RM(ir), RN(ir) ); break;
1.294 + case 5: snprintf( buf, len, "FCMP/GT FR%d, FR%d", RM(ir), RN(ir) ); break;
1.295 + case 6: snprintf( buf, len, "FMOV.S [R%d+R0], FR%d", RM(ir), RN(ir) ); break;
1.296 + case 7: snprintf( buf, len, "FMOV.S FR%d, [R%d+R0]", RM(ir), RN(ir) ); break;
1.297 + case 8: snprintf( buf, len, "FMOV.S [R%d], FR%d", RM(ir), RN(ir) ); break;
1.298 + case 9: snprintf( buf, len, "FMOV.S [R%d++], FR%d", RM(ir), RN(ir) ); break;
1.299 + case 10:snprintf( buf, len, "FMOV.S FR%d, [R%d]", RM(ir), RN(ir) ); break;
1.300 + case 11:snprintf( buf, len, "FMOV.S FR%d, [--R%d]", RM(ir), RN(ir) ); break;
1.301 + case 12:snprintf( buf, len, "FMOV FR%d, FR%d", RM(ir), RN(ir) ); break;
1.302 + case 13:
1.303 + switch( (ir&0x00F0) >> 4 ) {
1.304 + case 0: snprintf( buf, len, "FSTS FPUL, FR%d", RN(ir) ); break;
1.305 + case 1: snprintf( buf, len, "FLDS FR%d, FPUL", RN(ir) ); break;
1.306 + case 2: snprintf( buf, len, "FLOAT FPUL, FR%d", RN(ir) ); break;
1.307 + case 3: snprintf( buf, len, "FTRC FR%d, FPUL", RN(ir) ); break;
1.308 + case 4: snprintf( buf, len, "FNEG FR%d", RN(ir) ); break;
1.309 + case 5: snprintf( buf, len, "FABS FR%d", RN(ir) ); break;
1.310 + case 6: snprintf( buf, len, "FSQRT FR%d", RN(ir) ); break;
1.311 + case 8: snprintf( buf, len, "FLDI0 FR%d", RN(ir) ); break;
1.312 + case 9: snprintf( buf, len, "FLDI1 FR%d", RN(ir) ); break;
1.313 + case 10:snprintf( buf, len, "FCNVSD FPUL, DR%d", RN(ir)>>1 ); break;
1.314 + case 11:snprintf( buf, len, "FCNVDS DR%d, FPUL", RN(ir)>>1 ); break;
1.315 + case 14:snprintf( buf, len, "FIPR FV%d, FV%d", FVM(ir), FVN(ir) ); break;
1.316 + case 15:
1.317 + if( FVM(ir) == 1 )
1.318 + snprintf( buf, len, "FTRV XMTRX,FV%d", FVN(ir) );
1.319 + else if( ir == 0xFBFD )
1.320 + snprintf( buf, len, "FRCHG " );
1.321 + else if( ir == 0xF3FD )
1.322 + snprintf( buf, len, "FSCHG " );
1.323 + break;
1.324 + default: UNIMP(ir);
1.325 + }
1.326 + break;
1.327 + case 14:snprintf( buf, len, "FMAC FR0, FR%d, FR%d", RM(ir), RN(ir) ); break;
1.328 + default: UNIMP(ir);
1.329 + }
1.330 + break;
1.331 + }
1.332 + return pc+2;
1.333 +}
1.334 +
1.335 +
1.336 +void sh4_disasm_region( FILE *f, int from, int to, int load_addr )
1.337 +{
1.338 + int pc;
1.339 + char buf[80];
1.340 +
1.341 + for( pc = from; pc < to; pc+=2 ) {
1.342 + uint16_t op = mem_read_word( pc );
1.343 + buf[0] = '\0';
1.344 + sh4_disasm_instruction( pc,
1.345 + buf, sizeof(buf) );
1.346 + fprintf( f, " %08x: %04x %s\n", pc + load_addr, op, buf );
1.347 + }
1.348 +}
.