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lxdream.org :: lxdream/src/sh4/mmu.c :: diff
lxdream 0.9.1
released Jun 29
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filename src/sh4/mmu.c
changeset 819:ef4fec10a63a
prev818:2e08d8237d33
next826:69f2c9f1e608
author nkeynes
date Tue Aug 19 22:58:05 2008 +0000 (12 years ago)
permissions -rw-r--r--
last change Add stubs for the (undocumented) SH4 performance counter registers
file annotate diff log raw
1.1 --- a/src/sh4/mmu.c Tue Aug 19 13:00:46 2008 +0000
1.2 +++ b/src/sh4/mmu.c Tue Aug 19 22:58:05 2008 +0000
1.3 @@ -174,6 +174,12 @@
1.4 mmu_set_cache_mode( val & (CCR_OIX|CCR_ORA|CCR_OCE) );
1.5 val &= 0x81A7;
1.6 break;
1.7 + case PMCR1:
1.8 + case PMCR2:
1.9 + if( val != 0 ) {
1.10 + WARN( "Performance counters not implemented" );
1.11 + }
1.12 + break;
1.13 default:
1.14 break;
1.15 }
1.16 @@ -941,3 +947,19 @@
1.17 return TRUE;
1.18 }
1.19
1.20 +/********************************* PMM *************************************/
1.21 +
1.22 +/**
1.23 + * Side note - this is here (rather than in sh4mmio.c) as the control registers
1.24 + * are part of the MMU block, and it seems simplest to keep it all together.
1.25 + */
1.26 +
1.27 +int32_t mmio_region_PMM_read( uint32_t reg )
1.28 +{
1.29 + return MMIO_READ( PMM, reg );
1.30 +}
1.31 +
1.32 +void mmio_region_PMM_write( uint32_t reg, uint32_t val )
1.33 +{
1.34 + /* Read-only */
1.35 +}
.