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lxdream.org :: lxdream/src/sh4/sh4core.c :: diff
lxdream 0.9.1
released Jun 29
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filename src/sh4/sh4core.c
changeset 53:f2981805b929
prev43:0cf3e339cc59
next84:b993a8d8fbf3
author nkeynes
date Thu Dec 29 12:52:29 2005 +0000 (14 years ago)
permissions -rw-r--r--
last change Rewrite timer to be more accurate, also support cycle precision in the future
file annotate diff log raw
1.1 --- a/src/sh4/sh4core.c Mon Dec 26 11:47:15 2005 +0000
1.2 +++ b/src/sh4/sh4core.c Thu Dec 29 12:52:29 2005 +0000
1.3 @@ -1,5 +1,5 @@
1.4 /**
1.5 - * $Id: sh4core.c,v 1.16 2005-12-26 11:47:15 nkeynes Exp $
1.6 + * $Id: sh4core.c,v 1.17 2005-12-29 12:52:29 nkeynes Exp $
1.7 *
1.8 * SH4 emulation core, and parent module for all the SH4 peripheral
1.9 * modules.
1.10 @@ -37,14 +37,6 @@
1.11 #define EXC_FPDISABLE 0x800
1.12 #define EXV_FPDISABLE 0x100
1.13
1.14 -uint32_t sh4_freq = SH4_BASE_RATE;
1.15 -uint32_t sh4_bus_freq = SH4_BASE_RATE;
1.16 -uint32_t sh4_peripheral_freq = SH4_BASE_RATE / 2;
1.17 -
1.18 -uint32_t sh4_cpu_period = 1000 / SH4_BASE_RATE; /* in nanoseconds */
1.19 -uint32_t sh4_bus_period = 1000 / SH4_BASE_RATE;
1.20 -uint32_t sh4_peripheral_period = 2000 / SH4_BASE_RATE;
1.21 -
1.22 /********************** SH4 Module Definition ****************************/
1.23
1.24 void sh4_init( void );
1.25 @@ -139,8 +131,7 @@
1.26 sh4r.sh4_state = SH4_STATE_RUNNING;;
1.27 }
1.28
1.29 - while( sh4r.icount < target && sh4r.sh4_state == SH4_STATE_RUNNING ) {
1.30 - sh4r.icount++;
1.31 + for( sh4r.slice_cycle = 0; sh4r.slice_cycle < nanosecs; sh4r.slice_cycle += sh4_cpu_period ) {
1.32 if( !sh4_execute_instruction() )
1.33 break;
1.34 #ifdef ENABLE_DEBUG_MODE
1.35 @@ -162,14 +153,14 @@
1.36 * we're doing a hard abort - cut the timeslice back to what we
1.37 * actually executed
1.38 */
1.39 - if( target != sh4r.icount && sh4r.sh4_state == SH4_STATE_RUNNING ) {
1.40 - /* Halted - compute time actually executed */
1.41 - nanosecs = (sh4r.icount - start) * sh4_cpu_period;
1.42 + if( sh4r.slice_cycle != nanosecs && sh4r.sh4_state == SH4_STATE_RUNNING ) {
1.43 + nanosecs = sh4r.slice_cycle;
1.44 }
1.45 if( sh4r.sh4_state != SH4_STATE_STANDBY ) {
1.46 TMU_run_slice( nanosecs );
1.47 SCIF_run_slice( nanosecs );
1.48 }
1.49 + sh4r.icount += sh4r.slice_cycle / sh4_cpu_period;
1.50 return nanosecs;
1.51 }
1.52
1.53 @@ -181,12 +172,14 @@
1.54 void sh4_save_state( FILE *f )
1.55 {
1.56 fwrite( &sh4r, sizeof(sh4r), 1, f );
1.57 + TMU_save_state( f );
1.58 SCIF_save_state( f );
1.59 }
1.60
1.61 int sh4_load_state( FILE * f )
1.62 {
1.63 fread( &sh4r, sizeof(sh4r), 1, f );
1.64 + TMU_load_state( f );
1.65 return SCIF_load_state( f );
1.66 }
1.67
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