1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/src/aica/aica.c	Mon Dec 12 10:37:41 2005 +0000
     1.3 @@ -0,0 +1,82 @@
     1.4 +/**
     1.5 + * $Id: aica.c,v 1.1 2005-12-11 12:00:09 nkeynes Exp $
     1.6 + * 
     1.7 + * This is the core sound system (ie the bit which does the actual work)
     1.8 + *
     1.9 + * Copyright (c) 2005 Nathan Keynes.
    1.10 + *
    1.11 + * This program is free software; you can redistribute it and/or modify
    1.12 + * it under the terms of the GNU General Public License as published by
    1.13 + * the Free Software Foundation; either version 2 of the License, or
    1.14 + * (at your option) any later version.
    1.15 + *
    1.16 + * This program is distributed in the hope that it will be useful,
    1.17 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
    1.18 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    1.19 + * GNU General Public License for more details.
    1.20 + */
    1.21 +
    1.22 +#include "dream.h"
    1.23 +#include "aica.h"
    1.24 +#define MMIO_IMPL
    1.25 +#include "aica.h"
    1.26 +
    1.27 +MMIO_REGION_READ_DEFFN( AICA0 )
    1.28 +MMIO_REGION_READ_DEFFN( AICA1 )
    1.29 +MMIO_REGION_READ_DEFFN( AICA2 )
    1.30 +
    1.31 +/**
    1.32 + * Initialize the AICA subsystem. Note requires that 
    1.33 + */
    1.34 +void aica_init( void )
    1.35 +{
    1.36 +    register_io_regions( mmio_list_spu );
    1.37 +    MMIO_NOTRACE(AICA0);
    1.38 +    MMIO_NOTRACE(AICA1);
    1.39 +    arm_mem_init();
    1.40 +}
    1.41 +
    1.42 +void aica_reset( void )
    1.43 +{
    1.44 +
    1.45 +}
    1.46 +
    1.47 +/** Channel register structure:
    1.48 + * 00
    1.49 + * 04
    1.50 + * 08  4  Loop start address
    1.51 + * 0C  4  Loop end address
    1.52 + * 10  4  Volume envelope
    1.53 + * 14
    1.54 + * 18  4  Frequency (floating point 
    1.55 + * 1C
    1.56 + * 20
    1.57 + * 24  1  Pan
    1.58 + * 25  1  ??
    1.59 + * 26  
    1.60 + * 27  
    1.61 + * 28  1  ??
    1.62 + * 29  1  Volume
    1.63 + * 2C
    1.64 + * 30
    1.65 + * 
    1.66 +
    1.67 +/* Write to channels 0-31 */
    1.68 +void mmio_region_AICA0_write( uint32_t reg, uint32_t val )
    1.69 +{
    1.70 +    //    aica_write_channel( reg >> 7, reg % 128, val );
    1.71 +
    1.72 +}
    1.73 +
    1.74 +/* Write to channels 32-64 */
    1.75 +void mmio_region_AICA1_write( uint32_t reg, uint32_t val )
    1.76 +{
    1.77 +    //    aica_write_channel( (reg >> 7) + 32, reg % 128, val );
    1.78 +
    1.79 +}
    1.80 +
    1.81 +/* General registers */
    1.82 +void mmio_region_AICA2_write( uint32_t reg, uint32_t val )
    1.83 +{
    1.84 +
    1.85 +}