1.1 --- a/src/aica/aica.c	Mon Aug 25 09:16:44 2008 +0000
     1.2 +++ b/src/aica/aica.c	Sat Dec 20 03:01:40 2008 +0000
     1.3 @@ -194,16 +194,18 @@
     1.4   */
     1.5  
     1.6  /* Write to channels 0-31 */
     1.7 -void mmio_region_AICA0_write( uint32_t reg, uint32_t val )
     1.8 +MMIO_REGION_WRITE_FN( AICA0, reg, val )
     1.9  {
    1.10 +    reg &= 0xFFF;
    1.11      MMIO_WRITE( AICA0, reg, val );
    1.12      aica_write_channel( reg >> 7, reg % 128, val );
    1.13      //    DEBUG( "AICA0 Write %08X => %08X", val, reg );
    1.14  }
    1.15  
    1.16  /* Write to channels 32-64 */
    1.17 -void mmio_region_AICA1_write( uint32_t reg, uint32_t val )
    1.18 +MMIO_REGION_WRITE_FN( AICA1, reg, val )
    1.19  {
    1.20 +    reg &= 0xFFF;
    1.21      MMIO_WRITE( AICA1, reg, val );
    1.22      aica_write_channel( (reg >> 7) + 32, reg % 128, val );
    1.23      // DEBUG( "AICA1 Write %08X => %08X", val, reg );
    1.24 @@ -212,10 +214,11 @@
    1.25  /**
    1.26   * AICA control registers 
    1.27   */
    1.28 -void mmio_region_AICA2_write( uint32_t reg, uint32_t val )
    1.29 +MMIO_REGION_WRITE_FN( AICA2, reg, val )
    1.30  {
    1.31      uint32_t tmp;
    1.32 -
    1.33 +    reg &= 0xFFF;
    1.34 +    
    1.35      switch( reg ) {
    1.36      case AICA_RESET:
    1.37          tmp = MMIO_READ( AICA2, AICA_RESET );
    1.38 @@ -241,11 +244,12 @@
    1.39      }
    1.40  }
    1.41  
    1.42 -int32_t mmio_region_AICA2_read( uint32_t reg )
    1.43 +MMIO_REGION_READ_FN( AICA2, reg )
    1.44  {
    1.45      audio_channel_t channel;
    1.46      uint32_t channo;
    1.47      int32_t val;
    1.48 +    reg &= 0xFFF;
    1.49      switch( reg ) {
    1.50      case AICA_CHANSTATE:
    1.51          channo = (MMIO_READ( AICA2, AICA_CHANSEL ) >> 8) & 0x3F;
    1.52 @@ -266,9 +270,10 @@
    1.53      }
    1.54  }
    1.55  
    1.56 -int32_t mmio_region_AICARTC_read( uint32_t reg )
    1.57 +MMIO_REGION_READ_FN( AICARTC, reg )
    1.58  {
    1.59      int32_t rv = 0;
    1.60 +    reg &= 0xFFF;
    1.61      switch( reg ) {
    1.62      case AICA_RTCHI:
    1.63          rv = (aica_state.time_of_day >> 16) & 0xFFFF;
    1.64 @@ -281,9 +286,9 @@
    1.65      return rv;
    1.66  }
    1.67  
    1.68 -
    1.69 -void mmio_region_AICARTC_write( uint32_t reg, uint32_t val )
    1.70 +MMIO_REGION_WRITE_FN( AICARTC, reg, val )
    1.71  {
    1.72 +    reg &= 0xFFF;
    1.73      switch( reg ) {
    1.74      case AICA_RTCEN:
    1.75          MMIO_WRITE( AICARTC, reg, val&0x01 );