1.1 --- a/src/sh4/timer.c	Thu Jan 25 10:18:42 2007 +0000
     1.2 +++ b/src/sh4/timer.c	Wed Oct 03 08:22:27 2007 +0000
     1.3 @@ -1,5 +1,5 @@
     1.4  /**
     1.5 - * $Id: timer.c,v 1.7 2007-01-25 10:18:42 nkeynes Exp $
     1.6 + * $Id: timer.c,v 1.8 2007-10-03 08:22:27 nkeynes Exp $
     1.7   * 
     1.8   * SH4 Timer/Clock peripheral modules (CPG, TMU, RTC), combined together to
     1.9   * keep things simple (they intertwine a bit).
    1.10 @@ -28,6 +28,8 @@
    1.11  /* This is the base clock from which all other clocks are derived */
    1.12  uint32_t sh4_input_freq = SH4_BASE_RATE;
    1.13  
    1.14 +uint32_t sh4_cpu_multiplier = 2000; /* = 0.5 * frequency */
    1.15 +
    1.16  uint32_t sh4_cpu_freq = SH4_BASE_RATE;
    1.17  uint32_t sh4_bus_freq = SH4_BASE_RATE;
    1.18  uint32_t sh4_peripheral_freq = SH4_BASE_RATE / 2;
    1.19 @@ -53,7 +55,7 @@
    1.20      case FRQCR: /* Frequency control */
    1.21  	div = ifc_divider[(val >> 6) & 0x07];
    1.22  	sh4_cpu_freq = sh4_input_freq / div;
    1.23 -	sh4_cpu_period = 2000 * div / sh4_input_freq;
    1.24 +	sh4_cpu_period = sh4_cpu_multiplier * div / sh4_input_freq;
    1.25  	div = ifc_divider[(val >> 3) & 0x07];
    1.26  	sh4_bus_freq = sh4_input_freq / div;
    1.27  	sh4_bus_period = 1000 * div / sh4_input_freq;