filename | src/x86dasm/i386-dis.c |
changeset | 968:6fb1481859a4 |
prev | 920:1e6a29649b56 |
next | 1094:d2324eb67223 |
author | nkeynes |
date | Tue Dec 15 08:46:37 2009 +1000 (14 years ago) |
permissions | -rw-r--r-- |
last change | Add side-by-side x86+sh4 disassembly output Print SH4 state information and disassembly of the current block when crashing. Fix delay slot instruction in conditional branch not being marked as a delay-slot instruction in the branch-not-taken path. Rename REG_* defines in cpu.h to avoid conflict with translation defs |
view | annotate | diff | log | raw |
1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
22 July 1988
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
27 /* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
34 #include "x86dasm/dis-asm.h"
35 #include "x86dasm/sysdep.h"
36 #include "x86dasm/x86dasm.h"
37 #include "gettext.h"
39 #define MAXLEN 20
41 #include <setjmp.h>
43 #ifndef UNIXWARE_COMPAT
44 /* Set non-zero for broken, compatible instructions. Set to zero for
45 non-broken opcodes. */
46 #define UNIXWARE_COMPAT 1
47 #endif
49 static int fetch_data (struct disassemble_info *, bfd_byte *);
50 static void ckprefix (void);
51 static const char *prefix_name (int, int);
52 static int print_insn (bfd_vma, disassemble_info *);
53 static void dofloat (int);
54 static void OP_ST (int, int);
55 static void OP_STi (int, int);
56 static int putop (const char *, int);
57 static void oappend (const char *);
58 static void append_seg (void);
59 static void OP_indirE (int, int);
60 static void print_operand_value (char *, int, bfd_vma);
61 static void OP_E (int, int);
62 static void OP_G (int, int);
63 static bfd_vma get64 (void);
64 static bfd_signed_vma get32 (void);
65 static bfd_signed_vma get32s (void);
66 static int get16 (void);
67 static void set_op (bfd_vma, int);
68 static void OP_REG (int, int);
69 static void OP_IMREG (int, int);
70 static void OP_I (int, int);
71 static void OP_I64 (int, int);
72 static void OP_sI (int, int);
73 static void OP_J (int, int);
74 static void OP_SEG (int, int);
75 static void OP_DIR (int, int);
76 static void OP_OFF (int, int);
77 static void OP_OFF64 (int, int);
78 static void ptr_reg (int, int);
79 static void OP_ESreg (int, int);
80 static void OP_DSreg (int, int);
81 static void OP_C (int, int);
82 static void OP_D (int, int);
83 static void OP_T (int, int);
84 static void OP_Rd (int, int);
85 static void OP_MMX (int, int);
86 static void OP_XMM (int, int);
87 static void OP_EM (int, int);
88 static void OP_EX (int, int);
89 static void OP_MS (int, int);
90 static void OP_XS (int, int);
91 static void OP_M (int, int);
92 static void OP_0fae (int, int);
93 static void OP_0f07 (int, int);
94 static void NOP_Fixup (int, int);
95 static void OP_3DNowSuffix (int, int);
96 static void OP_SIMD_Suffix (int, int);
97 static void SIMD_Fixup (int, int);
98 static void PNI_Fixup (int, int);
99 static void INVLPG_Fixup (int, int);
100 static void BadOp (void);
102 struct dis_private {
103 /* Points to first byte not fetched. */
104 bfd_byte *max_fetched;
105 bfd_byte the_buffer[MAXLEN];
106 bfd_vma insn_start;
107 int orig_sizeflag;
108 jmp_buf bailout;
109 };
111 /* The opcode for the fwait instruction, which we treat as a prefix
112 when we can. */
113 #define FWAIT_OPCODE (0x9b)
115 /* Set to 1 for 64bit mode disassembly. */
116 static int mode_64bit;
118 /* Flags for the prefixes for the current instruction. See below. */
119 static int prefixes;
121 /* REX prefix the current instruction. See below. */
122 static int rex;
123 /* Bits of REX we've already used. */
124 static int rex_used;
125 #define REX_MODE64 8
126 #define REX_EXTX 4
127 #define REX_EXTY 2
128 #define REX_EXTZ 1
129 /* Mark parts used in the REX prefix. When we are testing for
130 empty prefix (for 8bit register REX extension), just mask it
131 out. Otherwise test for REX bit is excuse for existence of REX
132 only in case value is nonzero. */
133 #define USED_REX(value) \
134 { \
135 if (value) \
136 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
137 else \
138 rex_used |= 0x40; \
139 }
141 /* Flags for prefixes which we somehow handled when printing the
142 current instruction. */
143 static int used_prefixes;
145 /* Flags stored in PREFIXES. */
146 #define PREFIX_REPZ 1
147 #define PREFIX_REPNZ 2
148 #define PREFIX_LOCK 4
149 #define PREFIX_CS 8
150 #define PREFIX_SS 0x10
151 #define PREFIX_DS 0x20
152 #define PREFIX_ES 0x40
153 #define PREFIX_FS 0x80
154 #define PREFIX_GS 0x100
155 #define PREFIX_DATA 0x200
156 #define PREFIX_ADDR 0x400
157 #define PREFIX_FWAIT 0x800
159 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
160 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
161 on error. */
162 #define FETCH_DATA(info, addr) \
163 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
164 ? 1 : fetch_data ((info), (addr)))
166 static int
167 fetch_data (struct disassemble_info *info, bfd_byte *addr)
168 {
169 int status;
170 struct dis_private *priv = (struct dis_private *) info->private_data;
171 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
173 status = (*info->read_memory_func) (start,
174 priv->max_fetched,
175 addr - priv->max_fetched,
176 info);
177 if (status != 0)
178 {
179 /* If we did manage to read at least one byte, then
180 print_insn_i386 will do something sensible. Otherwise, print
181 an error. We do that here because this is where we know
182 STATUS. */
183 if (priv->max_fetched == priv->the_buffer)
184 (*info->memory_error_func) (status, start, info);
185 longjmp (priv->bailout, 1);
186 }
187 else
188 priv->max_fetched = addr;
189 return 1;
190 }
192 #define XX NULL, 0
194 #define Eb OP_E, b_mode
195 #define Ev OP_E, v_mode
196 #define Ed OP_E, d_mode
197 #define Eq OP_E, q_mode
198 #define Edq OP_E, dq_mode
199 #define Edqw OP_E, dqw_mode
200 #define indirEv OP_indirE, v_mode
201 #define indirEp OP_indirE, f_mode
202 #define Ew OP_E, w_mode
203 #define Ma OP_E, v_mode
204 #define M OP_M, 0 /* lea, lgdt, etc. */
205 #define Mp OP_M, f_mode /* 32 or 48 bit memory operand for LDS, LES etc */
206 #define Gb OP_G, b_mode
207 #define Gv OP_G, v_mode
208 #define Gd OP_G, d_mode
209 #define Gdq OP_G, dq_mode
210 #define Gw OP_G, w_mode
211 #define Rd OP_Rd, d_mode
212 #define Rm OP_Rd, m_mode
213 #define Ib OP_I, b_mode
214 #define sIb OP_sI, b_mode /* sign extened byte */
215 #define Iv OP_I, v_mode
216 #define Iq OP_I, q_mode
217 #define Iv64 OP_I64, v_mode
218 #define Iw OP_I, w_mode
219 #define I1 OP_I, const_1_mode
220 #define Jb OP_J, b_mode
221 #define Jv OP_J, v_mode
222 #define Cm OP_C, m_mode
223 #define Dm OP_D, m_mode
224 #define Td OP_T, d_mode
226 #define RMeAX OP_REG, eAX_reg
227 #define RMeBX OP_REG, eBX_reg
228 #define RMeCX OP_REG, eCX_reg
229 #define RMeDX OP_REG, eDX_reg
230 #define RMeSP OP_REG, eSP_reg
231 #define RMeBP OP_REG, eBP_reg
232 #define RMeSI OP_REG, eSI_reg
233 #define RMeDI OP_REG, eDI_reg
234 #define RMrAX OP_REG, rAX_reg
235 #define RMrBX OP_REG, rBX_reg
236 #define RMrCX OP_REG, rCX_reg
237 #define RMrDX OP_REG, rDX_reg
238 #define RMrSP OP_REG, rSP_reg
239 #define RMrBP OP_REG, rBP_reg
240 #define RMrSI OP_REG, rSI_reg
241 #define RMrDI OP_REG, rDI_reg
242 #define RMAL OP_REG, al_reg
243 #define RMAL OP_REG, al_reg
244 #define RMCL OP_REG, cl_reg
245 #define RMDL OP_REG, dl_reg
246 #define RMBL OP_REG, bl_reg
247 #define RMAH OP_REG, ah_reg
248 #define RMCH OP_REG, ch_reg
249 #define RMDH OP_REG, dh_reg
250 #define RMBH OP_REG, bh_reg
251 #define RMAX OP_REG, ax_reg
252 #define RMDX OP_REG, dx_reg
254 #define eAX OP_IMREG, eAX_reg
255 #define eBX OP_IMREG, eBX_reg
256 #define eCX OP_IMREG, eCX_reg
257 #define eDX OP_IMREG, eDX_reg
258 #define eSP OP_IMREG, eSP_reg
259 #define eBP OP_IMREG, eBP_reg
260 #define eSI OP_IMREG, eSI_reg
261 #define eDI OP_IMREG, eDI_reg
262 #define AL OP_IMREG, al_reg
263 #define AL OP_IMREG, al_reg
264 #define CL OP_IMREG, cl_reg
265 #define DL OP_IMREG, dl_reg
266 #define BL OP_IMREG, bl_reg
267 #define AH OP_IMREG, ah_reg
268 #define CH OP_IMREG, ch_reg
269 #define DH OP_IMREG, dh_reg
270 #define BH OP_IMREG, bh_reg
271 #define AX OP_IMREG, ax_reg
272 #define DX OP_IMREG, dx_reg
273 #define indirDX OP_IMREG, indir_dx_reg
275 #define Sw OP_SEG, w_mode
276 #define Ap OP_DIR, 0
277 #define Ob OP_OFF, b_mode
278 #define Ob64 OP_OFF64, b_mode
279 #define Ov OP_OFF, v_mode
280 #define Ov64 OP_OFF64, v_mode
281 #define Xb OP_DSreg, eSI_reg
282 #define Xv OP_DSreg, eSI_reg
283 #define Yb OP_ESreg, eDI_reg
284 #define Yv OP_ESreg, eDI_reg
285 #define DSBX OP_DSreg, eBX_reg
287 #define es OP_REG, es_reg
288 #define ss OP_REG, ss_reg
289 #define cs OP_REG, cs_reg
290 #define ds OP_REG, ds_reg
291 #define fs OP_REG, fs_reg
292 #define gs OP_REG, gs_reg
294 #define MX OP_MMX, 0
295 #define XM OP_XMM, 0
296 #define EM OP_EM, v_mode
297 #define EX OP_EX, v_mode
298 #define MS OP_MS, v_mode
299 #define XS OP_XS, v_mode
300 #define OPSUF OP_3DNowSuffix, 0
301 #define OPSIMD OP_SIMD_Suffix, 0
303 #define cond_jump_flag NULL, cond_jump_mode
304 #define loop_jcxz_flag NULL, loop_jcxz_mode
306 /* bits in sizeflag */
307 #define SUFFIX_ALWAYS 4
308 #define AFLAG 2
309 #define DFLAG 1
311 #define b_mode 1 /* byte operand */
312 #define v_mode 2 /* operand size depends on prefixes */
313 #define w_mode 3 /* word operand */
314 #define d_mode 4 /* double word operand */
315 #define q_mode 5 /* quad word operand */
316 #define t_mode 6 /* ten-byte operand */
317 #define x_mode 7 /* 16-byte XMM operand */
318 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
319 #define cond_jump_mode 9
320 #define loop_jcxz_mode 10
321 #define dq_mode 11 /* operand size depends on REX prefixes. */
322 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
323 #define f_mode 13 /* 4- or 6-byte pointer operand */
324 #define const_1_mode 14
326 #define es_reg 100
327 #define cs_reg 101
328 #define ss_reg 102
329 #define ds_reg 103
330 #define fs_reg 104
331 #define gs_reg 105
333 #define eAX_reg 108
334 #define eCX_reg 109
335 #define eDX_reg 110
336 #define eBX_reg 111
337 #define eSP_reg 112
338 #define eBP_reg 113
339 #define eSI_reg 114
340 #define eDI_reg 115
342 #define al_reg 116
343 #define cl_reg 117
344 #define dl_reg 118
345 #define bl_reg 119
346 #define ah_reg 120
347 #define ch_reg 121
348 #define dh_reg 122
349 #define bh_reg 123
351 #define ax_reg 124
352 #define cx_reg 125
353 #define dx_reg 126
354 #define bx_reg 127
355 #define sp_reg 128
356 #define bp_reg 129
357 #define si_reg 130
358 #define di_reg 131
360 #define rAX_reg 132
361 #define rCX_reg 133
362 #define rDX_reg 134
363 #define rBX_reg 135
364 #define rSP_reg 136
365 #define rBP_reg 137
366 #define rSI_reg 138
367 #define rDI_reg 139
369 #define indir_dx_reg 150
371 #define FLOATCODE 1
372 #define USE_GROUPS 2
373 #define USE_PREFIX_USER_TABLE 3
374 #define X86_64_SPECIAL 4
376 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
378 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
379 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
380 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
381 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
382 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
383 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
384 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
385 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
386 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
387 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
388 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
389 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
390 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
391 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
392 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
393 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
394 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
395 #define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
396 #define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
397 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
398 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
399 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
400 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
401 #define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0
402 #define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0
404 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
405 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
406 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
407 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
408 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
409 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
410 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
411 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
412 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
413 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
414 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
415 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
416 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
417 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
418 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
419 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
420 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
421 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
422 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
423 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
424 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
425 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
426 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
427 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
428 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
429 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
430 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
431 #define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0
432 #define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0
433 #define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0
434 #define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0
435 #define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0
436 #define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0
438 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
440 typedef void (*op_rtn) (int bytemode, int sizeflag);
442 struct dis386 {
443 const char *name;
444 op_rtn op1;
445 int bytemode1;
446 op_rtn op2;
447 int bytemode2;
448 op_rtn op3;
449 int bytemode3;
450 };
452 /* Upper case letters in the instruction names here are macros.
453 'A' => print 'b' if no register operands or suffix_always is true
454 'B' => print 'b' if suffix_always is true
455 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
456 . size prefix
457 'E' => print 'e' if 32-bit form of jcxz
458 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
459 'H' => print ",pt" or ",pn" branch hint
460 'I' => honor following macro letter even in Intel mode (implemented only
461 . for some of the macro letters)
462 'J' => print 'l'
463 'L' => print 'l' if suffix_always is true
464 'N' => print 'n' if instruction has no wait "prefix"
465 'O' => print 'd', or 'o'
466 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
467 . or suffix_always is true. print 'q' if rex prefix is present.
468 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
469 . is true
470 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
471 'S' => print 'w', 'l' or 'q' if suffix_always is true
472 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
473 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
474 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
475 'X' => print 's', 'd' depending on data16 prefix (for XMM)
476 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
478 Many of the above letters print nothing in Intel mode. See "putop"
479 for the details.
481 Braces '{' and '}', and vertical bars '|', indicate alternative
482 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
483 modes. In cases where there are only two alternatives, the X86_64
484 instruction is reserved, and "(bad)" is printed.
485 */
487 static const struct dis386 dis386[] = {
488 /* 00 */
489 { "addB", Eb, Gb, XX },
490 { "addS", Ev, Gv, XX },
491 { "addB", Gb, Eb, XX },
492 { "addS", Gv, Ev, XX },
493 { "addB", AL, Ib, XX },
494 { "addS", eAX, Iv, XX },
495 { "push{T|}", es, XX, XX },
496 { "pop{T|}", es, XX, XX },
497 /* 08 */
498 { "orB", Eb, Gb, XX },
499 { "orS", Ev, Gv, XX },
500 { "orB", Gb, Eb, XX },
501 { "orS", Gv, Ev, XX },
502 { "orB", AL, Ib, XX },
503 { "orS", eAX, Iv, XX },
504 { "push{T|}", cs, XX, XX },
505 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
506 /* 10 */
507 { "adcB", Eb, Gb, XX },
508 { "adcS", Ev, Gv, XX },
509 { "adcB", Gb, Eb, XX },
510 { "adcS", Gv, Ev, XX },
511 { "adcB", AL, Ib, XX },
512 { "adcS", eAX, Iv, XX },
513 { "push{T|}", ss, XX, XX },
514 { "popT|}", ss, XX, XX },
515 /* 18 */
516 { "sbbB", Eb, Gb, XX },
517 { "sbbS", Ev, Gv, XX },
518 { "sbbB", Gb, Eb, XX },
519 { "sbbS", Gv, Ev, XX },
520 { "sbbB", AL, Ib, XX },
521 { "sbbS", eAX, Iv, XX },
522 { "push{T|}", ds, XX, XX },
523 { "pop{T|}", ds, XX, XX },
524 /* 20 */
525 { "andB", Eb, Gb, XX },
526 { "andS", Ev, Gv, XX },
527 { "andB", Gb, Eb, XX },
528 { "andS", Gv, Ev, XX },
529 { "andB", AL, Ib, XX },
530 { "andS", eAX, Iv, XX },
531 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
532 { "daa{|}", XX, XX, XX },
533 /* 28 */
534 { "subB", Eb, Gb, XX },
535 { "subS", Ev, Gv, XX },
536 { "subB", Gb, Eb, XX },
537 { "subS", Gv, Ev, XX },
538 { "subB", AL, Ib, XX },
539 { "subS", eAX, Iv, XX },
540 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
541 { "das{|}", XX, XX, XX },
542 /* 30 */
543 { "xorB", Eb, Gb, XX },
544 { "xorS", Ev, Gv, XX },
545 { "xorB", Gb, Eb, XX },
546 { "xorS", Gv, Ev, XX },
547 { "xorB", AL, Ib, XX },
548 { "xorS", eAX, Iv, XX },
549 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
550 { "aaa{|}", XX, XX, XX },
551 /* 38 */
552 { "cmpB", Eb, Gb, XX },
553 { "cmpS", Ev, Gv, XX },
554 { "cmpB", Gb, Eb, XX },
555 { "cmpS", Gv, Ev, XX },
556 { "cmpB", AL, Ib, XX },
557 { "cmpS", eAX, Iv, XX },
558 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
559 { "aas{|}", XX, XX, XX },
560 /* 40 */
561 { "inc{S|}", RMeAX, XX, XX },
562 { "inc{S|}", RMeCX, XX, XX },
563 { "inc{S|}", RMeDX, XX, XX },
564 { "inc{S|}", RMeBX, XX, XX },
565 { "inc{S|}", RMeSP, XX, XX },
566 { "inc{S|}", RMeBP, XX, XX },
567 { "inc{S|}", RMeSI, XX, XX },
568 { "inc{S|}", RMeDI, XX, XX },
569 /* 48 */
570 { "dec{S|}", RMeAX, XX, XX },
571 { "dec{S|}", RMeCX, XX, XX },
572 { "dec{S|}", RMeDX, XX, XX },
573 { "dec{S|}", RMeBX, XX, XX },
574 { "dec{S|}", RMeSP, XX, XX },
575 { "dec{S|}", RMeBP, XX, XX },
576 { "dec{S|}", RMeSI, XX, XX },
577 { "dec{S|}", RMeDI, XX, XX },
578 /* 50 */
579 { "pushS", RMrAX, XX, XX },
580 { "pushS", RMrCX, XX, XX },
581 { "pushS", RMrDX, XX, XX },
582 { "pushS", RMrBX, XX, XX },
583 { "pushS", RMrSP, XX, XX },
584 { "pushS", RMrBP, XX, XX },
585 { "pushS", RMrSI, XX, XX },
586 { "pushS", RMrDI, XX, XX },
587 /* 58 */
588 { "popS", RMrAX, XX, XX },
589 { "popS", RMrCX, XX, XX },
590 { "popS", RMrDX, XX, XX },
591 { "popS", RMrBX, XX, XX },
592 { "popS", RMrSP, XX, XX },
593 { "popS", RMrBP, XX, XX },
594 { "popS", RMrSI, XX, XX },
595 { "popS", RMrDI, XX, XX },
596 /* 60 */
597 { "pusha{P|}", XX, XX, XX },
598 { "popa{P|}", XX, XX, XX },
599 { "bound{S|}", Gv, Ma, XX },
600 { X86_64_0 },
601 { "(bad)", XX, XX, XX }, /* seg fs */
602 { "(bad)", XX, XX, XX }, /* seg gs */
603 { "(bad)", XX, XX, XX }, /* op size prefix */
604 { "(bad)", XX, XX, XX }, /* adr size prefix */
605 /* 68 */
606 { "pushT", Iq, XX, XX },
607 { "imulS", Gv, Ev, Iv },
608 { "pushT", sIb, XX, XX },
609 { "imulS", Gv, Ev, sIb },
610 { "ins{b||b|}", Yb, indirDX, XX },
611 { "ins{R||R|}", Yv, indirDX, XX },
612 { "outs{b||b|}", indirDX, Xb, XX },
613 { "outs{R||R|}", indirDX, Xv, XX },
614 /* 70 */
615 { "joH", Jb, XX, cond_jump_flag },
616 { "jnoH", Jb, XX, cond_jump_flag },
617 { "jbH", Jb, XX, cond_jump_flag },
618 { "jaeH", Jb, XX, cond_jump_flag },
619 { "jeH", Jb, XX, cond_jump_flag },
620 { "jneH", Jb, XX, cond_jump_flag },
621 { "jbeH", Jb, XX, cond_jump_flag },
622 { "jaH", Jb, XX, cond_jump_flag },
623 /* 78 */
624 { "jsH", Jb, XX, cond_jump_flag },
625 { "jnsH", Jb, XX, cond_jump_flag },
626 { "jpH", Jb, XX, cond_jump_flag },
627 { "jnpH", Jb, XX, cond_jump_flag },
628 { "jlH", Jb, XX, cond_jump_flag },
629 { "jgeH", Jb, XX, cond_jump_flag },
630 { "jleH", Jb, XX, cond_jump_flag },
631 { "jgH", Jb, XX, cond_jump_flag },
632 /* 80 */
633 { GRP1b },
634 { GRP1S },
635 { "(bad)", XX, XX, XX },
636 { GRP1Ss },
637 { "testB", Eb, Gb, XX },
638 { "testS", Ev, Gv, XX },
639 { "xchgB", Eb, Gb, XX },
640 { "xchgS", Ev, Gv, XX },
641 /* 88 */
642 { "movB", Eb, Gb, XX },
643 { "movS", Ev, Gv, XX },
644 { "movB", Gb, Eb, XX },
645 { "movS", Gv, Ev, XX },
646 { "movQ", Ev, Sw, XX },
647 { "leaS", Gv, M, XX },
648 { "movQ", Sw, Ev, XX },
649 { "popU", Ev, XX, XX },
650 /* 90 */
651 { "nop", NOP_Fixup, 0, XX, XX },
652 { "xchgS", RMeCX, eAX, XX },
653 { "xchgS", RMeDX, eAX, XX },
654 { "xchgS", RMeBX, eAX, XX },
655 { "xchgS", RMeSP, eAX, XX },
656 { "xchgS", RMeBP, eAX, XX },
657 { "xchgS", RMeSI, eAX, XX },
658 { "xchgS", RMeDI, eAX, XX },
659 /* 98 */
660 { "cW{tR||tR|}", XX, XX, XX },
661 { "cR{tO||tO|}", XX, XX, XX },
662 { "Jcall{T|}", Ap, XX, XX },
663 { "(bad)", XX, XX, XX }, /* fwait */
664 { "pushfT", XX, XX, XX },
665 { "popfT", XX, XX, XX },
666 { "sahf{|}", XX, XX, XX },
667 { "lahf{|}", XX, XX, XX },
668 /* a0 */
669 { "movB", AL, Ob64, XX },
670 { "movS", eAX, Ov64, XX },
671 { "movB", Ob64, AL, XX },
672 { "movS", Ov64, eAX, XX },
673 { "movs{b||b|}", Yb, Xb, XX },
674 { "movs{R||R|}", Yv, Xv, XX },
675 { "cmps{b||b|}", Xb, Yb, XX },
676 { "cmps{R||R|}", Xv, Yv, XX },
677 /* a8 */
678 { "testB", AL, Ib, XX },
679 { "testS", eAX, Iv, XX },
680 { "stosB", Yb, AL, XX },
681 { "stosS", Yv, eAX, XX },
682 { "lodsB", AL, Xb, XX },
683 { "lodsS", eAX, Xv, XX },
684 { "scasB", AL, Yb, XX },
685 { "scasS", eAX, Yv, XX },
686 /* b0 */
687 { "movB", RMAL, Ib, XX },
688 { "movB", RMCL, Ib, XX },
689 { "movB", RMDL, Ib, XX },
690 { "movB", RMBL, Ib, XX },
691 { "movB", RMAH, Ib, XX },
692 { "movB", RMCH, Ib, XX },
693 { "movB", RMDH, Ib, XX },
694 { "movB", RMBH, Ib, XX },
695 /* b8 */
696 { "movS", RMeAX, Iv64, XX },
697 { "movS", RMeCX, Iv64, XX },
698 { "movS", RMeDX, Iv64, XX },
699 { "movS", RMeBX, Iv64, XX },
700 { "movS", RMeSP, Iv64, XX },
701 { "movS", RMeBP, Iv64, XX },
702 { "movS", RMeSI, Iv64, XX },
703 { "movS", RMeDI, Iv64, XX },
704 /* c0 */
705 { GRP2b },
706 { GRP2S },
707 { "retT", Iw, XX, XX },
708 { "retT", XX, XX, XX },
709 { "les{S|}", Gv, Mp, XX },
710 { "ldsS", Gv, Mp, XX },
711 { "movA", Eb, Ib, XX },
712 { "movQ", Ev, Iv, XX },
713 /* c8 */
714 { "enterT", Iw, Ib, XX },
715 { "leaveT", XX, XX, XX },
716 { "lretP", Iw, XX, XX },
717 { "lretP", XX, XX, XX },
718 { "int3", XX, XX, XX },
719 { "int", Ib, XX, XX },
720 { "into{|}", XX, XX, XX },
721 { "iretP", XX, XX, XX },
722 /* d0 */
723 { GRP2b_one },
724 { GRP2S_one },
725 { GRP2b_cl },
726 { GRP2S_cl },
727 { "aam{|}", sIb, XX, XX },
728 { "aad{|}", sIb, XX, XX },
729 { "(bad)", XX, XX, XX },
730 { "xlat", DSBX, XX, XX },
731 /* d8 */
732 { FLOAT },
733 { FLOAT },
734 { FLOAT },
735 { FLOAT },
736 { FLOAT },
737 { FLOAT },
738 { FLOAT },
739 { FLOAT },
740 /* e0 */
741 { "loopneFH", Jb, XX, loop_jcxz_flag },
742 { "loopeFH", Jb, XX, loop_jcxz_flag },
743 { "loopFH", Jb, XX, loop_jcxz_flag },
744 { "jEcxzH", Jb, XX, loop_jcxz_flag },
745 { "inB", AL, Ib, XX },
746 { "inS", eAX, Ib, XX },
747 { "outB", Ib, AL, XX },
748 { "outS", Ib, eAX, XX },
749 /* e8 */
750 { "callT", Jv, XX, XX },
751 { "jmpT", Jv, XX, XX },
752 { "Jjmp{T|}", Ap, XX, XX },
753 { "jmp", Jb, XX, XX },
754 { "inB", AL, indirDX, XX },
755 { "inS", eAX, indirDX, XX },
756 { "outB", indirDX, AL, XX },
757 { "outS", indirDX, eAX, XX },
758 /* f0 */
759 { "(bad)", XX, XX, XX }, /* lock prefix */
760 { "icebp", XX, XX, XX },
761 { "(bad)", XX, XX, XX }, /* repne */
762 { "(bad)", XX, XX, XX }, /* repz */
763 { "hlt", XX, XX, XX },
764 { "cmc", XX, XX, XX },
765 { GRP3b },
766 { GRP3S },
767 /* f8 */
768 { "clc", XX, XX, XX },
769 { "stc", XX, XX, XX },
770 { "cli", XX, XX, XX },
771 { "sti", XX, XX, XX },
772 { "cld", XX, XX, XX },
773 { "std", XX, XX, XX },
774 { GRP4 },
775 { GRP5 },
776 };
778 static const struct dis386 dis386_twobyte[] = {
779 /* 00 */
780 { GRP6 },
781 { GRP7 },
782 { "larS", Gv, Ew, XX },
783 { "lslS", Gv, Ew, XX },
784 { "(bad)", XX, XX, XX },
785 { "syscall", XX, XX, XX },
786 { "clts", XX, XX, XX },
787 { "sysretP", XX, XX, XX },
788 /* 08 */
789 { "invd", XX, XX, XX },
790 { "wbinvd", XX, XX, XX },
791 { "(bad)", XX, XX, XX },
792 { "ud2a", XX, XX, XX },
793 { "(bad)", XX, XX, XX },
794 { GRPAMD },
795 { "femms", XX, XX, XX },
796 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */
797 /* 10 */
798 { PREGRP8 },
799 { PREGRP9 },
800 { PREGRP30 },
801 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
802 { "unpcklpX", XM, EX, XX },
803 { "unpckhpX", XM, EX, XX },
804 { PREGRP31 },
805 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
806 /* 18 */
807 { GRP14 },
808 { "(bad)", XX, XX, XX },
809 { "(bad)", XX, XX, XX },
810 { "(bad)", XX, XX, XX },
811 { "(bad)", XX, XX, XX },
812 { "(bad)", XX, XX, XX },
813 { "(bad)", XX, XX, XX },
814 { "(bad)", XX, XX, XX },
815 /* 20 */
816 { "movL", Rm, Cm, XX },
817 { "movL", Rm, Dm, XX },
818 { "movL", Cm, Rm, XX },
819 { "movL", Dm, Rm, XX },
820 { "movL", Rd, Td, XX },
821 { "(bad)", XX, XX, XX },
822 { "movL", Td, Rd, XX },
823 { "(bad)", XX, XX, XX },
824 /* 28 */
825 { "movapX", XM, EX, XX },
826 { "movapX", EX, XM, XX },
827 { PREGRP2 },
828 { "movntpX", Ev, XM, XX },
829 { PREGRP4 },
830 { PREGRP3 },
831 { "ucomisX", XM,EX, XX },
832 { "comisX", XM,EX, XX },
833 /* 30 */
834 { "wrmsr", XX, XX, XX },
835 { "rdtsc", XX, XX, XX },
836 { "rdmsr", XX, XX, XX },
837 { "rdpmc", XX, XX, XX },
838 { "sysenter", XX, XX, XX },
839 { "sysexit", XX, XX, XX },
840 { "(bad)", XX, XX, XX },
841 { "(bad)", XX, XX, XX },
842 /* 38 */
843 { "(bad)", XX, XX, XX },
844 { "(bad)", XX, XX, XX },
845 { "(bad)", XX, XX, XX },
846 { "(bad)", XX, XX, XX },
847 { "(bad)", XX, XX, XX },
848 { "(bad)", XX, XX, XX },
849 { "(bad)", XX, XX, XX },
850 { "(bad)", XX, XX, XX },
851 /* 40 */
852 { "cmovo", Gv, Ev, XX },
853 { "cmovno", Gv, Ev, XX },
854 { "cmovb", Gv, Ev, XX },
855 { "cmovae", Gv, Ev, XX },
856 { "cmove", Gv, Ev, XX },
857 { "cmovne", Gv, Ev, XX },
858 { "cmovbe", Gv, Ev, XX },
859 { "cmova", Gv, Ev, XX },
860 /* 48 */
861 { "cmovs", Gv, Ev, XX },
862 { "cmovns", Gv, Ev, XX },
863 { "cmovp", Gv, Ev, XX },
864 { "cmovnp", Gv, Ev, XX },
865 { "cmovl", Gv, Ev, XX },
866 { "cmovge", Gv, Ev, XX },
867 { "cmovle", Gv, Ev, XX },
868 { "cmovg", Gv, Ev, XX },
869 /* 50 */
870 { "movmskpX", Gdq, XS, XX },
871 { PREGRP13 },
872 { PREGRP12 },
873 { PREGRP11 },
874 { "andpX", XM, EX, XX },
875 { "andnpX", XM, EX, XX },
876 { "orpX", XM, EX, XX },
877 { "xorpX", XM, EX, XX },
878 /* 58 */
879 { PREGRP0 },
880 { PREGRP10 },
881 { PREGRP17 },
882 { PREGRP16 },
883 { PREGRP14 },
884 { PREGRP7 },
885 { PREGRP5 },
886 { PREGRP6 },
887 /* 60 */
888 { "punpcklbw", MX, EM, XX },
889 { "punpcklwd", MX, EM, XX },
890 { "punpckldq", MX, EM, XX },
891 { "packsswb", MX, EM, XX },
892 { "pcmpgtb", MX, EM, XX },
893 { "pcmpgtw", MX, EM, XX },
894 { "pcmpgtd", MX, EM, XX },
895 { "packuswb", MX, EM, XX },
896 /* 68 */
897 { "punpckhbw", MX, EM, XX },
898 { "punpckhwd", MX, EM, XX },
899 { "punpckhdq", MX, EM, XX },
900 { "packssdw", MX, EM, XX },
901 { PREGRP26 },
902 { PREGRP24 },
903 { "movd", MX, Edq, XX },
904 { PREGRP19 },
905 /* 70 */
906 { PREGRP22 },
907 { GRP10 },
908 { GRP11 },
909 { GRP12 },
910 { "pcmpeqb", MX, EM, XX },
911 { "pcmpeqw", MX, EM, XX },
912 { "pcmpeqd", MX, EM, XX },
913 { "emms", XX, XX, XX },
914 /* 78 */
915 { "(bad)", XX, XX, XX },
916 { "(bad)", XX, XX, XX },
917 { "(bad)", XX, XX, XX },
918 { "(bad)", XX, XX, XX },
919 { PREGRP28 },
920 { PREGRP29 },
921 { PREGRP23 },
922 { PREGRP20 },
923 /* 80 */
924 { "joH", Jv, XX, cond_jump_flag },
925 { "jnoH", Jv, XX, cond_jump_flag },
926 { "jbH", Jv, XX, cond_jump_flag },
927 { "jaeH", Jv, XX, cond_jump_flag },
928 { "jeH", Jv, XX, cond_jump_flag },
929 { "jneH", Jv, XX, cond_jump_flag },
930 { "jbeH", Jv, XX, cond_jump_flag },
931 { "jaH", Jv, XX, cond_jump_flag },
932 /* 88 */
933 { "jsH", Jv, XX, cond_jump_flag },
934 { "jnsH", Jv, XX, cond_jump_flag },
935 { "jpH", Jv, XX, cond_jump_flag },
936 { "jnpH", Jv, XX, cond_jump_flag },
937 { "jlH", Jv, XX, cond_jump_flag },
938 { "jgeH", Jv, XX, cond_jump_flag },
939 { "jleH", Jv, XX, cond_jump_flag },
940 { "jgH", Jv, XX, cond_jump_flag },
941 /* 90 */
942 { "seto", Eb, XX, XX },
943 { "setno", Eb, XX, XX },
944 { "setb", Eb, XX, XX },
945 { "setae", Eb, XX, XX },
946 { "sete", Eb, XX, XX },
947 { "setne", Eb, XX, XX },
948 { "setbe", Eb, XX, XX },
949 { "seta", Eb, XX, XX },
950 /* 98 */
951 { "sets", Eb, XX, XX },
952 { "setns", Eb, XX, XX },
953 { "setp", Eb, XX, XX },
954 { "setnp", Eb, XX, XX },
955 { "setl", Eb, XX, XX },
956 { "setge", Eb, XX, XX },
957 { "setle", Eb, XX, XX },
958 { "setg", Eb, XX, XX },
959 /* a0 */
960 { "pushT", fs, XX, XX },
961 { "popT", fs, XX, XX },
962 { "cpuid", XX, XX, XX },
963 { "btS", Ev, Gv, XX },
964 { "shldS", Ev, Gv, Ib },
965 { "shldS", Ev, Gv, CL },
966 { GRPPADLCK2 },
967 { GRPPADLCK1 },
968 /* a8 */
969 { "pushT", gs, XX, XX },
970 { "popT", gs, XX, XX },
971 { "rsm", XX, XX, XX },
972 { "btsS", Ev, Gv, XX },
973 { "shrdS", Ev, Gv, Ib },
974 { "shrdS", Ev, Gv, CL },
975 { GRP13 },
976 { "imulS", Gv, Ev, XX },
977 /* b0 */
978 { "cmpxchgB", Eb, Gb, XX },
979 { "cmpxchgS", Ev, Gv, XX },
980 { "lssS", Gv, Mp, XX },
981 { "btrS", Ev, Gv, XX },
982 { "lfsS", Gv, Mp, XX },
983 { "lgsS", Gv, Mp, XX },
984 { "movz{bR|x|bR|x}", Gv, Eb, XX },
985 { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */
986 /* b8 */
987 { "(bad)", XX, XX, XX },
988 { "ud2b", XX, XX, XX },
989 { GRP8 },
990 { "btcS", Ev, Gv, XX },
991 { "bsfS", Gv, Ev, XX },
992 { "bsrS", Gv, Ev, XX },
993 { "movs{bR|x|bR|x}", Gv, Eb, XX },
994 { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */
995 /* c0 */
996 { "xaddB", Eb, Gb, XX },
997 { "xaddS", Ev, Gv, XX },
998 { PREGRP1 },
999 { "movntiS", Ev, Gv, XX },
1000 { "pinsrw", MX, Edqw, Ib },
1001 { "pextrw", Gdq, MS, Ib },
1002 { "shufpX", XM, EX, Ib },
1003 { GRP9 },
1004 /* c8 */
1005 { "bswap", RMeAX, XX, XX },
1006 { "bswap", RMeCX, XX, XX },
1007 { "bswap", RMeDX, XX, XX },
1008 { "bswap", RMeBX, XX, XX },
1009 { "bswap", RMeSP, XX, XX },
1010 { "bswap", RMeBP, XX, XX },
1011 { "bswap", RMeSI, XX, XX },
1012 { "bswap", RMeDI, XX, XX },
1013 /* d0 */
1014 { PREGRP27 },
1015 { "psrlw", MX, EM, XX },
1016 { "psrld", MX, EM, XX },
1017 { "psrlq", MX, EM, XX },
1018 { "paddq", MX, EM, XX },
1019 { "pmullw", MX, EM, XX },
1020 { PREGRP21 },
1021 { "pmovmskb", Gdq, MS, XX },
1022 /* d8 */
1023 { "psubusb", MX, EM, XX },
1024 { "psubusw", MX, EM, XX },
1025 { "pminub", MX, EM, XX },
1026 { "pand", MX, EM, XX },
1027 { "paddusb", MX, EM, XX },
1028 { "paddusw", MX, EM, XX },
1029 { "pmaxub", MX, EM, XX },
1030 { "pandn", MX, EM, XX },
1031 /* e0 */
1032 { "pavgb", MX, EM, XX },
1033 { "psraw", MX, EM, XX },
1034 { "psrad", MX, EM, XX },
1035 { "pavgw", MX, EM, XX },
1036 { "pmulhuw", MX, EM, XX },
1037 { "pmulhw", MX, EM, XX },
1038 { PREGRP15 },
1039 { PREGRP25 },
1040 /* e8 */
1041 { "psubsb", MX, EM, XX },
1042 { "psubsw", MX, EM, XX },
1043 { "pminsw", MX, EM, XX },
1044 { "por", MX, EM, XX },
1045 { "paddsb", MX, EM, XX },
1046 { "paddsw", MX, EM, XX },
1047 { "pmaxsw", MX, EM, XX },
1048 { "pxor", MX, EM, XX },
1049 /* f0 */
1050 { PREGRP32 },
1051 { "psllw", MX, EM, XX },
1052 { "pslld", MX, EM, XX },
1053 { "psllq", MX, EM, XX },
1054 { "pmuludq", MX, EM, XX },
1055 { "pmaddwd", MX, EM, XX },
1056 { "psadbw", MX, EM, XX },
1057 { PREGRP18 },
1058 /* f8 */
1059 { "psubb", MX, EM, XX },
1060 { "psubw", MX, EM, XX },
1061 { "psubd", MX, EM, XX },
1062 { "psubq", MX, EM, XX },
1063 { "paddb", MX, EM, XX },
1064 { "paddw", MX, EM, XX },
1065 { "paddd", MX, EM, XX },
1066 { "(bad)", XX, XX, XX }
1067 };
1069 static const unsigned char onebyte_has_modrm[256] = {
1070 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1071 /* ------------------------------- */
1072 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1073 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1074 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1075 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1076 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1077 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1078 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1079 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1080 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1081 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1082 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1083 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1084 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1085 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1086 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1087 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1088 /* ------------------------------- */
1089 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1090 };
1092 static const unsigned char twobyte_has_modrm[256] = {
1093 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1094 /* ------------------------------- */
1095 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1096 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
1097 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1098 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1099 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1100 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1101 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1102 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,1,1,1,1, /* 7f */
1103 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1104 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1105 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1106 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1107 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1108 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1109 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1110 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1111 /* ------------------------------- */
1112 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1113 };
1115 static const unsigned char twobyte_uses_SSE_prefix[256] = {
1116 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1117 /* ------------------------------- */
1118 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1119 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1120 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1121 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1122 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1123 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1124 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1125 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1, /* 7f */
1126 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1127 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1128 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1129 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1130 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1131 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1132 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1133 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1134 /* ------------------------------- */
1135 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1136 };
1138 static char obuf[100];
1139 static char *obufp;
1140 static char scratchbuf[100];
1141 static unsigned char *start_codep;
1142 static unsigned char *insn_codep;
1143 static unsigned char *codep;
1144 static disassemble_info *the_info;
1145 static int mod;
1146 static int rm;
1147 static int reg;
1148 static unsigned char need_modrm;
1150 /* If we are accessing mod/rm/reg without need_modrm set, then the
1151 values are stale. Hitting this abort likely indicates that you
1152 need to update onebyte_has_modrm or twobyte_has_modrm. */
1153 #define MODRM_CHECK if (!need_modrm) abort ()
1155 static const char **names64;
1156 static const char **names32;
1157 static const char **names16;
1158 static const char **names8;
1159 static const char **names8rex;
1160 static const char **names_seg;
1161 static const char **index16;
1163 static const char *intel_names64[] = {
1164 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1165 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1166 };
1167 static const char *intel_names32[] = {
1168 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1169 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1170 };
1171 static const char *intel_names16[] = {
1172 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1173 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1174 };
1175 static const char *intel_names8[] = {
1176 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1177 };
1178 static const char *intel_names8rex[] = {
1179 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1180 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1181 };
1182 static const char *intel_names_seg[] = {
1183 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1184 };
1185 static const char *intel_index16[] = {
1186 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1187 };
1189 static const char *att_names64[] = {
1190 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1191 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1192 };
1193 static const char *att_names32[] = {
1194 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1195 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1196 };
1197 static const char *att_names16[] = {
1198 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1199 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1200 };
1201 static const char *att_names8[] = {
1202 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1203 };
1204 static const char *att_names8rex[] = {
1205 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1206 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1207 };
1208 static const char *att_names_seg[] = {
1209 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1210 };
1211 static const char *att_index16[] = {
1212 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1213 };
1215 static const struct dis386 grps[][8] = {
1216 /* GRP1b */
1217 {
1218 { "addA", Eb, Ib, XX },
1219 { "orA", Eb, Ib, XX },
1220 { "adcA", Eb, Ib, XX },
1221 { "sbbA", Eb, Ib, XX },
1222 { "andA", Eb, Ib, XX },
1223 { "subA", Eb, Ib, XX },
1224 { "xorA", Eb, Ib, XX },
1225 { "cmpA", Eb, Ib, XX }
1226 },
1227 /* GRP1S */
1228 {
1229 { "addQ", Ev, Iv, XX },
1230 { "orQ", Ev, Iv, XX },
1231 { "adcQ", Ev, Iv, XX },
1232 { "sbbQ", Ev, Iv, XX },
1233 { "andQ", Ev, Iv, XX },
1234 { "subQ", Ev, Iv, XX },
1235 { "xorQ", Ev, Iv, XX },
1236 { "cmpQ", Ev, Iv, XX }
1237 },
1238 /* GRP1Ss */
1239 {
1240 { "addQ", Ev, sIb, XX },
1241 { "orQ", Ev, sIb, XX },
1242 { "adcQ", Ev, sIb, XX },
1243 { "sbbQ", Ev, sIb, XX },
1244 { "andQ", Ev, sIb, XX },
1245 { "subQ", Ev, sIb, XX },
1246 { "xorQ", Ev, sIb, XX },
1247 { "cmpQ", Ev, sIb, XX }
1248 },
1249 /* GRP2b */
1250 {
1251 { "rolA", Eb, Ib, XX },
1252 { "rorA", Eb, Ib, XX },
1253 { "rclA", Eb, Ib, XX },
1254 { "rcrA", Eb, Ib, XX },
1255 { "shlA", Eb, Ib, XX },
1256 { "shrA", Eb, Ib, XX },
1257 { "(bad)", XX, XX, XX },
1258 { "sarA", Eb, Ib, XX },
1259 },
1260 /* GRP2S */
1261 {
1262 { "rolQ", Ev, Ib, XX },
1263 { "rorQ", Ev, Ib, XX },
1264 { "rclQ", Ev, Ib, XX },
1265 { "rcrQ", Ev, Ib, XX },
1266 { "shlQ", Ev, Ib, XX },
1267 { "shrQ", Ev, Ib, XX },
1268 { "(bad)", XX, XX, XX },
1269 { "sarQ", Ev, Ib, XX },
1270 },
1271 /* GRP2b_one */
1272 {
1273 { "rolA", Eb, I1, XX },
1274 { "rorA", Eb, I1, XX },
1275 { "rclA", Eb, I1, XX },
1276 { "rcrA", Eb, I1, XX },
1277 { "shlA", Eb, I1, XX },
1278 { "shrA", Eb, I1, XX },
1279 { "(bad)", XX, XX, XX },
1280 { "sarA", Eb, I1, XX },
1281 },
1282 /* GRP2S_one */
1283 {
1284 { "rolQ", Ev, I1, XX },
1285 { "rorQ", Ev, I1, XX },
1286 { "rclQ", Ev, I1, XX },
1287 { "rcrQ", Ev, I1, XX },
1288 { "shlQ", Ev, I1, XX },
1289 { "shrQ", Ev, I1, XX },
1290 { "(bad)", XX, XX, XX},
1291 { "sarQ", Ev, I1, XX },
1292 },
1293 /* GRP2b_cl */
1294 {
1295 { "rolA", Eb, CL, XX },
1296 { "rorA", Eb, CL, XX },
1297 { "rclA", Eb, CL, XX },
1298 { "rcrA", Eb, CL, XX },
1299 { "shlA", Eb, CL, XX },
1300 { "shrA", Eb, CL, XX },
1301 { "(bad)", XX, XX, XX },
1302 { "sarA", Eb, CL, XX },
1303 },
1304 /* GRP2S_cl */
1305 {
1306 { "rolQ", Ev, CL, XX },
1307 { "rorQ", Ev, CL, XX },
1308 { "rclQ", Ev, CL, XX },
1309 { "rcrQ", Ev, CL, XX },
1310 { "shlQ", Ev, CL, XX },
1311 { "shrQ", Ev, CL, XX },
1312 { "(bad)", XX, XX, XX },
1313 { "sarQ", Ev, CL, XX }
1314 },
1315 /* GRP3b */
1316 {
1317 { "testA", Eb, Ib, XX },
1318 { "(bad)", Eb, XX, XX },
1319 { "notA", Eb, XX, XX },
1320 { "negA", Eb, XX, XX },
1321 { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */
1322 { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */
1323 { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */
1324 { "idivA", Eb, XX, XX } /* and idiv for consistency. */
1325 },
1326 /* GRP3S */
1327 {
1328 { "testQ", Ev, Iv, XX },
1329 { "(bad)", XX, XX, XX },
1330 { "notQ", Ev, XX, XX },
1331 { "negQ", Ev, XX, XX },
1332 { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */
1333 { "imulQ", Ev, XX, XX },
1334 { "divQ", Ev, XX, XX },
1335 { "idivQ", Ev, XX, XX },
1336 },
1337 /* GRP4 */
1338 {
1339 { "incA", Eb, XX, XX },
1340 { "decA", Eb, XX, XX },
1341 { "(bad)", XX, XX, XX },
1342 { "(bad)", XX, XX, XX },
1343 { "(bad)", XX, XX, XX },
1344 { "(bad)", XX, XX, XX },
1345 { "(bad)", XX, XX, XX },
1346 { "(bad)", XX, XX, XX },
1347 },
1348 /* GRP5 */
1349 {
1350 { "incQ", Ev, XX, XX },
1351 { "decQ", Ev, XX, XX },
1352 { "callT", indirEv, XX, XX },
1353 { "JcallT", indirEp, XX, XX },
1354 { "jmpT", indirEv, XX, XX },
1355 { "JjmpT", indirEp, XX, XX },
1356 { "pushU", Ev, XX, XX },
1357 { "(bad)", XX, XX, XX },
1358 },
1359 /* GRP6 */
1360 {
1361 { "sldtQ", Ev, XX, XX },
1362 { "strQ", Ev, XX, XX },
1363 { "lldt", Ew, XX, XX },
1364 { "ltr", Ew, XX, XX },
1365 { "verr", Ew, XX, XX },
1366 { "verw", Ew, XX, XX },
1367 { "(bad)", XX, XX, XX },
1368 { "(bad)", XX, XX, XX }
1369 },
1370 /* GRP7 */
1371 {
1372 { "sgdtIQ", M, XX, XX },
1373 { "sidtIQ", PNI_Fixup, 0, XX, XX },
1374 { "lgdt{Q|Q||}", M, XX, XX },
1375 { "lidt{Q|Q||}", M, XX, XX },
1376 { "smswQ", Ev, XX, XX },
1377 { "(bad)", XX, XX, XX },
1378 { "lmsw", Ew, XX, XX },
1379 { "invlpg", INVLPG_Fixup, w_mode, XX, XX },
1380 },
1381 /* GRP8 */
1382 {
1383 { "(bad)", XX, XX, XX },
1384 { "(bad)", XX, XX, XX },
1385 { "(bad)", XX, XX, XX },
1386 { "(bad)", XX, XX, XX },
1387 { "btQ", Ev, Ib, XX },
1388 { "btsQ", Ev, Ib, XX },
1389 { "btrQ", Ev, Ib, XX },
1390 { "btcQ", Ev, Ib, XX },
1391 },
1392 /* GRP9 */
1393 {
1394 { "(bad)", XX, XX, XX },
1395 { "cmpxchg8b", Eq, XX, XX },
1396 { "(bad)", XX, XX, XX },
1397 { "(bad)", XX, XX, XX },
1398 { "(bad)", XX, XX, XX },
1399 { "(bad)", XX, XX, XX },
1400 { "(bad)", XX, XX, XX },
1401 { "(bad)", XX, XX, XX },
1402 },
1403 /* GRP10 */
1404 {
1405 { "(bad)", XX, XX, XX },
1406 { "(bad)", XX, XX, XX },
1407 { "psrlw", MS, Ib, XX },
1408 { "(bad)", XX, XX, XX },
1409 { "psraw", MS, Ib, XX },
1410 { "(bad)", XX, XX, XX },
1411 { "psllw", MS, Ib, XX },
1412 { "(bad)", XX, XX, XX },
1413 },
1414 /* GRP11 */
1415 {
1416 { "(bad)", XX, XX, XX },
1417 { "(bad)", XX, XX, XX },
1418 { "psrld", MS, Ib, XX },
1419 { "(bad)", XX, XX, XX },
1420 { "psrad", MS, Ib, XX },
1421 { "(bad)", XX, XX, XX },
1422 { "pslld", MS, Ib, XX },
1423 { "(bad)", XX, XX, XX },
1424 },
1425 /* GRP12 */
1426 {
1427 { "(bad)", XX, XX, XX },
1428 { "(bad)", XX, XX, XX },
1429 { "psrlq", MS, Ib, XX },
1430 { "psrldq", MS, Ib, XX },
1431 { "(bad)", XX, XX, XX },
1432 { "(bad)", XX, XX, XX },
1433 { "psllq", MS, Ib, XX },
1434 { "pslldq", MS, Ib, XX },
1435 },
1436 /* GRP13 */
1437 {
1438 { "fxsave", Ev, XX, XX },
1439 { "fxrstor", Ev, XX, XX },
1440 { "ldmxcsr", Ev, XX, XX },
1441 { "stmxcsr", Ev, XX, XX },
1442 { "(bad)", XX, XX, XX },
1443 { "lfence", OP_0fae, 0, XX, XX },
1444 { "mfence", OP_0fae, 0, XX, XX },
1445 { "clflush", OP_0fae, 0, XX, XX },
1446 },
1447 /* GRP14 */
1448 {
1449 { "prefetchnta", Ev, XX, XX },
1450 { "prefetcht0", Ev, XX, XX },
1451 { "prefetcht1", Ev, XX, XX },
1452 { "prefetcht2", Ev, XX, XX },
1453 { "(bad)", XX, XX, XX },
1454 { "(bad)", XX, XX, XX },
1455 { "(bad)", XX, XX, XX },
1456 { "(bad)", XX, XX, XX },
1457 },
1458 /* GRPAMD */
1459 {
1460 { "prefetch", Eb, XX, XX },
1461 { "prefetchw", Eb, XX, XX },
1462 { "(bad)", XX, XX, XX },
1463 { "(bad)", XX, XX, XX },
1464 { "(bad)", XX, XX, XX },
1465 { "(bad)", XX, XX, XX },
1466 { "(bad)", XX, XX, XX },
1467 { "(bad)", XX, XX, XX },
1468 },
1469 /* GRPPADLCK1 */
1470 {
1471 { "xstorerng", OP_0f07, 0, XX, XX },
1472 { "xcryptecb", OP_0f07, 0, XX, XX },
1473 { "xcryptcbc", OP_0f07, 0, XX, XX },
1474 { "(bad)", OP_0f07, 0, XX, XX },
1475 { "xcryptcfb", OP_0f07, 0, XX, XX },
1476 { "xcryptofb", OP_0f07, 0, XX, XX },
1477 { "(bad)", OP_0f07, 0, XX, XX },
1478 { "(bad)", OP_0f07, 0, XX, XX },
1479 },
1480 /* GRPPADLCK2 */
1481 {
1482 { "montmul", OP_0f07, 0, XX, XX },
1483 { "xsha1", OP_0f07, 0, XX, XX },
1484 { "xsha256", OP_0f07, 0, XX, XX },
1485 { "(bad)", OP_0f07, 0, XX, XX },
1486 { "(bad)", OP_0f07, 0, XX, XX },
1487 { "(bad)", OP_0f07, 0, XX, XX },
1488 { "(bad)", OP_0f07, 0, XX, XX },
1489 { "(bad)", OP_0f07, 0, XX, XX },
1490 }
1491 };
1493 static const struct dis386 prefix_user_table[][4] = {
1494 /* PREGRP0 */
1495 {
1496 { "addps", XM, EX, XX },
1497 { "addss", XM, EX, XX },
1498 { "addpd", XM, EX, XX },
1499 { "addsd", XM, EX, XX },
1500 },
1501 /* PREGRP1 */
1502 {
1503 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */
1504 { "", XM, EX, OPSIMD },
1505 { "", XM, EX, OPSIMD },
1506 { "", XM, EX, OPSIMD },
1507 },
1508 /* PREGRP2 */
1509 {
1510 { "cvtpi2ps", XM, EM, XX },
1511 { "cvtsi2ssY", XM, Ev, XX },
1512 { "cvtpi2pd", XM, EM, XX },
1513 { "cvtsi2sdY", XM, Ev, XX },
1514 },
1515 /* PREGRP3 */
1516 {
1517 { "cvtps2pi", MX, EX, XX },
1518 { "cvtss2siY", Gv, EX, XX },
1519 { "cvtpd2pi", MX, EX, XX },
1520 { "cvtsd2siY", Gv, EX, XX },
1521 },
1522 /* PREGRP4 */
1523 {
1524 { "cvttps2pi", MX, EX, XX },
1525 { "cvttss2siY", Gv, EX, XX },
1526 { "cvttpd2pi", MX, EX, XX },
1527 { "cvttsd2siY", Gv, EX, XX },
1528 },
1529 /* PREGRP5 */
1530 {
1531 { "divps", XM, EX, XX },
1532 { "divss", XM, EX, XX },
1533 { "divpd", XM, EX, XX },
1534 { "divsd", XM, EX, XX },
1535 },
1536 /* PREGRP6 */
1537 {
1538 { "maxps", XM, EX, XX },
1539 { "maxss", XM, EX, XX },
1540 { "maxpd", XM, EX, XX },
1541 { "maxsd", XM, EX, XX },
1542 },
1543 /* PREGRP7 */
1544 {
1545 { "minps", XM, EX, XX },
1546 { "minss", XM, EX, XX },
1547 { "minpd", XM, EX, XX },
1548 { "minsd", XM, EX, XX },
1549 },
1550 /* PREGRP8 */
1551 {
1552 { "movups", XM, EX, XX },
1553 { "movss", XM, EX, XX },
1554 { "movupd", XM, EX, XX },
1555 { "movsd", XM, EX, XX },
1556 },
1557 /* PREGRP9 */
1558 {
1559 { "movups", EX, XM, XX },
1560 { "movss", EX, XM, XX },
1561 { "movupd", EX, XM, XX },
1562 { "movsd", EX, XM, XX },
1563 },
1564 /* PREGRP10 */
1565 {
1566 { "mulps", XM, EX, XX },
1567 { "mulss", XM, EX, XX },
1568 { "mulpd", XM, EX, XX },
1569 { "mulsd", XM, EX, XX },
1570 },
1571 /* PREGRP11 */
1572 {
1573 { "rcpps", XM, EX, XX },
1574 { "rcpss", XM, EX, XX },
1575 { "(bad)", XM, EX, XX },
1576 { "(bad)", XM, EX, XX },
1577 },
1578 /* PREGRP12 */
1579 {
1580 { "rsqrtps", XM, EX, XX },
1581 { "rsqrtss", XM, EX, XX },
1582 { "(bad)", XM, EX, XX },
1583 { "(bad)", XM, EX, XX },
1584 },
1585 /* PREGRP13 */
1586 {
1587 { "sqrtps", XM, EX, XX },
1588 { "sqrtss", XM, EX, XX },
1589 { "sqrtpd", XM, EX, XX },
1590 { "sqrtsd", XM, EX, XX },
1591 },
1592 /* PREGRP14 */
1593 {
1594 { "subps", XM, EX, XX },
1595 { "subss", XM, EX, XX },
1596 { "subpd", XM, EX, XX },
1597 { "subsd", XM, EX, XX },
1598 },
1599 /* PREGRP15 */
1600 {
1601 { "(bad)", XM, EX, XX },
1602 { "cvtdq2pd", XM, EX, XX },
1603 { "cvttpd2dq", XM, EX, XX },
1604 { "cvtpd2dq", XM, EX, XX },
1605 },
1606 /* PREGRP16 */
1607 {
1608 { "cvtdq2ps", XM, EX, XX },
1609 { "cvttps2dq",XM, EX, XX },
1610 { "cvtps2dq",XM, EX, XX },
1611 { "(bad)", XM, EX, XX },
1612 },
1613 /* PREGRP17 */
1614 {
1615 { "cvtps2pd", XM, EX, XX },
1616 { "cvtss2sd", XM, EX, XX },
1617 { "cvtpd2ps", XM, EX, XX },
1618 { "cvtsd2ss", XM, EX, XX },
1619 },
1620 /* PREGRP18 */
1621 {
1622 { "maskmovq", MX, MS, XX },
1623 { "(bad)", XM, EX, XX },
1624 { "maskmovdqu", XM, EX, XX },
1625 { "(bad)", XM, EX, XX },
1626 },
1627 /* PREGRP19 */
1628 {
1629 { "movq", MX, EM, XX },
1630 { "movdqu", XM, EX, XX },
1631 { "movdqa", XM, EX, XX },
1632 { "(bad)", XM, EX, XX },
1633 },
1634 /* PREGRP20 */
1635 {
1636 { "movq", EM, MX, XX },
1637 { "movdqu", EX, XM, XX },
1638 { "movdqa", EX, XM, XX },
1639 { "(bad)", EX, XM, XX },
1640 },
1641 /* PREGRP21 */
1642 {
1643 { "(bad)", EX, XM, XX },
1644 { "movq2dq", XM, MS, XX },
1645 { "movq", EX, XM, XX },
1646 { "movdq2q", MX, XS, XX },
1647 },
1648 /* PREGRP22 */
1649 {
1650 { "pshufw", MX, EM, Ib },
1651 { "pshufhw", XM, EX, Ib },
1652 { "pshufd", XM, EX, Ib },
1653 { "pshuflw", XM, EX, Ib },
1654 },
1655 /* PREGRP23 */
1656 {
1657 { "movd", Edq, MX, XX },
1658 { "movq", XM, EX, XX },
1659 { "movd", Edq, XM, XX },
1660 { "(bad)", Ed, XM, XX },
1661 },
1662 /* PREGRP24 */
1663 {
1664 { "(bad)", MX, EX, XX },
1665 { "(bad)", XM, EX, XX },
1666 { "punpckhqdq", XM, EX, XX },
1667 { "(bad)", XM, EX, XX },
1668 },
1669 /* PREGRP25 */
1670 {
1671 { "movntq", EM, MX, XX },
1672 { "(bad)", EM, XM, XX },
1673 { "movntdq", EM, XM, XX },
1674 { "(bad)", EM, XM, XX },
1675 },
1676 /* PREGRP26 */
1677 {
1678 { "(bad)", MX, EX, XX },
1679 { "(bad)", XM, EX, XX },
1680 { "punpcklqdq", XM, EX, XX },
1681 { "(bad)", XM, EX, XX },
1682 },
1683 /* PREGRP27 */
1684 {
1685 { "(bad)", MX, EX, XX },
1686 { "(bad)", XM, EX, XX },
1687 { "addsubpd", XM, EX, XX },
1688 { "addsubps", XM, EX, XX },
1689 },
1690 /* PREGRP28 */
1691 {
1692 { "(bad)", MX, EX, XX },
1693 { "(bad)", XM, EX, XX },
1694 { "haddpd", XM, EX, XX },
1695 { "haddps", XM, EX, XX },
1696 },
1697 /* PREGRP29 */
1698 {
1699 { "(bad)", MX, EX, XX },
1700 { "(bad)", XM, EX, XX },
1701 { "hsubpd", XM, EX, XX },
1702 { "hsubps", XM, EX, XX },
1703 },
1704 /* PREGRP30 */
1705 {
1706 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1707 { "movsldup", XM, EX, XX },
1708 { "movlpd", XM, EX, XX },
1709 { "movddup", XM, EX, XX },
1710 },
1711 /* PREGRP31 */
1712 {
1713 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1714 { "movshdup", XM, EX, XX },
1715 { "movhpd", XM, EX, XX },
1716 { "(bad)", XM, EX, XX },
1717 },
1718 /* PREGRP32 */
1719 {
1720 { "(bad)", XM, EX, XX },
1721 { "(bad)", XM, EX, XX },
1722 { "(bad)", XM, EX, XX },
1723 { "lddqu", XM, M, XX },
1724 },
1725 };
1727 static const struct dis386 x86_64_table[][2] = {
1728 {
1729 { "arpl", Ew, Gw, XX },
1730 { "movs{||lq|xd}", Gv, Ed, XX },
1731 },
1732 };
1734 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1736 static void
1737 ckprefix (void)
1738 {
1739 int newrex;
1740 rex = 0;
1741 prefixes = 0;
1742 used_prefixes = 0;
1743 rex_used = 0;
1744 while (1)
1745 {
1746 FETCH_DATA (the_info, codep + 1);
1747 newrex = 0;
1748 switch (*codep)
1749 {
1750 /* REX prefixes family. */
1751 case 0x40:
1752 case 0x41:
1753 case 0x42:
1754 case 0x43:
1755 case 0x44:
1756 case 0x45:
1757 case 0x46:
1758 case 0x47:
1759 case 0x48:
1760 case 0x49:
1761 case 0x4a:
1762 case 0x4b:
1763 case 0x4c:
1764 case 0x4d:
1765 case 0x4e:
1766 case 0x4f:
1767 if (mode_64bit)
1768 newrex = *codep;
1769 else
1770 return;
1771 break;
1772 case 0xf3:
1773 prefixes |= PREFIX_REPZ;
1774 break;
1775 case 0xf2:
1776 prefixes |= PREFIX_REPNZ;
1777 break;
1778 case 0xf0:
1779 prefixes |= PREFIX_LOCK;
1780 break;
1781 case 0x2e:
1782 prefixes |= PREFIX_CS;
1783 break;
1784 case 0x36:
1785 prefixes |= PREFIX_SS;
1786 break;
1787 case 0x3e:
1788 prefixes |= PREFIX_DS;
1789 break;
1790 case 0x26:
1791 prefixes |= PREFIX_ES;
1792 break;
1793 case 0x64:
1794 prefixes |= PREFIX_FS;
1795 break;
1796 case 0x65:
1797 prefixes |= PREFIX_GS;
1798 break;
1799 case 0x66:
1800 prefixes |= PREFIX_DATA;
1801 break;
1802 case 0x67:
1803 prefixes |= PREFIX_ADDR;
1804 break;
1805 case FWAIT_OPCODE:
1806 /* fwait is really an instruction. If there are prefixes
1807 before the fwait, they belong to the fwait, *not* to the
1808 following instruction. */
1809 if (prefixes)
1810 {
1811 prefixes |= PREFIX_FWAIT;
1812 codep++;
1813 return;
1814 }
1815 prefixes = PREFIX_FWAIT;
1816 break;
1817 default:
1818 return;
1819 }
1820 /* Rex is ignored when followed by another prefix. */
1821 if (rex)
1822 {
1823 oappend (prefix_name (rex, 0));
1824 oappend (" ");
1825 }
1826 rex = newrex;
1827 codep++;
1828 }
1829 }
1831 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
1832 prefix byte. */
1834 static const char *
1835 prefix_name (int pref, int sizeflag)
1836 {
1837 switch (pref)
1838 {
1839 /* REX prefixes family. */
1840 case 0x40:
1841 return "rex";
1842 case 0x41:
1843 return "rexZ";
1844 case 0x42:
1845 return "rexY";
1846 case 0x43:
1847 return "rexYZ";
1848 case 0x44:
1849 return "rexX";
1850 case 0x45:
1851 return "rexXZ";
1852 case 0x46:
1853 return "rexXY";
1854 case 0x47:
1855 return "rexXYZ";
1856 case 0x48:
1857 return "rex64";
1858 case 0x49:
1859 return "rex64Z";
1860 case 0x4a:
1861 return "rex64Y";
1862 case 0x4b:
1863 return "rex64YZ";
1864 case 0x4c:
1865 return "rex64X";
1866 case 0x4d:
1867 return "rex64XZ";
1868 case 0x4e:
1869 return "rex64XY";
1870 case 0x4f:
1871 return "rex64XYZ";
1872 case 0xf3:
1873 return "repz";
1874 case 0xf2:
1875 return "repnz";
1876 case 0xf0:
1877 return "lock";
1878 case 0x2e:
1879 return "cs";
1880 case 0x36:
1881 return "ss";
1882 case 0x3e:
1883 return "ds";
1884 case 0x26:
1885 return "es";
1886 case 0x64:
1887 return "fs";
1888 case 0x65:
1889 return "gs";
1890 case 0x66:
1891 return (sizeflag & DFLAG) ? "data16" : "data32";
1892 case 0x67:
1893 if (mode_64bit)
1894 return (sizeflag & AFLAG) ? "addr32" : "addr64";
1895 else
1896 return ((sizeflag & AFLAG) && !mode_64bit) ? "addr16" : "addr32";
1897 case FWAIT_OPCODE:
1898 return "fwait";
1899 default:
1900 return NULL;
1901 }
1902 }
1904 static char op1out[100], op2out[100], op3out[100];
1905 static int op_ad, op_index[3];
1906 static int two_source_ops;
1907 static bfd_vma op_address[3];
1908 static bfd_vma op_riprel[3];
1909 static bfd_vma start_pc;
1911 /*
1912 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1913 * (see topic "Redundant prefixes" in the "Differences from 8086"
1914 * section of the "Virtual 8086 Mode" chapter.)
1915 * 'pc' should be the address of this instruction, it will
1916 * be used to print the target address if this is a relative jump or call
1917 * The function returns the length of this instruction in bytes.
1918 */
1920 static char intel_syntax;
1921 static char open_char;
1922 static char close_char;
1923 static char separator_char;
1924 static char scale_char;
1926 /* Here for backwards compatibility. When gdb stops using
1927 print_insn_i386_att and print_insn_i386_intel these functions can
1928 disappear, and print_insn_i386 be merged into print_insn. */
1929 int
1930 print_insn_i386_att (bfd_vma pc, disassemble_info *info)
1931 {
1932 intel_syntax = 0;
1934 return print_insn (pc, info);
1935 }
1937 int
1938 print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
1939 {
1940 intel_syntax = 1;
1942 return print_insn (pc, info);
1943 }
1945 int
1946 print_insn_i386 (bfd_vma pc, disassemble_info *info)
1947 {
1948 intel_syntax = -1;
1950 return print_insn (pc, info);
1951 }
1953 static int
1954 print_insn (bfd_vma pc, disassemble_info *info)
1955 {
1956 const struct dis386 *dp;
1957 int i;
1958 char *first, *second, *third;
1959 int needcomma;
1960 unsigned char uses_SSE_prefix, uses_LOCK_prefix;
1961 int sizeflag;
1962 const char *p;
1963 struct dis_private priv;
1965 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax
1966 || info->mach == bfd_mach_x86_64);
1968 if (intel_syntax == (char) -1)
1969 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
1970 || info->mach == bfd_mach_x86_64_intel_syntax);
1972 if (info->mach == bfd_mach_i386_i386
1973 || info->mach == bfd_mach_x86_64
1974 || info->mach == bfd_mach_i386_i386_intel_syntax
1975 || info->mach == bfd_mach_x86_64_intel_syntax)
1976 priv.orig_sizeflag = AFLAG | DFLAG;
1977 else if (info->mach == bfd_mach_i386_i8086)
1978 priv.orig_sizeflag = 0;
1979 else
1980 abort ();
1982 for (p = info->disassembler_options; p != NULL; )
1983 {
1984 if (strncmp (p, "x86-64", 6) == 0)
1985 {
1986 mode_64bit = 1;
1987 priv.orig_sizeflag = AFLAG | DFLAG;
1988 }
1989 else if (strncmp (p, "i386", 4) == 0)
1990 {
1991 mode_64bit = 0;
1992 priv.orig_sizeflag = AFLAG | DFLAG;
1993 }
1994 else if (strncmp (p, "i8086", 5) == 0)
1995 {
1996 mode_64bit = 0;
1997 priv.orig_sizeflag = 0;
1998 }
1999 else if (strncmp (p, "intel", 5) == 0)
2000 {
2001 intel_syntax = 1;
2002 }
2003 else if (strncmp (p, "att", 3) == 0)
2004 {
2005 intel_syntax = 0;
2006 }
2007 else if (strncmp (p, "addr", 4) == 0)
2008 {
2009 if (p[4] == '1' && p[5] == '6')
2010 priv.orig_sizeflag &= ~AFLAG;
2011 else if (p[4] == '3' && p[5] == '2')
2012 priv.orig_sizeflag |= AFLAG;
2013 }
2014 else if (strncmp (p, "data", 4) == 0)
2015 {
2016 if (p[4] == '1' && p[5] == '6')
2017 priv.orig_sizeflag &= ~DFLAG;
2018 else if (p[4] == '3' && p[5] == '2')
2019 priv.orig_sizeflag |= DFLAG;
2020 }
2021 else if (strncmp (p, "suffix", 6) == 0)
2022 priv.orig_sizeflag |= SUFFIX_ALWAYS;
2024 p = strchr (p, ',');
2025 if (p != NULL)
2026 p++;
2027 }
2029 if (intel_syntax)
2030 {
2031 names64 = intel_names64;
2032 names32 = intel_names32;
2033 names16 = intel_names16;
2034 names8 = intel_names8;
2035 names8rex = intel_names8rex;
2036 names_seg = intel_names_seg;
2037 index16 = intel_index16;
2038 open_char = '[';
2039 close_char = ']';
2040 separator_char = '+';
2041 scale_char = '*';
2042 }
2043 else
2044 {
2045 names64 = att_names64;
2046 names32 = att_names32;
2047 names16 = att_names16;
2048 names8 = att_names8;
2049 names8rex = att_names8rex;
2050 names_seg = att_names_seg;
2051 index16 = att_index16;
2052 open_char = '(';
2053 close_char = ')';
2054 separator_char = ',';
2055 scale_char = ',';
2056 }
2058 /* The output looks better if we put 7 bytes on a line, since that
2059 puts most long word instructions on a single line. */
2060 info->bytes_per_line = 7;
2062 info->private_data = &priv;
2063 priv.max_fetched = priv.the_buffer;
2064 priv.insn_start = pc;
2066 obuf[0] = 0;
2067 op1out[0] = 0;
2068 op2out[0] = 0;
2069 op3out[0] = 0;
2071 op_index[0] = op_index[1] = op_index[2] = -1;
2073 the_info = info;
2074 start_pc = pc;
2075 start_codep = priv.the_buffer;
2076 codep = priv.the_buffer;
2078 if (setjmp (priv.bailout) != 0)
2079 {
2080 const char *name;
2082 /* Getting here means we tried for data but didn't get it. That
2083 means we have an incomplete instruction of some sort. Just
2084 print the first byte as a prefix or a .byte pseudo-op. */
2085 if (codep > priv.the_buffer)
2086 {
2087 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2088 if (name != NULL)
2089 (*info->fprintf_func) (info->stream, "%s", name);
2090 else
2091 {
2092 /* Just print the first byte as a .byte instruction. */
2093 (*info->fprintf_func) (info->stream, ".byte 0x%x",
2094 (unsigned int) priv.the_buffer[0]);
2095 }
2097 return 1;
2098 }
2100 return -1;
2101 }
2103 obufp = obuf;
2104 ckprefix ();
2106 insn_codep = codep;
2107 sizeflag = priv.orig_sizeflag;
2109 FETCH_DATA (info, codep + 1);
2110 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2112 if ((prefixes & PREFIX_FWAIT)
2113 && ((*codep < 0xd8) || (*codep > 0xdf)))
2114 {
2115 const char *name;
2117 /* fwait not followed by floating point instruction. Print the
2118 first prefix, which is probably fwait itself. */
2119 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2120 if (name == NULL)
2121 name = INTERNAL_DISASSEMBLER_ERROR;
2122 (*info->fprintf_func) (info->stream, "%s", name);
2123 return 1;
2124 }
2126 if (*codep == 0x0f)
2127 {
2128 FETCH_DATA (info, codep + 2);
2129 dp = &dis386_twobyte[*++codep];
2130 need_modrm = twobyte_has_modrm[*codep];
2131 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
2132 uses_LOCK_prefix = (*codep & ~0x02) == 0x20;
2133 }
2134 else
2135 {
2136 dp = &dis386[*codep];
2137 need_modrm = onebyte_has_modrm[*codep];
2138 uses_SSE_prefix = 0;
2139 uses_LOCK_prefix = 0;
2140 }
2141 codep++;
2143 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
2144 {
2145 oappend ("repz ");
2146 used_prefixes |= PREFIX_REPZ;
2147 }
2148 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
2149 {
2150 oappend ("repnz ");
2151 used_prefixes |= PREFIX_REPNZ;
2152 }
2153 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
2154 {
2155 oappend ("lock ");
2156 used_prefixes |= PREFIX_LOCK;
2157 }
2159 if (prefixes & PREFIX_ADDR)
2160 {
2161 sizeflag ^= AFLAG;
2162 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
2163 {
2164 if ((sizeflag & AFLAG) || mode_64bit)
2165 oappend ("addr32 ");
2166 else
2167 oappend ("addr16 ");
2168 used_prefixes |= PREFIX_ADDR;
2169 }
2170 }
2172 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
2173 {
2174 sizeflag ^= DFLAG;
2175 if (dp->bytemode3 == cond_jump_mode
2176 && dp->bytemode1 == v_mode
2177 && !intel_syntax)
2178 {
2179 if (sizeflag & DFLAG)
2180 oappend ("data32 ");
2181 else
2182 oappend ("data16 ");
2183 used_prefixes |= PREFIX_DATA;
2184 }
2185 }
2187 if (need_modrm)
2188 {
2189 FETCH_DATA (info, codep + 1);
2190 mod = (*codep >> 6) & 3;
2191 reg = (*codep >> 3) & 7;
2192 rm = *codep & 7;
2193 }
2195 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
2196 {
2197 dofloat (sizeflag);
2198 }
2199 else
2200 {
2201 int index;
2202 if (dp->name == NULL)
2203 {
2204 switch (dp->bytemode1)
2205 {
2206 case USE_GROUPS:
2207 dp = &grps[dp->bytemode2][reg];
2208 break;
2210 case USE_PREFIX_USER_TABLE:
2211 index = 0;
2212 used_prefixes |= (prefixes & PREFIX_REPZ);
2213 if (prefixes & PREFIX_REPZ)
2214 index = 1;
2215 else
2216 {
2217 used_prefixes |= (prefixes & PREFIX_DATA);
2218 if (prefixes & PREFIX_DATA)
2219 index = 2;
2220 else
2221 {
2222 used_prefixes |= (prefixes & PREFIX_REPNZ);
2223 if (prefixes & PREFIX_REPNZ)
2224 index = 3;
2225 }
2226 }
2227 dp = &prefix_user_table[dp->bytemode2][index];
2228 break;
2230 case X86_64_SPECIAL:
2231 dp = &x86_64_table[dp->bytemode2][mode_64bit];
2232 break;
2234 default:
2235 oappend (INTERNAL_DISASSEMBLER_ERROR);
2236 break;
2237 }
2238 }
2240 if (putop (dp->name, sizeflag) == 0)
2241 {
2242 obufp = op1out;
2243 op_ad = 2;
2244 if (dp->op1)
2245 (*dp->op1) (dp->bytemode1, sizeflag);
2247 obufp = op2out;
2248 op_ad = 1;
2249 if (dp->op2)
2250 (*dp->op2) (dp->bytemode2, sizeflag);
2252 obufp = op3out;
2253 op_ad = 0;
2254 if (dp->op3)
2255 (*dp->op3) (dp->bytemode3, sizeflag);
2256 }
2257 }
2259 /* See if any prefixes were not used. If so, print the first one
2260 separately. If we don't do this, we'll wind up printing an
2261 instruction stream which does not precisely correspond to the
2262 bytes we are disassembling. */
2263 if ((prefixes & ~used_prefixes) != 0)
2264 {
2265 const char *name;
2267 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2268 if (name == NULL)
2269 name = INTERNAL_DISASSEMBLER_ERROR;
2270 (*info->fprintf_func) (info->stream, "%s", name);
2271 return 1;
2272 }
2273 if (rex & ~rex_used)
2274 {
2275 const char *name;
2276 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
2277 if (name == NULL)
2278 name = INTERNAL_DISASSEMBLER_ERROR;
2279 (*info->fprintf_func) (info->stream, "%s ", name);
2280 }
2282 obufp = obuf + strlen (obuf);
2283 for (i = strlen (obuf); i < 6; i++)
2284 oappend (" ");
2285 oappend (" ");
2286 (*info->fprintf_func) (info->stream, "%s", obuf);
2288 /* The enter and bound instructions are printed with operands in the same
2289 order as the intel book; everything else is printed in reverse order. */
2290 if (intel_syntax || two_source_ops)
2291 {
2292 first = op1out;
2293 second = op2out;
2294 third = op3out;
2295 op_ad = op_index[0];
2296 op_index[0] = op_index[2];
2297 op_index[2] = op_ad;
2298 }
2299 else
2300 {
2301 first = op3out;
2302 second = op2out;
2303 third = op1out;
2304 }
2305 needcomma = 0;
2306 if (*first)
2307 {
2308 if (op_index[0] != -1 && !op_riprel[0])
2309 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
2310 else
2311 (*info->fprintf_func) (info->stream, "%s", first);
2312 needcomma = 1;
2313 }
2314 if (*second)
2315 {
2316 if (needcomma)
2317 (*info->fprintf_func) (info->stream, ",");
2318 if (op_index[1] != -1 && !op_riprel[1])
2319 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
2320 else
2321 (*info->fprintf_func) (info->stream, "%s", second);
2322 needcomma = 1;
2323 }
2324 if (*third)
2325 {
2326 if (needcomma)
2327 (*info->fprintf_func) (info->stream, ",");
2328 if (op_index[2] != -1 && !op_riprel[2])
2329 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
2330 else
2331 (*info->fprintf_func) (info->stream, "%s", third);
2332 }
2333 for (i = 0; i < 3; i++)
2334 if (op_index[i] != -1 && op_riprel[i])
2335 {
2336 (*info->fprintf_func) (info->stream, " # ");
2337 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
2338 + op_address[op_index[i]]), info);
2339 }
2340 return codep - priv.the_buffer;
2341 }
2343 static const char *float_mem[] = {
2344 /* d8 */
2345 "fadd{s||s|}",
2346 "fmul{s||s|}",
2347 "fcom{s||s|}",
2348 "fcomp{s||s|}",
2349 "fsub{s||s|}",
2350 "fsubr{s||s|}",
2351 "fdiv{s||s|}",
2352 "fdivr{s||s|}",
2353 /* d9 */
2354 "fld{s||s|}",
2355 "(bad)",
2356 "fst{s||s|}",
2357 "fstp{s||s|}",
2358 "fldenvIC",
2359 "fldcw",
2360 "fNstenvIC",
2361 "fNstcw",
2362 /* da */
2363 "fiadd{l||l|}",
2364 "fimul{l||l|}",
2365 "ficom{l||l|}",
2366 "ficomp{l||l|}",
2367 "fisub{l||l|}",
2368 "fisubr{l||l|}",
2369 "fidiv{l||l|}",
2370 "fidivr{l||l|}",
2371 /* db */
2372 "fild{l||l|}",
2373 "fisttp{l||l|}",
2374 "fist{l||l|}",
2375 "fistp{l||l|}",
2376 "(bad)",
2377 "fld{t||t|}",
2378 "(bad)",
2379 "fstp{t||t|}",
2380 /* dc */
2381 "fadd{l||l|}",
2382 "fmul{l||l|}",
2383 "fcom{l||l|}",
2384 "fcomp{l||l|}",
2385 "fsub{l||l|}",
2386 "fsubr{l||l|}",
2387 "fdiv{l||l|}",
2388 "fdivr{l||l|}",
2389 /* dd */
2390 "fld{l||l|}",
2391 "fisttp{ll||ll|}",
2392 "fst{l||l|}",
2393 "fstp{l||l|}",
2394 "frstorIC",
2395 "(bad)",
2396 "fNsaveIC",
2397 "fNstsw",
2398 /* de */
2399 "fiadd",
2400 "fimul",
2401 "ficom",
2402 "ficomp",
2403 "fisub",
2404 "fisubr",
2405 "fidiv",
2406 "fidivr",
2407 /* df */
2408 "fild",
2409 "fisttp",
2410 "fist",
2411 "fistp",
2412 "fbld",
2413 "fild{ll||ll|}",
2414 "fbstp",
2415 "fistp{ll||ll|}",
2416 };
2418 static const unsigned char float_mem_mode[] = {
2419 /* d8 */
2420 d_mode,
2421 d_mode,
2422 d_mode,
2423 d_mode,
2424 d_mode,
2425 d_mode,
2426 d_mode,
2427 d_mode,
2428 /* d9 */
2429 d_mode,
2430 0,
2431 d_mode,
2432 d_mode,
2433 0,
2434 w_mode,
2435 0,
2436 w_mode,
2437 /* da */
2438 d_mode,
2439 d_mode,
2440 d_mode,
2441 d_mode,
2442 d_mode,
2443 d_mode,
2444 d_mode,
2445 d_mode,
2446 /* db */
2447 d_mode,
2448 d_mode,
2449 d_mode,
2450 d_mode,
2451 0,
2452 t_mode,
2453 0,
2454 t_mode,
2455 /* dc */
2456 q_mode,
2457 q_mode,
2458 q_mode,
2459 q_mode,
2460 q_mode,
2461 q_mode,
2462 q_mode,
2463 q_mode,
2464 /* dd */
2465 q_mode,
2466 q_mode,
2467 q_mode,
2468 q_mode,
2469 0,
2470 0,
2471 0,
2472 w_mode,
2473 /* de */
2474 w_mode,
2475 w_mode,
2476 w_mode,
2477 w_mode,
2478 w_mode,
2479 w_mode,
2480 w_mode,
2481 w_mode,
2482 /* df */
2483 w_mode,
2484 w_mode,
2485 w_mode,
2486 w_mode,
2487 t_mode,
2488 q_mode,
2489 t_mode,
2490 q_mode
2491 };
2493 #define ST OP_ST, 0
2494 #define STi OP_STi, 0
2496 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2497 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2498 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2499 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2500 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2501 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2502 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2503 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2504 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
2506 static const struct dis386 float_reg[][8] = {
2507 /* d8 */
2508 {
2509 { "fadd", ST, STi, XX },
2510 { "fmul", ST, STi, XX },
2511 { "fcom", STi, XX, XX },
2512 { "fcomp", STi, XX, XX },
2513 { "fsub", ST, STi, XX },
2514 { "fsubr", ST, STi, XX },
2515 { "fdiv", ST, STi, XX },
2516 { "fdivr", ST, STi, XX },
2517 },
2518 /* d9 */
2519 {
2520 { "fld", STi, XX, XX },
2521 { "fxch", STi, XX, XX },
2522 { FGRPd9_2 },
2523 { "(bad)", XX, XX, XX },
2524 { FGRPd9_4 },
2525 { FGRPd9_5 },
2526 { FGRPd9_6 },
2527 { FGRPd9_7 },
2528 },
2529 /* da */
2530 {
2531 { "fcmovb", ST, STi, XX },
2532 { "fcmove", ST, STi, XX },
2533 { "fcmovbe",ST, STi, XX },
2534 { "fcmovu", ST, STi, XX },
2535 { "(bad)", XX, XX, XX },
2536 { FGRPda_5 },
2537 { "(bad)", XX, XX, XX },
2538 { "(bad)", XX, XX, XX },
2539 },
2540 /* db */
2541 {
2542 { "fcmovnb",ST, STi, XX },
2543 { "fcmovne",ST, STi, XX },
2544 { "fcmovnbe",ST, STi, XX },
2545 { "fcmovnu",ST, STi, XX },
2546 { FGRPdb_4 },
2547 { "fucomi", ST, STi, XX },
2548 { "fcomi", ST, STi, XX },
2549 { "(bad)", XX, XX, XX },
2550 },
2551 /* dc */
2552 {
2553 { "fadd", STi, ST, XX },
2554 { "fmul", STi, ST, XX },
2555 { "(bad)", XX, XX, XX },
2556 { "(bad)", XX, XX, XX },
2557 #if UNIXWARE_COMPAT
2558 { "fsub", STi, ST, XX },
2559 { "fsubr", STi, ST, XX },
2560 { "fdiv", STi, ST, XX },
2561 { "fdivr", STi, ST, XX },
2562 #else
2563 { "fsubr", STi, ST, XX },
2564 { "fsub", STi, ST, XX },
2565 { "fdivr", STi, ST, XX },
2566 { "fdiv", STi, ST, XX },
2567 #endif
2568 },
2569 /* dd */
2570 {
2571 { "ffree", STi, XX, XX },
2572 { "(bad)", XX, XX, XX },
2573 { "fst", STi, XX, XX },
2574 { "fstp", STi, XX, XX },
2575 { "fucom", STi, XX, XX },
2576 { "fucomp", STi, XX, XX },
2577 { "(bad)", XX, XX, XX },
2578 { "(bad)", XX, XX, XX },
2579 },
2580 /* de */
2581 {
2582 { "faddp", STi, ST, XX },
2583 { "fmulp", STi, ST, XX },
2584 { "(bad)", XX, XX, XX },
2585 { FGRPde_3 },
2586 #if UNIXWARE_COMPAT
2587 { "fsubp", STi, ST, XX },
2588 { "fsubrp", STi, ST, XX },
2589 { "fdivp", STi, ST, XX },
2590 { "fdivrp", STi, ST, XX },
2591 #else
2592 { "fsubrp", STi, ST, XX },
2593 { "fsubp", STi, ST, XX },
2594 { "fdivrp", STi, ST, XX },
2595 { "fdivp", STi, ST, XX },
2596 #endif
2597 },
2598 /* df */
2599 {
2600 { "ffreep", STi, XX, XX },
2601 { "(bad)", XX, XX, XX },
2602 { "(bad)", XX, XX, XX },
2603 { "(bad)", XX, XX, XX },
2604 { FGRPdf_4 },
2605 { "fucomip",ST, STi, XX },
2606 { "fcomip", ST, STi, XX },
2607 { "(bad)", XX, XX, XX },
2608 },
2609 };
2611 static char *fgrps[][8] = {
2612 /* d9_2 0 */
2613 {
2614 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2615 },
2617 /* d9_4 1 */
2618 {
2619 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2620 },
2622 /* d9_5 2 */
2623 {
2624 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2625 },
2627 /* d9_6 3 */
2628 {
2629 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2630 },
2632 /* d9_7 4 */
2633 {
2634 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2635 },
2637 /* da_5 5 */
2638 {
2639 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2640 },
2642 /* db_4 6 */
2643 {
2644 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2645 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2646 },
2648 /* de_3 7 */
2649 {
2650 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2651 },
2653 /* df_4 8 */
2654 {
2655 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2656 },
2657 };
2659 static void
2660 dofloat (int sizeflag)
2661 {
2662 const struct dis386 *dp;
2663 unsigned char floatop;
2665 floatop = codep[-1];
2667 if (mod != 3)
2668 {
2669 int fp_indx = (floatop - 0xd8) * 8 + reg;
2671 putop (float_mem[fp_indx], sizeflag);
2672 obufp = op1out;
2673 OP_E (float_mem_mode[fp_indx], sizeflag);
2674 return;
2675 }
2676 /* Skip mod/rm byte. */
2677 MODRM_CHECK;
2678 codep++;
2680 dp = &float_reg[floatop - 0xd8][reg];
2681 if (dp->name == NULL)
2682 {
2683 putop (fgrps[dp->bytemode1][rm], sizeflag);
2685 /* Instruction fnstsw is only one with strange arg. */
2686 if (floatop == 0xdf && codep[-1] == 0xe0)
2687 strcpy (op1out, names16[0]);
2688 }
2689 else
2690 {
2691 putop (dp->name, sizeflag);
2693 obufp = op1out;
2694 if (dp->op1)
2695 (*dp->op1) (dp->bytemode1, sizeflag);
2696 obufp = op2out;
2697 if (dp->op2)
2698 (*dp->op2) (dp->bytemode2, sizeflag);
2699 }
2700 }
2702 static void
2703 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2704 {
2705 oappend ("%st");
2706 }
2708 static void
2709 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2710 {
2711 sprintf (scratchbuf, "%%st(%d)", rm);
2712 oappend (scratchbuf + intel_syntax);
2713 }
2715 /* Capital letters in template are macros. */
2716 static int
2717 putop (const char *template, int sizeflag)
2718 {
2719 const char *p;
2720 int alt = 0;
2722 for (p = template; *p; p++)
2723 {
2724 switch (*p)
2725 {
2726 default:
2727 *obufp++ = *p;
2728 break;
2729 case '{':
2730 alt = 0;
2731 if (intel_syntax)
2732 alt += 1;
2733 if (mode_64bit)
2734 alt += 2;
2735 while (alt != 0)
2736 {
2737 while (*++p != '|')
2738 {
2739 if (*p == '}')
2740 {
2741 /* Alternative not valid. */
2742 strcpy (obuf, "(bad)");
2743 obufp = obuf + 5;
2744 return 1;
2745 }
2746 else if (*p == '\0')
2747 abort ();
2748 }
2749 alt--;
2750 }
2751 /* Fall through. */
2752 case 'I':
2753 alt = 1;
2754 continue;
2755 case '|':
2756 while (*++p != '}')
2757 {
2758 if (*p == '\0')
2759 abort ();
2760 }
2761 break;
2762 case '}':
2763 break;
2764 case 'A':
2765 if (intel_syntax)
2766 break;
2767 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2768 *obufp++ = 'b';
2769 break;
2770 case 'B':
2771 if (intel_syntax)
2772 break;
2773 if (sizeflag & SUFFIX_ALWAYS)
2774 *obufp++ = 'b';
2775 break;
2776 case 'C':
2777 if (intel_syntax && !alt)
2778 break;
2779 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
2780 {
2781 if (sizeflag & DFLAG)
2782 *obufp++ = intel_syntax ? 'd' : 'l';
2783 else
2784 *obufp++ = intel_syntax ? 'w' : 's';
2785 used_prefixes |= (prefixes & PREFIX_DATA);
2786 }
2787 break;
2788 case 'E': /* For jcxz/jecxz */
2789 if (mode_64bit)
2790 {
2791 if (sizeflag & AFLAG)
2792 *obufp++ = 'r';
2793 else
2794 *obufp++ = 'e';
2795 }
2796 else
2797 if (sizeflag & AFLAG)
2798 *obufp++ = 'e';
2799 used_prefixes |= (prefixes & PREFIX_ADDR);
2800 break;
2801 case 'F':
2802 if (intel_syntax)
2803 break;
2804 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
2805 {
2806 if (sizeflag & AFLAG)
2807 *obufp++ = mode_64bit ? 'q' : 'l';
2808 else
2809 *obufp++ = mode_64bit ? 'l' : 'w';
2810 used_prefixes |= (prefixes & PREFIX_ADDR);
2811 }
2812 break;
2813 case 'H':
2814 if (intel_syntax)
2815 break;
2816 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
2817 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
2818 {
2819 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
2820 *obufp++ = ',';
2821 *obufp++ = 'p';
2822 if (prefixes & PREFIX_DS)
2823 *obufp++ = 't';
2824 else
2825 *obufp++ = 'n';
2826 }
2827 break;
2828 case 'J':
2829 if (intel_syntax)
2830 break;
2831 *obufp++ = 'l';
2832 break;
2833 case 'L':
2834 if (intel_syntax)
2835 break;
2836 if (sizeflag & SUFFIX_ALWAYS)
2837 *obufp++ = 'l';
2838 break;
2839 case 'N':
2840 if ((prefixes & PREFIX_FWAIT) == 0)
2841 *obufp++ = 'n';
2842 else
2843 used_prefixes |= PREFIX_FWAIT;
2844 break;
2845 case 'O':
2846 USED_REX (REX_MODE64);
2847 if (rex & REX_MODE64)
2848 *obufp++ = 'o';
2849 else
2850 *obufp++ = 'd';
2851 break;
2852 case 'T':
2853 if (intel_syntax)
2854 break;
2855 if (mode_64bit)
2856 {
2857 *obufp++ = 'q';
2858 break;
2859 }
2860 /* Fall through. */
2861 case 'P':
2862 if (intel_syntax)
2863 break;
2864 if ((prefixes & PREFIX_DATA)
2865 || (rex & REX_MODE64)
2866 || (sizeflag & SUFFIX_ALWAYS))
2867 {
2868 USED_REX (REX_MODE64);
2869 if (rex & REX_MODE64)
2870 *obufp++ = 'q';
2871 else
2872 {
2873 if (sizeflag & DFLAG)
2874 *obufp++ = 'l';
2875 else
2876 *obufp++ = 'w';
2877 used_prefixes |= (prefixes & PREFIX_DATA);
2878 }
2879 }
2880 break;
2881 case 'U':
2882 if (intel_syntax)
2883 break;
2884 if (mode_64bit)
2885 {
2886 *obufp++ = 'q';
2887 break;
2888 }
2889 /* Fall through. */
2890 case 'Q':
2891 if (intel_syntax && !alt)
2892 break;
2893 USED_REX (REX_MODE64);
2894 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2895 {
2896 if (rex & REX_MODE64)
2897 *obufp++ = 'q';
2898 else
2899 {
2900 if (sizeflag & DFLAG)
2901 *obufp++ = intel_syntax ? 'd' : 'l';
2902 else
2903 *obufp++ = 'w';
2904 used_prefixes |= (prefixes & PREFIX_DATA);
2905 }
2906 }
2907 break;
2908 case 'R':
2909 USED_REX (REX_MODE64);
2910 if (intel_syntax)
2911 {
2912 if (rex & REX_MODE64)
2913 {
2914 *obufp++ = 'q';
2915 *obufp++ = 't';
2916 }
2917 else if (sizeflag & DFLAG)
2918 {
2919 *obufp++ = 'd';
2920 *obufp++ = 'q';
2921 }
2922 else
2923 {
2924 *obufp++ = 'w';
2925 *obufp++ = 'd';
2926 }
2927 }
2928 else
2929 {
2930 if (rex & REX_MODE64)
2931 *obufp++ = 'q';
2932 else if (sizeflag & DFLAG)
2933 *obufp++ = 'l';
2934 else
2935 *obufp++ = 'w';
2936 }
2937 if (!(rex & REX_MODE64))
2938 used_prefixes |= (prefixes & PREFIX_DATA);
2939 break;
2940 case 'S':
2941 if (intel_syntax)
2942 break;
2943 if (sizeflag & SUFFIX_ALWAYS)
2944 {
2945 if (rex & REX_MODE64)
2946 *obufp++ = 'q';
2947 else
2948 {
2949 if (sizeflag & DFLAG)
2950 *obufp++ = 'l';
2951 else
2952 *obufp++ = 'w';
2953 used_prefixes |= (prefixes & PREFIX_DATA);
2954 }
2955 }
2956 break;
2957 case 'X':
2958 if (prefixes & PREFIX_DATA)
2959 *obufp++ = 'd';
2960 else
2961 *obufp++ = 's';
2962 used_prefixes |= (prefixes & PREFIX_DATA);
2963 break;
2964 case 'Y':
2965 if (intel_syntax)
2966 break;
2967 if (rex & REX_MODE64)
2968 {
2969 USED_REX (REX_MODE64);
2970 *obufp++ = 'q';
2971 }
2972 break;
2973 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
2974 case 'W':
2975 /* operand size flag for cwtl, cbtw */
2976 USED_REX (0);
2977 if (rex)
2978 *obufp++ = 'l';
2979 else if (sizeflag & DFLAG)
2980 *obufp++ = 'w';
2981 else
2982 *obufp++ = 'b';
2983 if (intel_syntax)
2984 {
2985 if (rex)
2986 {
2987 *obufp++ = 'q';
2988 *obufp++ = 'e';
2989 }
2990 if (sizeflag & DFLAG)
2991 {
2992 *obufp++ = 'd';
2993 *obufp++ = 'e';
2994 }
2995 else
2996 {
2997 *obufp++ = 'w';
2998 }
2999 }
3000 if (!rex)
3001 used_prefixes |= (prefixes & PREFIX_DATA);
3002 break;
3003 }
3004 alt = 0;
3005 }
3006 *obufp = 0;
3007 return 0;
3008 }
3010 static void
3011 oappend (const char *s)
3012 {
3013 strcpy (obufp, s);
3014 obufp += strlen (s);
3015 }
3017 static void
3018 append_seg (void)
3019 {
3020 if (prefixes & PREFIX_CS)
3021 {
3022 used_prefixes |= PREFIX_CS;
3023 oappend ("%cs:" + intel_syntax);
3024 }
3025 if (prefixes & PREFIX_DS)
3026 {
3027 used_prefixes |= PREFIX_DS;
3028 oappend ("%ds:" + intel_syntax);
3029 }
3030 if (prefixes & PREFIX_SS)
3031 {
3032 used_prefixes |= PREFIX_SS;
3033 oappend ("%ss:" + intel_syntax);
3034 }
3035 if (prefixes & PREFIX_ES)
3036 {
3037 used_prefixes |= PREFIX_ES;
3038 oappend ("%es:" + intel_syntax);
3039 }
3040 if (prefixes & PREFIX_FS)
3041 {
3042 used_prefixes |= PREFIX_FS;
3043 oappend ("%fs:" + intel_syntax);
3044 }
3045 if (prefixes & PREFIX_GS)
3046 {
3047 used_prefixes |= PREFIX_GS;
3048 oappend ("%gs:" + intel_syntax);
3049 }
3050 }
3052 static void
3053 OP_indirE (int bytemode, int sizeflag)
3054 {
3055 if (!intel_syntax)
3056 oappend ("*");
3057 OP_E (bytemode, sizeflag);
3058 }
3060 static void
3061 print_operand_value (char *buf, int hex, bfd_vma disp)
3062 {
3063 if (mode_64bit)
3064 {
3065 if (hex)
3066 {
3067 char tmp[30];
3068 int i;
3069 buf[0] = '0';
3070 buf[1] = 'x';
3071 sprintf_vma (tmp, disp);
3072 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
3073 strcpy (buf + 2, tmp + i);
3074 }
3075 else
3076 {
3077 bfd_signed_vma v = disp;
3078 char tmp[30];
3079 int i;
3080 if (v < 0)
3081 {
3082 *(buf++) = '-';
3083 v = -disp;
3084 /* Check for possible overflow on 0x8000000000000000. */
3085 if (v < 0)
3086 {
3087 strcpy (buf, "9223372036854775808");
3088 return;
3089 }
3090 }
3091 if (!v)
3092 {
3093 strcpy (buf, "0");
3094 return;
3095 }
3097 i = 0;
3098 tmp[29] = 0;
3099 while (v)
3100 {
3101 tmp[28 - i] = (v % 10) + '0';
3102 v /= 10;
3103 i++;
3104 }
3105 strcpy (buf, tmp + 29 - i);
3106 }
3107 }
3108 else
3109 {
3110 x86_print_symbolic_operand( buf, hex, disp );
3111 /*
3112 if (hex)
3113 sprintf (buf, "0x%x", (unsigned int) disp);
3114 else
3115 sprintf (buf, "%d", (int) disp);
3116 */
3117 }
3118 }
3120 static void
3121 OP_E (int bytemode, int sizeflag)
3122 {
3123 bfd_vma disp;
3124 int add = 0;
3125 int riprel = 0;
3126 USED_REX (REX_EXTZ);
3127 if (rex & REX_EXTZ)
3128 add += 8;
3130 /* Skip mod/rm byte. */
3131 MODRM_CHECK;
3132 codep++;
3134 if (mod == 3)
3135 {
3136 switch (bytemode)
3137 {
3138 case b_mode:
3139 USED_REX (0);
3140 if (rex)
3141 oappend (names8rex[rm + add]);
3142 else
3143 oappend (names8[rm + add]);
3144 break;
3145 case w_mode:
3146 oappend (names16[rm + add]);
3147 break;
3148 case d_mode:
3149 oappend (names32[rm + add]);
3150 break;
3151 case q_mode:
3152 oappend (names64[rm + add]);
3153 break;
3154 case m_mode:
3155 if (mode_64bit)
3156 oappend (names64[rm + add]);
3157 else
3158 oappend (names32[rm + add]);
3159 break;
3160 case v_mode:
3161 case dq_mode:
3162 case dqw_mode:
3163 USED_REX (REX_MODE64);
3164 if (rex & REX_MODE64)
3165 oappend (names64[rm + add]);
3166 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3167 oappend (names32[rm + add]);
3168 else
3169 oappend (names16[rm + add]);
3170 used_prefixes |= (prefixes & PREFIX_DATA);
3171 break;
3172 case 0:
3173 break;
3174 default:
3175 oappend (INTERNAL_DISASSEMBLER_ERROR);
3176 break;
3177 }
3178 return;
3179 }
3181 disp = 0;
3182 append_seg ();
3184 if ((sizeflag & AFLAG) || mode_64bit) /* 32 bit address mode */
3185 {
3186 int havesib;
3187 int havebase;
3188 int base;
3189 int index = 0;
3190 int scale = 0;
3192 havesib = 0;
3193 havebase = 1;
3194 base = rm;
3196 if (base == 4)
3197 {
3198 havesib = 1;
3199 FETCH_DATA (the_info, codep + 1);
3200 index = (*codep >> 3) & 7;
3201 if (mode_64bit || index != 0x4)
3202 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
3203 scale = (*codep >> 6) & 3;
3204 base = *codep & 7;
3205 USED_REX (REX_EXTY);
3206 USED_REX (REX_EXTZ);
3207 if (rex & REX_EXTY)
3208 index += 8;
3209 if (rex & REX_EXTZ)
3210 base += 8;
3211 codep++;
3212 }
3214 switch (mod)
3215 {
3216 case 0:
3217 if ((base & 7) == 5)
3218 {
3219 havebase = 0;
3220 if (mode_64bit && !havesib)
3221 riprel = 1;
3222 disp = get32s ();
3223 }
3224 break;
3225 case 1:
3226 FETCH_DATA (the_info, codep + 1);
3227 disp = *codep++;
3228 if ((disp & 0x80) != 0)
3229 disp -= 0x100;
3230 break;
3231 case 2:
3232 disp = get32s ();
3233 break;
3234 }
3236 if (!intel_syntax)
3237 if (mod != 0 || (base & 7) == 5)
3238 {
3239 print_operand_value (scratchbuf, !riprel, disp);
3240 oappend (scratchbuf);
3241 if (riprel)
3242 {
3243 set_op (disp, 1);
3244 oappend ("(%rip)");
3245 }
3246 }
3248 if (havebase || (havesib && (index != 4 || scale != 0)))
3249 {
3250 if (intel_syntax)
3251 {
3252 switch (bytemode)
3253 {
3254 case b_mode:
3255 oappend ("BYTE PTR ");
3256 break;
3257 case w_mode:
3258 case dqw_mode:
3259 oappend ("WORD PTR ");
3260 break;
3261 case v_mode:
3262 case dq_mode:
3263 USED_REX (REX_MODE64);
3264 if (rex & REX_MODE64)
3265 oappend ("QWORD PTR ");
3266 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
3267 oappend ("DWORD PTR ");
3268 else
3269 oappend ("WORD PTR ");
3270 used_prefixes |= (prefixes & PREFIX_DATA);
3271 break;
3272 case d_mode:
3273 oappend ("DWORD PTR ");
3274 break;
3275 case q_mode:
3276 oappend ("QWORD PTR ");
3277 break;
3278 case m_mode:
3279 if (mode_64bit)
3280 oappend ("QWORD PTR ");
3281 else
3282 oappend ("DWORD PTR ");
3283 break;
3284 case f_mode:
3285 if (sizeflag & DFLAG)
3286 {
3287 used_prefixes |= (prefixes & PREFIX_DATA);
3288 oappend ("FWORD PTR ");
3289 }
3290 else
3291 oappend ("DWORD PTR ");
3292 break;
3293 case t_mode:
3294 oappend ("TBYTE PTR ");
3295 break;
3296 case x_mode:
3297 oappend ("XMMWORD PTR ");
3298 break;
3299 default:
3300 break;
3301 }
3302 }
3303 *obufp++ = open_char;
3304 if (intel_syntax && riprel)
3305 oappend ("rip + ");
3306 *obufp = '\0';
3307 USED_REX (REX_EXTZ);
3308 if (!havesib && (rex & REX_EXTZ))
3309 base += 8;
3310 if (havebase)
3311 oappend (mode_64bit && (sizeflag & AFLAG)
3312 ? names64[base] : names32[base]);
3313 if (havesib)
3314 {
3315 if (index != 4)
3316 {
3317 if (!intel_syntax || havebase)
3318 {
3319 *obufp++ = separator_char;
3320 *obufp = '\0';
3321 }
3322 oappend (mode_64bit && (sizeflag & AFLAG)
3323 ? names64[index] : names32[index]);
3324 }
3325 if (scale != 0 || (!intel_syntax && index != 4))
3326 {
3327 *obufp++ = scale_char;
3328 *obufp = '\0';
3329 sprintf (scratchbuf, "%d", 1 << scale);
3330 oappend (scratchbuf);
3331 }
3332 }
3333 if (intel_syntax)
3334 if (mod != 0 || (base & 7) == 5)
3335 {
3336 /* Don't print zero displacements. */
3337 if (disp != 0)
3338 {
3339 if ((bfd_signed_vma) disp > 0)
3340 {
3341 *obufp++ = '+';
3342 *obufp = '\0';
3343 }
3345 print_operand_value (scratchbuf, 0, disp);
3346 oappend (scratchbuf);
3347 }
3348 }
3350 *obufp++ = close_char;
3351 *obufp = '\0';
3352 }
3353 else if (intel_syntax)
3354 {
3355 if (mod != 0 || (base & 7) == 5)
3356 {
3357 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3358 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3359 ;
3360 else
3361 {
3362 oappend (names_seg[ds_reg - es_reg]);
3363 oappend (":");
3364 }
3365 print_operand_value (scratchbuf, 1, disp);
3366 oappend (scratchbuf);
3367 }
3368 }
3369 }
3370 else
3371 { /* 16 bit address mode */
3372 switch (mod)
3373 {
3374 case 0:
3375 if ((rm & 7) == 6)
3376 {
3377 disp = get16 ();
3378 if ((disp & 0x8000) != 0)
3379 disp -= 0x10000;
3380 }
3381 break;
3382 case 1:
3383 FETCH_DATA (the_info, codep + 1);
3384 disp = *codep++;
3385 if ((disp & 0x80) != 0)
3386 disp -= 0x100;
3387 break;
3388 case 2:
3389 disp = get16 ();
3390 if ((disp & 0x8000) != 0)
3391 disp -= 0x10000;
3392 break;
3393 }
3395 if (!intel_syntax)
3396 if (mod != 0 || (rm & 7) == 6)
3397 {
3398 print_operand_value (scratchbuf, 0, disp);
3399 oappend (scratchbuf);
3400 }
3402 if (mod != 0 || (rm & 7) != 6)
3403 {
3404 *obufp++ = open_char;
3405 *obufp = '\0';
3406 oappend (index16[rm + add]);
3407 *obufp++ = close_char;
3408 *obufp = '\0';
3409 }
3410 }
3411 }
3413 static void
3414 OP_G (int bytemode, int sizeflag)
3415 {
3416 int add = 0;
3417 USED_REX (REX_EXTX);
3418 if (rex & REX_EXTX)
3419 add += 8;
3420 switch (bytemode)
3421 {
3422 case b_mode:
3423 USED_REX (0);
3424 if (rex)
3425 oappend (names8rex[reg + add]);
3426 else
3427 oappend (names8[reg + add]);
3428 break;
3429 case w_mode:
3430 oappend (names16[reg + add]);
3431 break;
3432 case d_mode:
3433 oappend (names32[reg + add]);
3434 break;
3435 case q_mode:
3436 oappend (names64[reg + add]);
3437 break;
3438 case v_mode:
3439 case dq_mode:
3440 case dqw_mode:
3441 USED_REX (REX_MODE64);
3442 if (rex & REX_MODE64)
3443 oappend (names64[reg + add]);
3444 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3445 oappend (names32[reg + add]);
3446 else
3447 oappend (names16[reg + add]);
3448 used_prefixes |= (prefixes & PREFIX_DATA);
3449 break;
3450 default:
3451 oappend (INTERNAL_DISASSEMBLER_ERROR);
3452 break;
3453 }
3454 }
3456 static bfd_vma
3457 get64 (void)
3458 {
3459 bfd_vma x;
3460 #ifdef BFD64
3461 unsigned int a;
3462 unsigned int b;
3464 FETCH_DATA (the_info, codep + 8);
3465 a = *codep++ & 0xff;
3466 a |= (*codep++ & 0xff) << 8;
3467 a |= (*codep++ & 0xff) << 16;
3468 a |= (*codep++ & 0xff) << 24;
3469 b = *codep++ & 0xff;
3470 b |= (*codep++ & 0xff) << 8;
3471 b |= (*codep++ & 0xff) << 16;
3472 b |= (*codep++ & 0xff) << 24;
3473 x = a + ((bfd_vma) b << 32);
3474 #else
3475 abort ();
3476 x = 0;
3477 #endif
3478 return x;
3479 }
3481 static bfd_signed_vma
3482 get32 (void)
3483 {
3484 bfd_signed_vma x = 0;
3486 FETCH_DATA (the_info, codep + 4);
3487 x = *codep++ & (bfd_signed_vma) 0xff;
3488 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3489 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3490 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3491 return x;
3492 }
3494 static bfd_signed_vma
3495 get32s (void)
3496 {
3497 bfd_signed_vma x = 0;
3499 FETCH_DATA (the_info, codep + 4);
3500 x = *codep++ & (bfd_signed_vma) 0xff;
3501 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3502 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3503 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3505 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
3507 return x;
3508 }
3510 static int
3511 get16 (void)
3512 {
3513 int x = 0;
3515 FETCH_DATA (the_info, codep + 2);
3516 x = *codep++ & 0xff;
3517 x |= (*codep++ & 0xff) << 8;
3518 return x;
3519 }
3521 static void
3522 set_op (bfd_vma op, int riprel)
3523 {
3524 op_index[op_ad] = op_ad;
3525 if (mode_64bit)
3526 {
3527 op_address[op_ad] = op;
3528 op_riprel[op_ad] = riprel;
3529 }
3530 else
3531 {
3532 /* Mask to get a 32-bit address. */
3533 op_address[op_ad] = op & 0xffffffff;
3534 op_riprel[op_ad] = riprel & 0xffffffff;
3535 }
3536 }
3538 static void
3539 OP_REG (int code, int sizeflag)
3540 {
3541 const char *s;
3542 int add = 0;
3543 USED_REX (REX_EXTZ);
3544 if (rex & REX_EXTZ)
3545 add = 8;
3547 switch (code)
3548 {
3549 case indir_dx_reg:
3550 if (intel_syntax)
3551 s = "[dx]";
3552 else
3553 s = "(%dx)";
3554 break;
3555 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3556 case sp_reg: case bp_reg: case si_reg: case di_reg:
3557 s = names16[code - ax_reg + add];
3558 break;
3559 case es_reg: case ss_reg: case cs_reg:
3560 case ds_reg: case fs_reg: case gs_reg:
3561 s = names_seg[code - es_reg + add];
3562 break;
3563 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3564 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3565 USED_REX (0);
3566 if (rex)
3567 s = names8rex[code - al_reg + add];
3568 else
3569 s = names8[code - al_reg];
3570 break;
3571 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
3572 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
3573 if (mode_64bit)
3574 {
3575 s = names64[code - rAX_reg + add];
3576 break;
3577 }
3578 code += eAX_reg - rAX_reg;
3579 /* Fall through. */
3580 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3581 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3582 USED_REX (REX_MODE64);
3583 if (rex & REX_MODE64)
3584 s = names64[code - eAX_reg + add];
3585 else if (sizeflag & DFLAG)
3586 s = names32[code - eAX_reg + add];
3587 else
3588 s = names16[code - eAX_reg + add];
3589 used_prefixes |= (prefixes & PREFIX_DATA);
3590 break;
3591 default:
3592 s = INTERNAL_DISASSEMBLER_ERROR;
3593 break;
3594 }
3595 oappend (s);
3596 }
3598 static void
3599 OP_IMREG (int code, int sizeflag)
3600 {
3601 const char *s;
3603 switch (code)
3604 {
3605 case indir_dx_reg:
3606 if (intel_syntax)
3607 s = "[dx]";
3608 else
3609 s = "(%dx)";
3610 break;
3611 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3612 case sp_reg: case bp_reg: case si_reg: case di_reg:
3613 s = names16[code - ax_reg];
3614 break;
3615 case es_reg: case ss_reg: case cs_reg:
3616 case ds_reg: case fs_reg: case gs_reg:
3617 s = names_seg[code - es_reg];
3618 break;
3619 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3620 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3621 USED_REX (0);
3622 if (rex)
3623 s = names8rex[code - al_reg];
3624 else
3625 s = names8[code - al_reg];
3626 break;
3627 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3628 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3629 USED_REX (REX_MODE64);
3630 if (rex & REX_MODE64)
3631 s = names64[code - eAX_reg];
3632 else if (sizeflag & DFLAG)
3633 s = names32[code - eAX_reg];
3634 else
3635 s = names16[code - eAX_reg];
3636 used_prefixes |= (prefixes & PREFIX_DATA);
3637 break;
3638 default:
3639 s = INTERNAL_DISASSEMBLER_ERROR;
3640 break;
3641 }
3642 oappend (s);
3643 }
3645 static void
3646 OP_I (int bytemode, int sizeflag)
3647 {
3648 bfd_signed_vma op;
3649 bfd_signed_vma mask = -1;
3651 switch (bytemode)
3652 {
3653 case b_mode:
3654 FETCH_DATA (the_info, codep + 1);
3655 op = *codep++;
3656 mask = 0xff;
3657 break;
3658 case q_mode:
3659 if (mode_64bit)
3660 {
3661 op = get32s ();
3662 break;
3663 }
3664 /* Fall through. */
3665 case v_mode:
3666 USED_REX (REX_MODE64);
3667 if (rex & REX_MODE64)
3668 op = get32s ();
3669 else if (sizeflag & DFLAG)
3670 {
3671 op = get32 ();
3672 mask = 0xffffffff;
3673 }
3674 else
3675 {
3676 op = get16 ();
3677 mask = 0xfffff;
3678 }
3679 used_prefixes |= (prefixes & PREFIX_DATA);
3680 break;
3681 case w_mode:
3682 mask = 0xfffff;
3683 op = get16 ();
3684 break;
3685 case const_1_mode:
3686 if (intel_syntax)
3687 oappend ("1");
3688 return;
3689 default:
3690 oappend (INTERNAL_DISASSEMBLER_ERROR);
3691 return;
3692 }
3694 op &= mask;
3695 scratchbuf[0] = '$';
3696 print_operand_value (scratchbuf + 1, 1, op);
3697 oappend (scratchbuf + intel_syntax);
3698 scratchbuf[0] = '\0';
3699 }
3701 static void
3702 OP_I64 (int bytemode, int sizeflag)
3703 {
3704 bfd_signed_vma op;
3705 bfd_signed_vma mask = -1;
3707 if (!mode_64bit)
3708 {
3709 OP_I (bytemode, sizeflag);
3710 return;
3711 }
3713 switch (bytemode)
3714 {
3715 case b_mode:
3716 FETCH_DATA (the_info, codep + 1);
3717 op = *codep++;
3718 mask = 0xff;
3719 break;
3720 case v_mode:
3721 USED_REX (REX_MODE64);
3722 if (rex & REX_MODE64)
3723 op = get64 ();
3724 else if (sizeflag & DFLAG)
3725 {
3726 op = get32 ();
3727 mask = 0xffffffff;
3728 }
3729 else
3730 {
3731 op = get16 ();
3732 mask = 0xfffff;
3733 }
3734 used_prefixes |= (prefixes & PREFIX_DATA);
3735 break;
3736 case w_mode:
3737 mask = 0xfffff;
3738 op = get16 ();
3739 break;
3740 default:
3741 oappend (INTERNAL_DISASSEMBLER_ERROR);
3742 return;
3743 }
3745 op &= mask;
3746 scratchbuf[0] = '$';
3747 print_operand_value (scratchbuf + 1, 1, op);
3748 oappend (scratchbuf + intel_syntax);
3749 scratchbuf[0] = '\0';
3750 }
3752 static void
3753 OP_sI (int bytemode, int sizeflag)
3754 {
3755 bfd_signed_vma op;
3756 bfd_signed_vma mask = -1;
3758 switch (bytemode)
3759 {
3760 case b_mode:
3761 FETCH_DATA (the_info, codep + 1);
3762 op = *codep++;
3763 if ((op & 0x80) != 0)
3764 op -= 0x100;
3765 mask = 0xffffffff;
3766 break;
3767 case v_mode:
3768 USED_REX (REX_MODE64);
3769 if (rex & REX_MODE64)
3770 op = get32s ();
3771 else if (sizeflag & DFLAG)
3772 {
3773 op = get32s ();
3774 mask = 0xffffffff;
3775 }
3776 else
3777 {
3778 mask = 0xffffffff;
3779 op = get16 ();
3780 if ((op & 0x8000) != 0)
3781 op -= 0x10000;
3782 }
3783 used_prefixes |= (prefixes & PREFIX_DATA);
3784 break;
3785 case w_mode:
3786 op = get16 ();
3787 mask = 0xffffffff;
3788 if ((op & 0x8000) != 0)
3789 op -= 0x10000;
3790 break;
3791 default:
3792 oappend (INTERNAL_DISASSEMBLER_ERROR);
3793 return;
3794 }
3796 scratchbuf[0] = '$';
3797 print_operand_value (scratchbuf + 1, 1, op);
3798 oappend (scratchbuf + intel_syntax);
3799 }
3801 static void
3802 OP_J (int bytemode, int sizeflag)
3803 {
3804 bfd_vma disp;
3805 bfd_vma mask = -1;
3807 switch (bytemode)
3808 {
3809 case b_mode:
3810 FETCH_DATA (the_info, codep + 1);
3811 disp = *codep++;
3812 if ((disp & 0x80) != 0)
3813 disp -= 0x100;
3814 break;
3815 case v_mode:
3816 if (sizeflag & DFLAG)
3817 disp = get32s ();
3818 else
3819 {
3820 disp = get16 ();
3821 /* For some reason, a data16 prefix on a jump instruction
3822 means that the pc is masked to 16 bits after the
3823 displacement is added! */
3824 mask = 0xffff;
3825 }
3826 break;
3827 default:
3828 oappend (INTERNAL_DISASSEMBLER_ERROR);
3829 return;
3830 }
3831 disp = (start_pc + codep - start_codep + disp) & mask;
3832 set_op (disp, 0);
3833 print_operand_value (scratchbuf, 1, disp);
3834 oappend (scratchbuf);
3835 }
3837 static void
3838 OP_SEG (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3839 {
3840 oappend (names_seg[reg]);
3841 }
3843 static void
3844 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
3845 {
3846 int seg, offset;
3848 if (sizeflag & DFLAG)
3849 {
3850 offset = get32 ();
3851 seg = get16 ();
3852 }
3853 else
3854 {
3855 offset = get16 ();
3856 seg = get16 ();
3857 }
3858 used_prefixes |= (prefixes & PREFIX_DATA);
3859 if (intel_syntax)
3860 sprintf (scratchbuf, "0x%x,0x%x", seg, offset);
3861 else
3862 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
3863 oappend (scratchbuf);
3864 }
3866 static void
3867 OP_OFF (int bytemode ATTRIBUTE_UNUSED, int sizeflag)
3868 {
3869 bfd_vma off;
3871 append_seg ();
3873 if ((sizeflag & AFLAG) || mode_64bit)
3874 off = get32 ();
3875 else
3876 off = get16 ();
3878 if (intel_syntax)
3879 {
3880 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3881 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3882 {
3883 oappend (names_seg[ds_reg - es_reg]);
3884 oappend (":");
3885 }
3886 }
3887 print_operand_value (scratchbuf, 1, off);
3888 oappend (scratchbuf);
3889 }
3891 static void
3892 OP_OFF64 (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3893 {
3894 bfd_vma off;
3896 if (!mode_64bit)
3897 {
3898 OP_OFF (bytemode, sizeflag);
3899 return;
3900 }
3902 append_seg ();
3904 off = get64 ();
3906 if (intel_syntax)
3907 {
3908 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3909 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3910 {
3911 oappend (names_seg[ds_reg - es_reg]);
3912 oappend (":");
3913 }
3914 }
3915 print_operand_value (scratchbuf, 1, off);
3916 oappend (scratchbuf);
3917 }
3919 static void
3920 ptr_reg (int code, int sizeflag)
3921 {
3922 const char *s;
3924 *obufp++ = open_char;
3925 used_prefixes |= (prefixes & PREFIX_ADDR);
3926 if (mode_64bit)
3927 {
3928 if (!(sizeflag & AFLAG))
3929 s = names32[code - eAX_reg];
3930 else
3931 s = names64[code - eAX_reg];
3932 }
3933 else if (sizeflag & AFLAG)
3934 s = names32[code - eAX_reg];
3935 else
3936 s = names16[code - eAX_reg];
3937 oappend (s);
3938 *obufp++ = close_char;
3939 *obufp = 0;
3940 }
3942 static void
3943 OP_ESreg (int code, int sizeflag)
3944 {
3945 if (intel_syntax)
3946 {
3947 if (codep[-1] & 1)
3948 {
3949 USED_REX (REX_MODE64);
3950 used_prefixes |= (prefixes & PREFIX_DATA);
3951 if (rex & REX_MODE64)
3952 oappend ("QWORD PTR ");
3953 else if ((sizeflag & DFLAG))
3954 oappend ("DWORD PTR ");
3955 else
3956 oappend ("WORD PTR ");
3957 }
3958 else
3959 oappend ("BYTE PTR ");
3960 }
3962 oappend ("%es:" + intel_syntax);
3963 ptr_reg (code, sizeflag);
3964 }
3966 static void
3967 OP_DSreg (int code, int sizeflag)
3968 {
3969 if (intel_syntax)
3970 {
3971 if (codep[-1] != 0xd7 && (codep[-1] & 1))
3972 {
3973 USED_REX (REX_MODE64);
3974 used_prefixes |= (prefixes & PREFIX_DATA);
3975 if (rex & REX_MODE64)
3976 oappend ("QWORD PTR ");
3977 else if ((sizeflag & DFLAG))
3978 oappend ("DWORD PTR ");
3979 else
3980 oappend ("WORD PTR ");
3981 }
3982 else
3983 oappend ("BYTE PTR ");
3984 }
3986 if ((prefixes
3987 & (PREFIX_CS
3988 | PREFIX_DS
3989 | PREFIX_SS
3990 | PREFIX_ES
3991 | PREFIX_FS
3992 | PREFIX_GS)) == 0)
3993 prefixes |= PREFIX_DS;
3994 append_seg ();
3995 ptr_reg (code, sizeflag);
3996 }
3998 static void
3999 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4000 {
4001 int add = 0;
4002 if (rex & REX_EXTX)
4003 {
4004 USED_REX (REX_EXTX);
4005 add = 8;
4006 }
4007 else if (!mode_64bit && (prefixes & PREFIX_LOCK))
4008 {
4009 used_prefixes |= PREFIX_LOCK;
4010 add = 8;
4011 }
4012 sprintf (scratchbuf, "%%cr%d", reg + add);
4013 oappend (scratchbuf + intel_syntax);
4014 }
4016 static void
4017 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4018 {
4019 int add = 0;
4020 USED_REX (REX_EXTX);
4021 if (rex & REX_EXTX)
4022 add = 8;
4023 if (intel_syntax)
4024 sprintf (scratchbuf, "db%d", reg + add);
4025 else
4026 sprintf (scratchbuf, "%%db%d", reg + add);
4027 oappend (scratchbuf);
4028 }
4030 static void
4031 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4032 {
4033 sprintf (scratchbuf, "%%tr%d", reg);
4034 oappend (scratchbuf + intel_syntax);
4035 }
4037 static void
4038 OP_Rd (int bytemode, int sizeflag)
4039 {
4040 if (mod == 3)
4041 OP_E (bytemode, sizeflag);
4042 else
4043 BadOp ();
4044 }
4046 static void
4047 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4048 {
4049 used_prefixes |= (prefixes & PREFIX_DATA);
4050 if (prefixes & PREFIX_DATA)
4051 {
4052 int add = 0;
4053 USED_REX (REX_EXTX);
4054 if (rex & REX_EXTX)
4055 add = 8;
4056 sprintf (scratchbuf, "%%xmm%d", reg + add);
4057 }
4058 else
4059 sprintf (scratchbuf, "%%mm%d", reg);
4060 oappend (scratchbuf + intel_syntax);
4061 }
4063 static void
4064 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4065 {
4066 int add = 0;
4067 USED_REX (REX_EXTX);
4068 if (rex & REX_EXTX)
4069 add = 8;
4070 sprintf (scratchbuf, "%%xmm%d", reg + add);
4071 oappend (scratchbuf + intel_syntax);
4072 }
4074 static void
4075 OP_EM (int bytemode, int sizeflag)
4076 {
4077 if (mod != 3)
4078 {
4079 if (intel_syntax && bytemode == v_mode)
4080 {
4081 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
4082 used_prefixes |= (prefixes & PREFIX_DATA);
4083 }
4084 OP_E (bytemode, sizeflag);
4085 return;
4086 }
4088 /* Skip mod/rm byte. */
4089 MODRM_CHECK;
4090 codep++;
4091 used_prefixes |= (prefixes & PREFIX_DATA);
4092 if (prefixes & PREFIX_DATA)
4093 {
4094 int add = 0;
4096 USED_REX (REX_EXTZ);
4097 if (rex & REX_EXTZ)
4098 add = 8;
4099 sprintf (scratchbuf, "%%xmm%d", rm + add);
4100 }
4101 else
4102 sprintf (scratchbuf, "%%mm%d", rm);
4103 oappend (scratchbuf + intel_syntax);
4104 }
4106 static void
4107 OP_EX (int bytemode, int sizeflag)
4108 {
4109 int add = 0;
4110 if (mod != 3)
4111 {
4112 if (intel_syntax && bytemode == v_mode)
4113 {
4114 switch (prefixes & (PREFIX_DATA|PREFIX_REPZ|PREFIX_REPNZ))
4115 {
4116 case 0: bytemode = x_mode; break;
4117 case PREFIX_REPZ: bytemode = d_mode; used_prefixes |= PREFIX_REPZ; break;
4118 case PREFIX_DATA: bytemode = x_mode; used_prefixes |= PREFIX_DATA; break;
4119 case PREFIX_REPNZ: bytemode = q_mode; used_prefixes |= PREFIX_REPNZ; break;
4120 default: bytemode = 0; break;
4121 }
4122 }
4123 OP_E (bytemode, sizeflag);
4124 return;
4125 }
4126 USED_REX (REX_EXTZ);
4127 if (rex & REX_EXTZ)
4128 add = 8;
4130 /* Skip mod/rm byte. */
4131 MODRM_CHECK;
4132 codep++;
4133 sprintf (scratchbuf, "%%xmm%d", rm + add);
4134 oappend (scratchbuf + intel_syntax);
4135 }
4137 static void
4138 OP_MS (int bytemode, int sizeflag)
4139 {
4140 if (mod == 3)
4141 OP_EM (bytemode, sizeflag);
4142 else
4143 BadOp ();
4144 }
4146 static void
4147 OP_XS (int bytemode, int sizeflag)
4148 {
4149 if (mod == 3)
4150 OP_EX (bytemode, sizeflag);
4151 else
4152 BadOp ();
4153 }
4155 static void
4156 OP_M (int bytemode, int sizeflag)
4157 {
4158 if (mod == 3)
4159 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */
4160 else
4161 OP_E (bytemode, sizeflag);
4162 }
4164 static void
4165 OP_0f07 (int bytemode, int sizeflag)
4166 {
4167 if (mod != 3 || rm != 0)
4168 BadOp ();
4169 else
4170 OP_E (bytemode, sizeflag);
4171 }
4173 static void
4174 OP_0fae (int bytemode, int sizeflag)
4175 {
4176 if (mod == 3)
4177 {
4178 if (reg == 7)
4179 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
4181 if (reg < 5 || rm != 0)
4182 {
4183 BadOp (); /* bad sfence, mfence, or lfence */
4184 return;
4185 }
4186 }
4187 else if (reg != 7)
4188 {
4189 BadOp (); /* bad clflush */
4190 return;
4191 }
4193 OP_E (bytemode, sizeflag);
4194 }
4196 static void
4197 NOP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4198 {
4199 /* NOP with REPZ prefix is called PAUSE. */
4200 if (prefixes == PREFIX_REPZ)
4201 strcpy (obuf, "pause");
4202 }
4204 static const char *const Suffix3DNow[] = {
4205 /* 00 */ NULL, NULL, NULL, NULL,
4206 /* 04 */ NULL, NULL, NULL, NULL,
4207 /* 08 */ NULL, NULL, NULL, NULL,
4208 /* 0C */ "pi2fw", "pi2fd", NULL, NULL,
4209 /* 10 */ NULL, NULL, NULL, NULL,
4210 /* 14 */ NULL, NULL, NULL, NULL,
4211 /* 18 */ NULL, NULL, NULL, NULL,
4212 /* 1C */ "pf2iw", "pf2id", NULL, NULL,
4213 /* 20 */ NULL, NULL, NULL, NULL,
4214 /* 24 */ NULL, NULL, NULL, NULL,
4215 /* 28 */ NULL, NULL, NULL, NULL,
4216 /* 2C */ NULL, NULL, NULL, NULL,
4217 /* 30 */ NULL, NULL, NULL, NULL,
4218 /* 34 */ NULL, NULL, NULL, NULL,
4219 /* 38 */ NULL, NULL, NULL, NULL,
4220 /* 3C */ NULL, NULL, NULL, NULL,
4221 /* 40 */ NULL, NULL, NULL, NULL,
4222 /* 44 */ NULL, NULL, NULL, NULL,
4223 /* 48 */ NULL, NULL, NULL, NULL,
4224 /* 4C */ NULL, NULL, NULL, NULL,
4225 /* 50 */ NULL, NULL, NULL, NULL,
4226 /* 54 */ NULL, NULL, NULL, NULL,
4227 /* 58 */ NULL, NULL, NULL, NULL,
4228 /* 5C */ NULL, NULL, NULL, NULL,
4229 /* 60 */ NULL, NULL, NULL, NULL,
4230 /* 64 */ NULL, NULL, NULL, NULL,
4231 /* 68 */ NULL, NULL, NULL, NULL,
4232 /* 6C */ NULL, NULL, NULL, NULL,
4233 /* 70 */ NULL, NULL, NULL, NULL,
4234 /* 74 */ NULL, NULL, NULL, NULL,
4235 /* 78 */ NULL, NULL, NULL, NULL,
4236 /* 7C */ NULL, NULL, NULL, NULL,
4237 /* 80 */ NULL, NULL, NULL, NULL,
4238 /* 84 */ NULL, NULL, NULL, NULL,
4239 /* 88 */ NULL, NULL, "pfnacc", NULL,
4240 /* 8C */ NULL, NULL, "pfpnacc", NULL,
4241 /* 90 */ "pfcmpge", NULL, NULL, NULL,
4242 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
4243 /* 98 */ NULL, NULL, "pfsub", NULL,
4244 /* 9C */ NULL, NULL, "pfadd", NULL,
4245 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
4246 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
4247 /* A8 */ NULL, NULL, "pfsubr", NULL,
4248 /* AC */ NULL, NULL, "pfacc", NULL,
4249 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
4250 /* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
4251 /* B8 */ NULL, NULL, NULL, "pswapd",
4252 /* BC */ NULL, NULL, NULL, "pavgusb",
4253 /* C0 */ NULL, NULL, NULL, NULL,
4254 /* C4 */ NULL, NULL, NULL, NULL,
4255 /* C8 */ NULL, NULL, NULL, NULL,
4256 /* CC */ NULL, NULL, NULL, NULL,
4257 /* D0 */ NULL, NULL, NULL, NULL,
4258 /* D4 */ NULL, NULL, NULL, NULL,
4259 /* D8 */ NULL, NULL, NULL, NULL,
4260 /* DC */ NULL, NULL, NULL, NULL,
4261 /* E0 */ NULL, NULL, NULL, NULL,
4262 /* E4 */ NULL, NULL, NULL, NULL,
4263 /* E8 */ NULL, NULL, NULL, NULL,
4264 /* EC */ NULL, NULL, NULL, NULL,
4265 /* F0 */ NULL, NULL, NULL, NULL,
4266 /* F4 */ NULL, NULL, NULL, NULL,
4267 /* F8 */ NULL, NULL, NULL, NULL,
4268 /* FC */ NULL, NULL, NULL, NULL,
4269 };
4271 static void
4272 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4273 {
4274 const char *mnemonic;
4276 FETCH_DATA (the_info, codep + 1);
4277 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4278 place where an 8-bit immediate would normally go. ie. the last
4279 byte of the instruction. */
4280 obufp = obuf + strlen (obuf);
4281 mnemonic = Suffix3DNow[*codep++ & 0xff];
4282 if (mnemonic)
4283 oappend (mnemonic);
4284 else
4285 {
4286 /* Since a variable sized modrm/sib chunk is between the start
4287 of the opcode (0x0f0f) and the opcode suffix, we need to do
4288 all the modrm processing first, and don't know until now that
4289 we have a bad opcode. This necessitates some cleaning up. */
4290 op1out[0] = '\0';
4291 op2out[0] = '\0';
4292 BadOp ();
4293 }
4294 }
4296 static const char *simd_cmp_op[] = {
4297 "eq",
4298 "lt",
4299 "le",
4300 "unord",
4301 "neq",
4302 "nlt",
4303 "nle",
4304 "ord"
4305 };
4307 static void
4308 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4309 {
4310 unsigned int cmp_type;
4312 FETCH_DATA (the_info, codep + 1);
4313 obufp = obuf + strlen (obuf);
4314 cmp_type = *codep++ & 0xff;
4315 if (cmp_type < 8)
4316 {
4317 char suffix1 = 'p', suffix2 = 's';
4318 used_prefixes |= (prefixes & PREFIX_REPZ);
4319 if (prefixes & PREFIX_REPZ)
4320 suffix1 = 's';
4321 else
4322 {
4323 used_prefixes |= (prefixes & PREFIX_DATA);
4324 if (prefixes & PREFIX_DATA)
4325 suffix2 = 'd';
4326 else
4327 {
4328 used_prefixes |= (prefixes & PREFIX_REPNZ);
4329 if (prefixes & PREFIX_REPNZ)
4330 suffix1 = 's', suffix2 = 'd';
4331 }
4332 }
4333 sprintf (scratchbuf, "cmp%s%c%c",
4334 simd_cmp_op[cmp_type], suffix1, suffix2);
4335 used_prefixes |= (prefixes & PREFIX_REPZ);
4336 oappend (scratchbuf);
4337 }
4338 else
4339 {
4340 /* We have a bad extension byte. Clean up. */
4341 op1out[0] = '\0';
4342 op2out[0] = '\0';
4343 BadOp ();
4344 }
4345 }
4347 static void
4348 SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
4349 {
4350 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4351 forms of these instructions. */
4352 if (mod == 3)
4353 {
4354 char *p = obuf + strlen (obuf);
4355 *(p + 1) = '\0';
4356 *p = *(p - 1);
4357 *(p - 1) = *(p - 2);
4358 *(p - 2) = *(p - 3);
4359 *(p - 3) = extrachar;
4360 }
4361 }
4363 static void
4364 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4365 {
4366 if (mod == 3 && reg == 1 && rm <= 1)
4367 {
4368 /* Override "sidt". */
4369 char *p = obuf + strlen (obuf) - 4;
4371 /* We might have a suffix. */
4372 if (*p == 'i')
4373 --p;
4375 if (rm)
4376 {
4377 /* mwait %eax,%ecx */
4378 strcpy (p, "mwait");
4379 if (!intel_syntax)
4380 strcpy (op1out, names32[0]);
4381 }
4382 else
4383 {
4384 /* monitor %eax,%ecx,%edx" */
4385 strcpy (p, "monitor");
4386 if (!intel_syntax)
4387 {
4388 if (!mode_64bit)
4389 strcpy (op1out, names32[0]);
4390 else if (!(prefixes & PREFIX_ADDR))
4391 strcpy (op1out, names64[0]);
4392 else
4393 {
4394 strcpy (op1out, names32[0]);
4395 used_prefixes |= PREFIX_ADDR;
4396 }
4397 strcpy (op3out, names32[2]);
4398 }
4399 }
4400 if (!intel_syntax)
4401 {
4402 strcpy (op2out, names32[1]);
4403 two_source_ops = 1;
4404 }
4406 codep++;
4407 }
4408 else
4409 OP_E (0, sizeflag);
4410 }
4412 static void
4413 INVLPG_Fixup (int bytemode, int sizeflag)
4414 {
4415 const char *alt;
4417 switch (*codep)
4418 {
4419 case 0xf8:
4420 alt = "swapgs";
4421 break;
4422 case 0xf9:
4423 alt = "rdtscp";
4424 break;
4425 default:
4426 OP_E (bytemode, sizeflag);
4427 return;
4428 }
4429 /* Override "invlpg". */
4430 strcpy (obuf + strlen (obuf) - 6, alt);
4431 codep++;
4432 }
4434 static void
4435 BadOp (void)
4436 {
4437 /* Throw away prefixes and 1st. opcode byte. */
4438 codep = insn_codep + 1;
4439 oappend ("(bad)");
4440 }
.