lxdream 0.9.1| filename | src/aica/aica.c |
| changeset | 35:21a4be098304 |
| prev | 30:89b30313d757 |
| next | 37:1d84f4c18816 |
| author | nkeynes |
| date | Mon Dec 26 03:54:55 2005 +0000 (14 years ago) |
| permissions | -rw-r--r-- |
| last change | Remove modules.h - move definitions into dream.h Add source string to output list (taken from module name) ARM Work in progress |
| view | annotate | diff | log | raw |
1 /**
2 * $Id: aica.c,v 1.6 2005-12-26 03:54:55 nkeynes Exp $
3 *
4 * This is the core sound system (ie the bit which does the actual work)
5 *
6 * Copyright (c) 2005 Nathan Keynes.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
19 #define MODULE aica_module
21 #include "dream.h"
22 #include "mem.h"
23 #include "aica.h"
24 #define MMIO_IMPL
25 #include "aica.h"
27 MMIO_REGION_READ_DEFFN( AICA0 )
28 MMIO_REGION_READ_DEFFN( AICA1 )
29 MMIO_REGION_READ_DEFFN( AICA2 )
31 void aica_init( void );
32 void aica_reset( void );
33 void aica_start( void );
34 void aica_stop( void );
35 void aica_save_state( FILE *f );
36 int aica_load_state( FILE *f );
37 uint32_t aica_run_slice( uint32_t );
40 struct dreamcast_module aica_module = { "AICA", aica_init, aica_reset,
41 aica_start, aica_run_slice, aica_stop,
42 aica_save_state, aica_load_state };
44 /**
45 * Initialize the AICA subsystem. Note requires that
46 */
47 void aica_init( void )
48 {
49 register_io_regions( mmio_list_spu );
50 MMIO_NOTRACE(AICA0);
51 MMIO_NOTRACE(AICA1);
52 arm_mem_init();
53 }
55 void aica_reset( void )
56 {
57 arm_reset();
58 }
60 void aica_start( void )
61 {
63 }
65 uint32_t aica_run_slice( uint32_t nanosecs )
66 {
67 /* Run arm instructions */
68 int reset = MMIO_READ( AICA2, AICA_RESET );
69 if( reset & 1 == 0 ) {
70 /* Running */
71 /* nanosecs = arm_run_slice( nanosecs ); */
72 }
73 /* Generate audio buffer */
74 }
76 void aica_stop( void )
77 {
79 }
81 void aica_save_state( FILE *f )
82 {
83 arm_save_state( f );
84 }
86 int aica_load_state( FILE *f )
87 {
88 return arm_load_state( f );
89 }
91 /** Channel register structure:
92 * 00
93 * 04
94 * 08 4 Loop start address
95 * 0C 4 Loop end address
96 * 10 4 Volume envelope
97 * 14
98 * 18 4 Frequency (floating point
99 * 1C
100 * 20
101 * 24 1 Pan
102 * 25 1 ??
103 * 26
104 * 27
105 * 28 1 ??
106 * 29 1 Volume
107 * 2C
108 * 30
109 *
111 /* Write to channels 0-31 */
112 void mmio_region_AICA0_write( uint32_t reg, uint32_t val )
113 {
114 // aica_write_channel( reg >> 7, reg % 128, val );
115 MMIO_WRITE( AICA0, reg, val );
117 }
119 /* Write to channels 32-64 */
120 void mmio_region_AICA1_write( uint32_t reg, uint32_t val )
121 {
122 // aica_write_channel( (reg >> 7) + 32, reg % 128, val );
123 MMIO_WRITE( AICA1, reg, val );
124 }
126 /* General registers */
127 void mmio_region_AICA2_write( uint32_t reg, uint32_t val )
128 {
129 uint32_t tmp;
130 switch( reg ) {
131 case AICA_RESET:
132 tmp = MMIO_READ( AICA2, AICA_RESET );
133 if( tmp & 1 == 1 && val & 1 == 0 ) {
134 /* ARM enabled - execute a core reset */
135 INFO( "ARM enabled" );
136 arm_reset();
137 }
138 MMIO_WRITE( AICA2, AICA_RESET, val );
139 break;
140 default:
141 MMIO_WRITE( AICA2, reg, val );
142 break;
143 }
144 }
.