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filename src/sh4/sh4mem.c
changeset 430:467519b050f4
prev422:61a0598e07ff
next448:3e5f0c52f0ec
author nkeynes
date Tue Oct 09 08:12:29 2007 +0000 (16 years ago)
permissions -rw-r--r--
last change Fix compilation warnings
view annotate diff log raw 
     1 /**

     2  * $Id: sh4mem.c,v 1.28 2007-10-08 12:09:06 nkeynes Exp $

     3  * sh4mem.c is responsible for the SH4's access to memory (including memory

     4  * mapped I/O), using the page maps created in mem.c

     5  *

     6  * Copyright (c) 2005 Nathan Keynes.

     7  *

     8  * This program is free software; you can redistribute it and/or modify

     9  * it under the terms of the GNU General Public License as published by

    10  * the Free Software Foundation; either version 2 of the License, or

    11  * (at your option) any later version.

    12  *

    13  * This program is distributed in the hope that it will be useful,

    14  * but WITHOUT ANY WARRANTY; without even the implied warranty of

    15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

    16  * GNU General Public License for more details.

    17  */

    18 

    19 #define MODULE sh4_module

    20 

    21 #include <string.h>

    22 #include <zlib.h>

    23 #include "dream.h"

    24 #include "mem.h"

    25 #include "mmio.h"

    26 #include "dreamcast.h"

    27 #include "sh4/sh4core.h"

    28 #include "sh4/sh4mmio.h"

    29 #include "sh4/xltcache.h"

    30 #include "pvr2/pvr2.h"

    31 #include "asic.h"

    32 

    33 #define OC_BASE 0x1C000000

    34 #define OC_TOP  0x20000000

    35 

    36 #define TRANSLATE_VIDEO_64BIT_ADDRESS(a)  ( (((a)&0x00FFFFF8)>>1)|(((a)&0x00000004)<<20)|((a)&0x03)|0x05000000 )

    37 

    38 #ifdef ENABLE_WATCH

    39 #define CHECK_READ_WATCH( addr, size ) \

    40     if( mem_is_watched(addr,size,WATCH_READ) != NULL ) { \

    41         WARN( "Watch triggered at %08X by %d byte read", addr, size ); \

    42         dreamcast_stop(); \

    43     }

    44 #define CHECK_WRITE_WATCH( addr, size, val )                  \

    45     if( mem_is_watched(addr,size,WATCH_WRITE) != NULL ) { \

    46         WARN( "Watch triggered at %08X by %d byte write <= %0*X", addr, size, size*2, val ); \

    47         dreamcast_stop(); \

    48     }

    49 #else

    50 #define CHECK_READ_WATCH( addr, size )

    51 #define CHECK_WRITE_WATCH( addr, size, val )

    52 #endif

    53 

    54 #ifdef ENABLE_TRACE_IO

    55 #define TRACE_IO( str, p, r, ... ) if(io_rgn[(uint32_t)p]->trace_flag && !MMIO_NOTRACE_BYNUM((uint32_t)p,r)) \

    56     TRACE( str " [%s.%s: %s]", __VA_ARGS__,			       \

    57     MMIO_NAME_BYNUM((uint32_t)p), MMIO_REGID_BYNUM((uint32_t)p, r), \

    58     MMIO_REGDESC_BYNUM((uint32_t)p, r) )

    59 #define TRACE_P4IO( str, io, r, ... ) if(io->trace_flag && !MMIO_NOTRACE_IOBYNUM(io,r)) \

    60 TRACE( str " [%s.%s: %s]", __VA_ARGS__, \

    61     io->id, MMIO_REGID_IOBYNUM(io, r), \

    62     MMIO_REGDESC_IOBYNUM(io, r) )

    63 #else

    64 #define TRACE_IO( str, p, r, ... )

    65 #define TRACE_P4IO( str, io, r, ... )

    66 #endif

    67 

    68 extern struct mem_region mem_rgn[];

    69 extern struct mmio_region *P4_io[];

    70 char *sh4_main_ram;

    71 

    72 int32_t sh4_read_p4( uint32_t addr )

    73 {

    74     struct mmio_region *io = P4_io[(addr&0x1FFFFFFF)>>19];

    75     if( !io ) {

    76         if( (addr & 0xFF000000) != 0xF4000000 ) {

    77 	    /* OC address cache isn't implemented, but don't complain about it.

    78 	     * Complain about anything else though */

    79             ERROR( "Attempted read from unknown P4 region: %08X", addr );

    80         }

    81         return 0;

    82     } else {

    83 	int32_t val = io->io_read( addr&0xFFF );

    84 	TRACE_P4IO( "Long read %08X <= %08X", io, (addr&0xFFF), val, addr );

    85         return val;

    86     }    

    87 }

    88 

    89 void sh4_write_p4( uint32_t addr, int32_t val )

    90 {

    91     struct mmio_region *io = P4_io[(addr&0x1FFFFFFF)>>19];

    92     if( !io ) {

    93         if( (addr & 0xFC000000) == 0xE0000000 ) {

    94             /* Store queue */

    95             SH4_WRITE_STORE_QUEUE( addr, val );

    96         } else if( (addr & 0xFF000000) != 0xF4000000 ) {

    97 	    /* OC address cache isn't implemented, but don't complain about it.

    98 	     * Complain about anything else though */

    99             ERROR( "Attempted write to unknown P4 region: %08X", addr );

   100         }

   101     } else {

   102 	TRACE_P4IO( "Long write %08X => %08X", io, (addr&0xFFF), val, addr );

   103         io->io_write( addr&0xFFF, val );

   104     }

   105 }

   106 

   107 int32_t sh4_read_phys_word( uint32_t addr )

   108 {

   109     char *page;

   110     if( addr >= 0xE0000000 ) /* P4 Area, handled specially */

   111         return SIGNEXT16(sh4_read_p4( addr ));

   112     

   113     if( (addr&0x1F800000) == 0x04000000 ) {

   114         addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);

   115     }

   116 

   117     page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   118     if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   119         if( page == NULL ) {

   120             ERROR( "Attempted word read to missing page: %08X",

   121                    addr );

   122             return 0;

   123         }

   124         return SIGNEXT16(io_rgn[(uint32_t)page]->io_read(addr&0xFFF));

   125     } else {

   126         return SIGNEXT16(*(int16_t *)(page+(addr&0xFFF)));

   127     }

   128 }

   129 

   130 int32_t sh4_read_long( uint32_t addr )

   131 {

   132     char *page;

   133     

   134     CHECK_READ_WATCH(addr,4);

   135 

   136     if( addr >= 0xE0000000 ) { /* P4 Area, handled specially */

   137         return sh4_read_p4( addr );

   138     } else if( (addr&0x1C000000) == 0x0C000000 ) {

   139 	return *(int32_t *)(sh4_main_ram + (addr&0x00FFFFFF));

   140     } else if( (addr&0x1F800000) == 0x04000000 ) {

   141         addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);

   142 	pvr2_render_buffer_invalidate(addr, FALSE);

   143     } else if( (addr&0x1F800000) == 0x05000000 ) {

   144 	pvr2_render_buffer_invalidate(addr, FALSE);

   145     }

   146 

   147     page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   148     if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   149         int32_t val;

   150         if( page == NULL ) {

   151             ERROR( "Attempted long read to missing page: %08X", addr );

   152             return 0;

   153         }

   154         val = io_rgn[(uint32_t)page]->io_read(addr&0xFFF);

   155         TRACE_IO( "Long read %08X <= %08X", page, (addr&0xFFF), val, addr );

   156         return val;

   157     } else {

   158         return *(int32_t *)(page+(addr&0xFFF));

   159     }

   160 }

   161 

   162 int32_t sh4_read_word( uint32_t addr )

   163 {

   164     char *page;

   165 

   166     CHECK_READ_WATCH(addr,2);

   167 

   168     if( addr >= 0xE0000000 ) { /* P4 Area, handled specially */

   169         return SIGNEXT16(sh4_read_p4( addr ));

   170     } else if( (addr&0x1C000000) == 0x0C000000 ) {

   171 	return SIGNEXT16(*(int16_t *)(sh4_main_ram + (addr&0x00FFFFFF)));

   172     } else if( (addr&0x1F800000) == 0x04000000 ) {

   173         addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);

   174 	pvr2_render_buffer_invalidate(addr, FALSE);

   175     } else if( (addr&0x1F800000) == 0x05000000 ) {

   176 	pvr2_render_buffer_invalidate(addr, FALSE);

   177     }

   178     

   179     page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   180     if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   181         int32_t val;

   182         if( page == NULL ) {

   183             ERROR( "Attempted word read to missing page: %08X", addr );

   184             return 0;

   185         }

   186         val = SIGNEXT16(io_rgn[(uint32_t)page]->io_read(addr&0xFFF));

   187         TRACE_IO( "Word read %04X <= %08X", page, (addr&0xFFF), val&0xFFFF, addr );

   188         return val;

   189     } else {

   190         return SIGNEXT16(*(int16_t *)(page+(addr&0xFFF)));

   191     }

   192 }

   193 

   194 int32_t sh4_read_byte( uint32_t addr )

   195 {

   196     char *page;

   197 

   198     CHECK_READ_WATCH(addr,1);

   199 

   200     if( addr >= 0xE0000000 ) { /* P4 Area, handled specially */

   201         return SIGNEXT8(sh4_read_p4( addr ));

   202     } else if( (addr&0x1C000000) == 0x0C000000 ) {

   203 	return SIGNEXT8(*(int8_t *)(sh4_main_ram + (addr&0x00FFFFFF)));

   204     } else if( (addr&0x1F800000) == 0x04000000 ) {

   205         addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);

   206     	pvr2_render_buffer_invalidate(addr, FALSE);

   207     } else if( (addr&0x1F800000) == 0x05000000 ) {

   208 	pvr2_render_buffer_invalidate(addr, FALSE);

   209     }

   210 

   211     

   212     page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   213     if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   214         int32_t val;

   215         if( page == NULL ) {

   216             ERROR( "Attempted byte read to missing page: %08X", addr );

   217             return 0;

   218         }

   219         val = SIGNEXT8(io_rgn[(uint32_t)page]->io_read(addr&0xFFF));

   220         TRACE_IO( "Byte read %02X <= %08X", page, (addr&0xFFF), val&0xFF, addr );

   221         return val;

   222     } else {

   223         return SIGNEXT8(*(int8_t *)(page+(addr&0xFFF)));

   224     }

   225 }

   226 

   227 void sh4_write_long( uint32_t addr, uint32_t val )

   228 {

   229     char *page;

   230 

   231     // fprintf( stderr, "MOV.L %08X => %08X\n", val, addr );

   232     CHECK_WRITE_WATCH(addr,4,val);

   233 

   234     if( addr >= 0xE0000000 ) {

   235         sh4_write_p4( addr, val );

   236         return;

   237     } else if( (addr&0x1C000000) == 0x0C000000 ) {

   238 	*(uint32_t *)(sh4_main_ram + (addr&0x00FFFFFF)) = val;

   239 	xlat_invalidate_long(addr);

   240 	return;

   241     } else if( (addr&0x1F800000) == 0x04000000 || 

   242 	       (addr&0x1F800000) == 0x11000000 ) {

   243 	texcache_invalidate_page(addr& 0x7FFFFF);

   244         addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);

   245 	pvr2_render_buffer_invalidate(addr, TRUE);

   246     } else if( (addr&0x1F800000) == 0x05000000 ) {

   247 	pvr2_render_buffer_invalidate(addr, TRUE);

   248     }

   249 

   250     if( (addr&0x1FFFFFFF) < 0x200000 ) {

   251         ERROR( "Attempted write to read-only memory: %08X => %08X", val, addr);

   252         sh4_stop();

   253         return;

   254     }

   255     if( (addr&0x1F800000) == 0x00800000 )

   256 	asic_g2_write_word();

   257 

   258     page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   259     if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   260         if( page == NULL ) {

   261 	    if( (addr & 0x1F000000) >= 0x04000000 &&

   262 		(addr & 0x1F000000) < 0x07000000 )

   263 		return;

   264             ERROR( "Long write to missing page: %08X => %08X", val, addr );

   265             return;

   266         }

   267         TRACE_IO( "Long write %08X => %08X", page, (addr&0xFFF), val, addr );

   268         io_rgn[(uint32_t)page]->io_write(addr&0xFFF, val);

   269     } else {

   270         *(uint32_t *)(page+(addr&0xFFF)) = val;

   271     }

   272 }

   273 

   274 void sh4_write_word( uint32_t addr, uint32_t val )

   275 {

   276     char *page;

   277 

   278     //    fprintf( stderr, "MOV.W %04X => %08X\n", val, addr );

   279     CHECK_WRITE_WATCH(addr,2,val);

   280 

   281     if( addr >= 0xE0000000 ) {

   282         sh4_write_p4( addr, (int16_t)val );

   283         return;

   284     } else if( (addr&0x1C000000) == 0x0C000000 ) {

   285 	*(uint16_t *)(sh4_main_ram + (addr&0x00FFFFFF)) = val;

   286 	xlat_invalidate_word(addr);

   287 	return;

   288     } else if( (addr&0x1F800000) == 0x04000000 ||

   289 	(addr&0x1F800000) == 0x11000000 ) {

   290 	texcache_invalidate_page(addr& 0x7FFFFF);

   291         addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);

   292 	pvr2_render_buffer_invalidate(addr, TRUE);

   293     } else if( (addr&0x1F800000) == 0x05000000 ) {

   294 	pvr2_render_buffer_invalidate(addr, TRUE);

   295     }

   296 

   297     if( (addr&0x1FFFFFFF) < 0x200000 ) {

   298         ERROR( "Attempted write to read-only memory: %08X => %08X", val, addr);

   299         sh4_stop();

   300         return;

   301     }

   302     page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   303     if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   304         if( page == NULL ) {

   305             ERROR( "Attempted word write to missing page: %08X", addr );

   306             return;

   307         }

   308         TRACE_IO( "Word write %04X => %08X", page, (addr&0xFFF), val&0xFFFF, addr );

   309         io_rgn[(uint32_t)page]->io_write(addr&0xFFF, val);

   310     } else {

   311         *(uint16_t *)(page+(addr&0xFFF)) = val;

   312     }

   313 }

   314 

   315 void sh4_write_byte( uint32_t addr, uint32_t val )

   316 {

   317     char *page;

   318     

   319     //    fprintf( stderr, "MOV.B %02X => %08X\n", val, addr );

   320     CHECK_WRITE_WATCH(addr,1,val);

   321 

   322     if( addr >= 0xE0000000 ) {

   323         sh4_write_p4( addr, (int8_t)val );

   324         return;

   325     } else if( (addr&0x1C000000) == 0x0C000000 ) {

   326 	*(uint8_t *)(sh4_main_ram + (addr&0x00FFFFFF)) = val;

   327 	xlat_invalidate_word(addr);

   328 	return;

   329     } else if( (addr&0x1F800000) == 0x04000000 ||

   330 	       (addr&0x1F800000) == 0x11000000 ) {

   331 	texcache_invalidate_page(addr& 0x7FFFFF);

   332         addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);

   333 	pvr2_render_buffer_invalidate(addr, TRUE);

   334     } else if( (addr&0x1F800000) == 0x05000000 ) {

   335 	pvr2_render_buffer_invalidate(addr, TRUE);

   336     }

   337     

   338     if( (addr&0x1FFFFFFF) < 0x200000 ) {

   339         ERROR( "Attempted write to read-only memory: %08X => %08X", val, addr);

   340         sh4_stop();

   341         return;

   342     }

   343     page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   344     if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   345         if( page == NULL ) {

   346             ERROR( "Attempted byte write to missing page: %08X", addr );

   347             return;

   348         }

   349         TRACE_IO( "Byte write %02X => %08X", page, (addr&0xFFF), val&0xFF, addr );

   350         io_rgn[(uint32_t)page]->io_write( (addr&0xFFF), val);

   351     } else {

   352         *(uint8_t *)(page+(addr&0xFFF)) = val;

   353     }

   354 }

   355 

   356 

   357 

   358 /* FIXME: Handle all the many special cases when the range doesn't fall cleanly

   359  * into the same memory block

   360  */

   361 void mem_copy_from_sh4( unsigned char *dest, uint32_t srcaddr, size_t count ) {

   362     if( srcaddr >= 0x04000000 && srcaddr < 0x05000000 ) {

   363 	pvr2_vram64_read( dest, srcaddr, count );

   364     } else {

   365 	char *src = mem_get_region(srcaddr);

   366 	if( src == NULL ) {

   367 	    ERROR( "Attempted block read from unknown address %08X", srcaddr );

   368 	} else {

   369 	    memcpy( dest, src, count );

   370 	}

   371     }

   372 }

   373 

   374 void mem_copy_to_sh4( uint32_t destaddr, unsigned char *src, size_t count ) {

   375     if( destaddr >= 0x10000000 && destaddr < 0x14000000 ) {

   376 	pvr2_dma_write( destaddr, src, count );

   377 	return;

   378     } else if( (destaddr & 0x1F800000) == 0x05000000 ) {

   379 	pvr2_render_buffer_invalidate( destaddr, TRUE );

   380     } else if( (destaddr & 0x1F800000) == 0x04000000 ) {

   381 	pvr2_vram64_write( destaddr, src, count );

   382 	return;

   383     }

   384     char *dest = mem_get_region(destaddr);

   385     if( dest == NULL )

   386 	ERROR( "Attempted block write to unknown address %08X", destaddr );

   387     else {

   388 	xlat_invalidate_block( destaddr, count );

   389 	memcpy( dest, src, count );

   390     }

   391 }

   392 

   393 void sh4_flush_store_queue( uint32_t addr )

   394 {

   395     /* Store queue operation */

   396     int queue = (addr&0x20)>>2;

   397     unsigned char *src = (unsigned char *)&sh4r.store_queue[queue];

   398     uint32_t hi = (MMIO_READ( MMU, (queue == 0 ? QACR0 : QACR1) ) & 0x1C) << 24;

   399     uint32_t target = (addr&0x03FFFFE0) | hi;

   400     mem_copy_to_sh4( target, src, 32 );

   401 }
.