filename | src/sh4/mem.c |
changeset | 2:42349f6ea216 |
prev | 1:eea311cfd33e |
author | nkeynes |
date | Thu Dec 08 13:38:00 2005 +0000 (18 years ago) |
permissions | -rw-r--r-- |
last change | Generalise the core debug window to allow multiple instances. Add cpu description structure to define different cpus for use by the debug window, in preparation for ARM implementation |
view | annotate | diff | log | raw |
1 #include <sys/mman.h>
2 #include <assert.h>
3 #include <stdint.h>
4 #include <stdlib.h>
5 #include <stdio.h>
6 #include <unistd.h>
7 #include <fcntl.h>
8 #include <errno.h>
9 #include <string.h>
10 #include <zlib.h>
11 #include "dream.h"
12 #include "sh4core.h"
13 #include "mem.h"
14 #include "dreamcast.h"
16 #define OC_BASE 0x1C000000
17 #define OC_TOP 0x20000000
19 #ifdef ENABLE_WATCH
20 #define CHECK_READ_WATCH( addr, size ) \
21 if( mem_is_watched(addr,size,WATCH_READ) != NULL ) { \
22 WARN( "Watch triggered at %08X by %d byte read", addr, size ); \
23 dreamcast_stop(); \
24 }
25 #define CHECK_WRITE_WATCH( addr, size, val ) \
26 if( mem_is_watched(addr,size,WATCH_WRITE) != NULL ) { \
27 WARN( "Watch triggered at %08X by %d byte write <= %0*X", addr, size, size*2, val ); \
28 dreamcast_stop(); \
29 }
30 #else
31 #define CHECK_READ_WATCH( addr, size )
32 #define CHECK_WRITE_WATCH( addr, size )
33 #endif
35 #define TRANSLATE_VIDEO_64BIT_ADDRESS(a) ( (((a)&0x00FFFFF8)>>1)|(((a)&0x00000004)<<20)|((a)&0x03)|0x05000000 );
37 static char **page_map = NULL;
38 static char *cache = NULL;
40 struct mem_region mem_rgn[MAX_MEM_REGIONS];
41 struct mmio_region *io_rgn[MAX_IO_REGIONS];
42 struct mmio_region *P4_io[4096];
44 int num_io_rgns = 1, num_mem_rgns = 0;
46 void *mem_alloc_pages( int n )
47 {
48 void *mem = mmap( NULL, n * 4096,
49 PROT_READ|PROT_WRITE, MAP_ANONYMOUS|MAP_PRIVATE, -1, 0 );
50 if( mem == MAP_FAILED ) {
51 ERROR( "Memory allocation failure! (%s)", strerror(errno) );
52 return NULL;
53 }
54 return mem;
55 }
58 void mem_init( void )
59 {
60 page_map = mmap( NULL, sizeof(char *) * PAGE_TABLE_ENTRIES,
61 PROT_READ|PROT_WRITE, MAP_ANONYMOUS|MAP_PRIVATE, -1, 0 );
62 if( page_map == MAP_FAILED ) {
63 ERROR( "Unable to allocate page map! (%s)", strerror(errno) );
64 page_map = NULL;
65 return;
66 }
68 memset( page_map, 0, sizeof(uint32_t) * PAGE_TABLE_ENTRIES );
69 cache = mem_alloc_pages(2);
70 }
72 void mem_reset( void )
73 {
74 /* Restore all mmio registers to their initial settings */
75 int i, j;
76 for( i=1; i<num_io_rgns; i++ ) {
77 for( j=0; io_rgn[i]->ports[j].id != NULL; j++ ) {
78 if( io_rgn[i]->ports[j].def_val != UNDEFINED &&
79 io_rgn[i]->ports[j].def_val != *io_rgn[i]->ports[j].val ) {
80 io_rgn[i]->io_write( io_rgn[i]->ports[j].offset,
81 io_rgn[i]->ports[j].def_val );
82 }
83 }
84 }
85 }
87 struct mem_region *mem_map_region( void *mem, uint32_t base, uint32_t size,
88 char *name, int flags )
89 {
90 int i;
91 mem_rgn[num_mem_rgns].base = base;
92 mem_rgn[num_mem_rgns].size = size;
93 mem_rgn[num_mem_rgns].flags = flags;
94 mem_rgn[num_mem_rgns].name = name;
95 mem_rgn[num_mem_rgns].mem = mem;
96 num_mem_rgns++;
98 for( i=0; i<size>>PAGE_BITS; i++ )
99 page_map[(base>>PAGE_BITS)+i] = mem + (i<<PAGE_BITS);
101 return &mem_rgn[num_mem_rgns-1];
102 }
104 void *mem_create_ram_region( uint32_t base, uint32_t size, char *name )
105 {
106 char *mem;
108 assert( (base&0xFFFFF000) == base ); /* must be page aligned */
109 assert( (size&0x00000FFF) == 0 );
110 assert( num_mem_rgns < MAX_MEM_REGIONS );
111 assert( page_map != NULL );
113 mem = mem_alloc_pages( size>>PAGE_BITS );
115 mem_map_region( mem, base, size, name, 6 );
116 return mem;
117 }
119 void *mem_load_rom( char *file, uint32_t base, uint32_t size, uint32_t crc )
120 {
121 char buf[512], *mem;
122 int fd;
123 uint32_t calc_crc;
124 snprintf( buf, 512, "%s/%s",BIOS_PATH, file );
125 fd = open( buf, O_RDONLY );
126 if( fd == -1 ) {
127 ERROR( "Bios file not found: %s", buf );
128 return NULL;
129 }
130 mem = mmap( NULL, size, PROT_READ, MAP_PRIVATE, fd, 0 );
131 if( mem == MAP_FAILED ) {
132 ERROR( "Unable to map bios file: %s (%s)", file, strerror(errno) );
133 close(fd);
134 return NULL;
135 }
136 mem_map_region( mem, base, size, file, 4 );
138 /* CRC check */
139 calc_crc = crc32(0L, mem, size);
140 if( calc_crc != crc ) {
141 WARN( "Bios CRC Mismatch in %s: %08X (expected %08X)",
142 file, calc_crc, crc);
143 }
144 return mem;
145 }
147 char *mem_get_region_by_name( char *name )
148 {
149 int i;
150 for( i=0; i<num_mem_rgns; i++ ) {
151 if( strcmp( mem_rgn[i].name, name ) == 0 )
152 return mem_rgn[i].mem;
153 }
154 return NULL;
155 }
157 #define OCRAM_START (0x1C000000>>PAGE_BITS)
158 #define OCRAM_END (0x20000000>>PAGE_BITS)
160 void mem_set_cache_mode( int mode )
161 {
162 uint32_t i;
163 switch( mode ) {
164 case MEM_OC_INDEX0: /* OIX=0 */
165 for( i=OCRAM_START; i<OCRAM_END; i++ )
166 page_map[i] = cache + ((i&0x02)<<(PAGE_BITS-1));
167 break;
168 case MEM_OC_INDEX1: /* OIX=1 */
169 for( i=OCRAM_START; i<OCRAM_END; i++ )
170 page_map[i] = cache + ((i&0x02000000)>>(25-PAGE_BITS));
171 break;
172 default: /* disabled */
173 for( i=OCRAM_START; i<OCRAM_END; i++ )
174 page_map[i] = NULL;
175 break;
176 }
177 }
179 void register_io_region( struct mmio_region *io )
180 {
181 int i;
183 assert(io);
184 io->mem = mem_alloc_pages(2);
185 io->save_mem = io->mem + PAGE_SIZE;
186 io->index = (struct mmio_port **)malloc(1024*sizeof(struct mmio_port *));
187 io->trace_flag = 1;
188 memset( io->index, 0, 1024*sizeof(struct mmio_port *) );
189 for( i=0; io->ports[i].id != NULL; i++ ) {
190 io->ports[i].val = (uint32_t *)(io->mem + io->ports[i].offset);
191 *io->ports[i].val = io->ports[i].def_val;
192 io->index[io->ports[i].offset>>2] = &io->ports[i];
193 }
194 memcpy( io->save_mem, io->mem, PAGE_SIZE );
195 if( (io->base & 0xFF000000) == 0xFF000000 ) {
196 /* P4 area (on-chip I/O channels */
197 P4_io[(io->base&0x1FFFFFFF)>>19] = io;
198 } else {
199 page_map[io->base>>12] = (char *)num_io_rgns;
200 }
201 io_rgn[num_io_rgns] = io;
202 num_io_rgns++;
203 }
205 void register_io_regions( struct mmio_region **io )
206 {
207 while( *io ) register_io_region( *io++ );
208 }
210 #define TRACE_IO( str, p, r, ... ) if(io_rgn[(uint32_t)p]->trace_flag) \
211 TRACE( str " [%s.%s: %s]", __VA_ARGS__, \
212 MMIO_NAME_BYNUM((uint32_t)p), MMIO_REGID_BYNUM((uint32_t)p, r), \
213 MMIO_REGDESC_BYNUM((uint32_t)p, r) )
216 int32_t mem_read_p4( uint32_t addr )
217 {
218 struct mmio_region *io = P4_io[(addr&0x1FFFFFFF)>>19];
219 if( !io ) {
220 ERROR( "Attempted read from unknown P4 region: %08X", addr );
221 return 0;
222 } else {
223 return io->io_read( addr&0xFFF );
224 }
225 }
227 void mem_write_p4( uint32_t addr, int32_t val )
228 {
229 struct mmio_region *io = P4_io[(addr&0x1FFFFFFF)>>19];
230 if( !io ) {
231 if( (addr & 0xFC000000) == 0xE0000000 ) {
232 /* Store queue */
233 SH4_WRITE_STORE_QUEUE( addr, val );
234 } else {
235 ERROR( "Attempted write to unknown P4 region: %08X", addr );
236 }
237 } else {
238 io->io_write( addr&0xFFF, val );
239 }
240 }
242 int mem_has_page( uint32_t addr )
243 {
244 char *page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
245 return page != NULL;
246 }
248 int32_t mem_read_phys_word( uint32_t addr )
249 {
250 char *page;
251 if( addr > 0xE0000000 ) /* P4 Area, handled specially */
252 return SIGNEXT16(mem_read_p4( addr ));
254 if( (addr&0x1F800000) == 0x04000000 ) {
255 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
256 }
258 page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
259 if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */
260 if( page == NULL ) {
261 ERROR( "Attempted word read to missing page: %08X",
262 addr );
263 return 0;
264 }
265 return SIGNEXT16(io_rgn[(uint32_t)page]->io_read(addr&0xFFF));
266 } else {
267 return SIGNEXT16(*(int16_t *)(page+(addr&0xFFF)));
268 }
269 }
271 int32_t mem_read_long( uint32_t addr )
272 {
273 char *page;
275 CHECK_READ_WATCH(addr,4);
277 if( addr > 0xE0000000 ) /* P4 Area, handled specially */
278 return mem_read_p4( addr );
280 if( (addr&0x1F800000) == 0x04000000 ) {
281 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
282 }
284 if( IS_MMU_ENABLED() ) {
285 ERROR( "user-mode & mmu translation not implemented, aborting", NULL );
286 sh4_stop();
287 return 0;
288 }
290 page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
291 if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */
292 int32_t val;
293 if( page == NULL ) {
294 ERROR( "Attempted long read to missing page: %08X", addr );
295 return 0;
296 }
297 val = io_rgn[(uint32_t)page]->io_read(addr&0xFFF);
298 TRACE_IO( "Long read %08X <= %08X", page, (addr&0xFFF), val, addr );
299 return val;
300 } else {
301 return *(int32_t *)(page+(addr&0xFFF));
302 }
303 }
305 int32_t mem_read_word( uint32_t addr )
306 {
307 char *page;
309 CHECK_READ_WATCH(addr,2);
311 if( addr > 0xE0000000 ) /* P4 Area, handled specially */
312 return SIGNEXT16(mem_read_p4( addr ));
314 if( (addr&0x1F800000) == 0x04000000 ) {
315 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
316 }
318 if( IS_MMU_ENABLED() ) {
319 ERROR( "user-mode & mmu translation not implemented, aborting", NULL );
320 sh4_stop();
321 return 0;
322 }
324 page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
325 if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */
326 int32_t val;
327 if( page == NULL ) {
328 ERROR( "Attempted word read to missing page: %08X", addr );
329 return 0;
330 }
331 val = SIGNEXT16(io_rgn[(uint32_t)page]->io_read(addr&0xFFF));
332 TRACE_IO( "Word read %04X <= %08X", page, (addr&0xFFF), val&0xFFFF, addr );
333 return val;
334 } else {
335 return SIGNEXT16(*(int16_t *)(page+(addr&0xFFF)));
336 }
337 }
339 int32_t mem_read_byte( uint32_t addr )
340 {
341 char *page;
343 CHECK_READ_WATCH(addr,1);
345 if( addr > 0xE0000000 ) /* P4 Area, handled specially */
346 return SIGNEXT8(mem_read_p4( addr ));
347 if( (addr&0x1F800000) == 0x04000000 ) {
348 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
349 }
351 if( IS_MMU_ENABLED() ) {
352 ERROR( "user-mode & mmu translation not implemented, aborting", NULL );
353 sh4_stop();
354 return 0;
355 }
357 page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
358 if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */
359 int32_t val;
360 if( page == NULL ) {
361 ERROR( "Attempted byte read to missing page: %08X", addr );
362 return 0;
363 }
364 val = SIGNEXT8(io_rgn[(uint32_t)page]->io_read(addr&0xFFF));
365 TRACE_IO( "Byte read %02X <= %08X", page, (addr&0xFFF), val&0xFF, addr );
366 return val;
367 } else {
368 return SIGNEXT8(*(int8_t *)(page+(addr&0xFFF)));
369 }
370 }
372 void mem_write_long( uint32_t addr, uint32_t val )
373 {
374 char *page;
376 CHECK_WRITE_WATCH(addr,4,val);
378 if( addr > 0xE0000000 ) {
379 mem_write_p4( addr, val );
380 return;
381 }
382 if( (addr&0x1F800000) == 0x04000000 ) {
383 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
384 }
386 if( IS_MMU_ENABLED() ) {
387 ERROR( "user-mode & mmu translation not implemented, aborting", NULL );
388 sh4_stop();
389 return;
390 }
391 if( (addr&0x1FFFFFFF) < 0x200000 ) {
392 ERROR( "Attempted write to read-only memory: %08X => %08X", val, addr);
393 sh4_stop();
394 return;
395 }
396 page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
397 if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */
398 if( page == NULL ) {
399 ERROR( "Long write to missing page: %08X => %08X", val, addr );
400 return;
401 }
402 TRACE_IO( "Long write %08X => %08X", page, (addr&0xFFF), val, addr );
403 io_rgn[(uint32_t)page]->io_write(addr&0xFFF, val);
404 } else {
405 *(uint32_t *)(page+(addr&0xFFF)) = val;
406 }
407 }
409 void mem_write_word( uint32_t addr, uint32_t val )
410 {
411 char *page;
413 CHECK_WRITE_WATCH(addr,2,val);
415 if( addr > 0xE0000000 ) {
416 mem_write_p4( addr, (int16_t)val );
417 return;
418 }
419 if( (addr&0x1F800000) == 0x04000000 ) {
420 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
421 }
422 if( IS_MMU_ENABLED() ) {
423 ERROR( "user-mode & mmu translation not implemented, aborting", NULL );
424 sh4_stop();
425 return;
426 }
427 page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
428 if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */
429 if( page == NULL ) {
430 ERROR( "Attempted word write to missing page: %08X", addr );
431 return;
432 }
433 TRACE_IO( "Word write %04X => %08X", page, (addr&0xFFF), val&0xFFFF, addr );
434 io_rgn[(uint32_t)page]->io_write(addr&0xFFF, val);
435 } else {
436 *(uint16_t *)(page+(addr&0xFFF)) = val;
437 }
438 }
440 void mem_write_byte( uint32_t addr, uint32_t val )
441 {
442 char *page;
444 CHECK_WRITE_WATCH(addr,1,val);
446 if( addr > 0xE0000000 ) {
447 mem_write_p4( addr, (int8_t)val );
448 return;
449 }
450 if( (addr&0x1F800000) == 0x04000000 ) {
451 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
452 }
454 if( IS_MMU_ENABLED() ) {
455 ERROR( "user-mode & mmu translation not implemented, aborting", NULL );
456 sh4_stop();
457 return;
458 }
459 page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
460 if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */
461 if( page == NULL ) {
462 ERROR( "Attempted byte write to missing page: %08X", addr );
463 return;
464 }
465 TRACE_IO( "Byte write %02X => %08X", page, (addr&0xFFF), val&0xFF, addr );
466 io_rgn[(uint32_t)page]->io_write( (addr&0xFFF), val);
467 } else {
468 *(uint8_t *)(page+(addr&0xFFF)) = val;
469 }
470 }
472 char *mem_get_region( uint32_t addr )
473 {
474 char *page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
475 if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */
476 return NULL;
477 } else {
478 return page+(addr&0xFFF);
479 }
480 }
482 /* FIXME: Handle all the many special cases when the range doesn't fall cleanly
483 * into the same memory black
484 */
486 void mem_copy_from_sh4( char *dest, uint32_t srcaddr, size_t count ) {
487 char *src = mem_get_region(srcaddr);
488 memcpy( dest, src, count );
489 }
491 void mem_copy_to_sh4( uint32_t destaddr, char *src, size_t count ) {
492 char *dest = mem_get_region(destaddr);
493 memcpy( dest, src, count );
494 }
.