4 * This file defines the interface and structures of the dreamcast's IDE
5 * port. Note that the register definitions are in asic.h, as the registers
6 * fall into the general ASIC ranges (and I don't want to use smaller pages
7 * at this stage). The registers here are exactly as per the ATA
8 * specifications, which makes things a little easier.
10 * Copyright (c) 2005 Nathan Keynes.
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
28 #define GDROM_SENSE_LENGTH 10
29 #define GDROM_MODE_LENGTH 32
31 struct ide_registers {
32 /* IDE interface registers */
33 uint8_t status; /* A05F709C + A05F7018 Read-only */
34 uint8_t control; /* A05F7018 Write-only 01110 */
35 uint8_t error; /* A05F7084 Read-only 10001 */
36 uint8_t feature; /* A05F7084 Write-only 10001 */
37 uint8_t count; /* A05F7088 Read/Write 10010 */
38 uint8_t disc; /* A05F708C Read-only 10011 */
39 uint8_t lba0; /* A05F708C Write-only 10011 (NB: Presumed, TBV */
40 uint8_t lba1; /* A05F7090 Read/Write 10100 */
41 uint8_t lba2; /* A05F7094 Read/Write 10101 */
42 uint8_t device; /* A05F7098 Read/Write 10110 */
43 uint8_t command; /* A05F709C Write-only 10111 */
45 /* Internal IDE state */
46 uint8_t intrq_pending; /* Flag to indicate if the INTRQ line is active */
47 gboolean interface_enabled;
48 gboolean was_reset; /* Flag indicating that the device has just been reset */
50 uint32_t last_packet_command; /* Identifies the command executing during a r/w cycle */
52 /* Sense response for the last executed packet command */
53 unsigned char gdrom_sense[GDROM_SENSE_LENGTH];
54 unsigned char gdrom_mode[GDROM_MODE_LENGTH];
56 /* offset in the buffer of the next word to read/write, or -1
62 /* Status reporting information */
63 uint8_t last_read_track;
65 uint32_t current_mode;
66 uint32_t sectors_left; /* sectors left after current read */
69 #define IDE_STATE_IDLE 0
70 #define IDE_STATE_CMD_WRITE 1
71 #define IDE_STATE_PIO_READ 2
72 #define IDE_STATE_PIO_WRITE 3
73 #define IDE_STATE_DMA_READ 4
74 #define IDE_STATE_DMA_WRITE 5
75 #define IDE_STATE_BUSY 6
78 #define IDE_STATUS_BSY 0x80 /* Busy */
79 #define IDE_STATUS_DRDY 0x40 /* Device ready */
80 #define IDE_STATUS_DMRD 0x20 /* DMA Request */
81 #define IDE_STATUS_SERV 0x10
82 #define IDE_STATUS_DRQ 0x08
83 #define IDE_STATUS_CHK 0x01 /* Check condition (ie error) */
85 #define IDE_FEAT_DMA 0x01
86 #define IDE_FEAT_OVL 0x02
88 #define IDE_COUNT_CD 0x01 /* Command (1)/Data (0) */
89 #define IDE_COUNT_IO 0x02 /* Input (1)/Output (0) */
90 #define IDE_COUNT_REL 0x04 /* Release device */
93 #define IDE_CTL_RESET 0x04
94 #define IDE_CTL_IRQEN 0x02 /* IRQ enabled when == 0 */
96 #define IDE_CMD_NOP 0x00
97 #define IDE_CMD_RESET_DEVICE 0x08
98 #define IDE_CMD_PACKET 0xA0
99 #define IDE_CMD_IDENTIFY_PACKET_DEVICE 0xA1
100 #define IDE_CMD_SERVICE 0xA2
101 #define IDE_CMD_SET_FEATURE 0xEF
103 #define IDE_FEAT_SET_TRANSFER_MODE 0x03
104 #define IDE_XFER_PIO 0x00
105 #define IDE_XFER_PIO_FLOW 0x08
106 #define IDE_XFER_MULTI_DMA 0x20
107 #define IDE_XFER_ULTRA_DMA 0x40
109 extern struct ide_registers idereg;
111 /* Note: control can be written at any time - all other registers are writable
112 * only when ide_can_write_regs() is true
114 #define ide_can_write_regs() ((idereg.status&0x80)==0)
115 #define IS_IDE_IRQ_ENABLED() ((idereg.control&0x02)==0)
118 uint16_t ide_read_data_pio(void);
119 void ide_write_data_pio( uint16_t value );
120 uint32_t ide_read_data_dma( uint32_t addr, uint32_t length );
121 uint8_t ide_read_status(void);
122 uint8_t ide_get_drive_status(void);
123 void ide_write_buffer( unsigned char *data, uint32_t length );
125 void ide_write_command( uint8_t command );
126 void ide_write_control( uint8_t value );
128 void ide_dma_read_req( uint32_t addr, uint32_t length );
.
lxdream 0.9.1