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lxdream.org :: lxdream/src/pvr2/pvr2.h
lxdream 0.9.1
released Jun 29
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filename src/pvr2/pvr2.h
changeset 315:2d8ba198d62c
prev310:00cd8897ad5e
next319:5392aed6a982
author nkeynes
date Tue Jan 23 11:19:32 2007 +0000 (13 years ago)
permissions -rw-r--r--
last change Refactor render buffer read/write to pvr2mem.c
Implement 4-bit indexed textures (tentatively)
Fix RGB24 support
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     1 /**
     2  * $Id: pvr2.h,v 1.25 2007-01-23 11:19:32 nkeynes Exp $
     3  *
     4  * PVR2 (video chip) functions and macros.
     5  *
     6  * Copyright (c) 2005 Nathan Keynes.
     7  *
     8  * This program is free software; you can redistribute it and/or modify
     9  * it under the terms of the GNU General Public License as published by
    10  * the Free Software Foundation; either version 2 of the License, or
    11  * (at your option) any later version.
    12  *
    13  * This program is distributed in the hope that it will be useful,
    14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    16  * GNU General Public License for more details.
    17  */
    19 #include "dream.h"
    20 #include "mem.h"
    21 #include "display.h"
    22 #include "pvr2/pvr2mmio.h"
    23 #include <GL/gl.h>
    25 typedef unsigned int pvraddr_t;
    26 typedef unsigned int pvr64addr_t;
    28 #define DISPMODE_DE  0x00000001 /* Display enable */
    29 #define DISPMODE_SD  0x00000002 /* Scan double */
    30 #define DISPMODE_COL 0x0000000C /* Colour mode */
    31 #define DISPMODE_CD  0x08000000 /* Clock double */
    33 #define COLFMT_RGB15 0x00000000
    34 #define COLFMT_RGB16 0x00000004
    35 #define COLFMT_RGB24 0x00000008
    36 #define COLFMT_RGB32 0x0000000C
    38 #define DISPSIZE_MODULO 0x3FF00000 /* line skip +1 (32-bit words)*/
    39 #define DISPSIZE_LPF    0x000FFC00 /* lines per field */
    40 #define DISPSIZE_PPL    0x000003FF /* pixel words (32 bit) per line */
    42 #define DISPCFG_VP 0x00000001 /* V-sync polarity */
    43 #define DISPCFG_HP 0x00000002 /* H-sync polarity */
    44 #define DISPCFG_I  0x00000010 /* Interlace enable */
    45 #define DISPCFG_BS 0x000000C0 /* Broadcast standard */
    46 #define DISPCFG_VO 0x00000100 /* Video output enable */
    48 #define BS_NTSC 0x00000000
    49 #define BS_PAL  0x00000040
    50 #define BS_PALM 0x00000080 /* ? */
    51 #define BS_PALN 0x000000C0 /* ? */
    53 #define PVR2_RAM_BASE 0x05000000
    54 #define PVR2_RAM_BASE_INT 0x04000000
    55 #define PVR2_RAM_SIZE (8 * 1024 * 1024)
    56 #define PVR2_RAM_PAGES (PVR2_RAM_SIZE>>12)
    57 #define PVR2_RAM_MASK 0x7FFFFF
    59 #define RENDER_ZONLY  0
    60 #define RENDER_NORMAL 1     /* Render non-modified polygons */
    61 #define RENDER_CHEAPMOD 2   /* Render cheap-modified polygons */
    62 #define RENDER_FULLMOD 3    /* Render the fully-modified version of the polygons */
    64 void pvr2_next_frame( void );
    65 void pvr2_set_base_address( uint32_t );
    66 int pvr2_get_frame_count( void );
    67 gboolean pvr2_save_next_scene( const gchar *filename );
    69 #define PVR2_CMD_END_OF_LIST 0x00
    70 #define PVR2_CMD_USER_CLIP   0x20
    71 #define PVR2_CMD_POLY_OPAQUE 0x80
    72 #define PVR2_CMD_MOD_OPAQUE  0x81
    73 #define PVR2_CMD_POLY_TRANS  0x82
    74 #define PVR2_CMD_MOD_TRANS   0x83
    75 #define PVR2_CMD_POLY_PUNCHOUT 0x84
    76 #define PVR2_CMD_VERTEX      0xE0
    77 #define PVR2_CMD_VERTEX_LAST 0xF0
    79 #define PVR2_POLY_TEXTURED 0x00000008
    80 #define PVR2_POLY_SPECULAR 0x00000004
    81 #define PVR2_POLY_SHADED   0x00000002
    82 #define PVR2_POLY_UV_16BIT 0x00000001
    84 #define PVR2_POLY_MODE_CLAMP_RGB 0x00200000
    85 #define PVR2_POLY_MODE_ALPHA    0x00100000
    86 #define PVR2_POLY_MODE_TEXALPHA 0x00080000
    87 #define PVR2_POLY_MODE_FLIP_S   0x00040000
    88 #define PVR2_POLY_MODE_FLIP_T   0x00020000
    89 #define PVR2_POLY_MODE_CLAMP_S  0x00010000
    90 #define PVR2_POLY_MODE_CLAMP_T  0x00008000
    92 #define PVR2_TEX_FORMAT_ARGB1555 0x00000000
    93 #define PVR2_TEX_FORMAT_RGB565   0x08000000
    94 #define PVR2_TEX_FORMAT_ARGB4444 0x10000000
    95 #define PVR2_TEX_FORMAT_YUV422   0x18000000
    96 #define PVR2_TEX_FORMAT_BUMPMAP  0x20000000
    97 #define PVR2_TEX_FORMAT_IDX4     0x28000000
    98 #define PVR2_TEX_FORMAT_IDX8     0x30000000
   100 #define PVR2_TEX_MIPMAP      0x80000000
   101 #define PVR2_TEX_COMPRESSED  0x40000000
   102 #define PVR2_TEX_FORMAT_MASK 0x38000000
   103 #define PVR2_TEX_UNTWIDDLED  0x04000000
   104 #define PVR2_TEX_STRIDE      0x02000000
   106 #define PVR2_TEX_ADDR(x) ( ((x)&0x01FFFFF)<<3 );
   107 #define PVR2_TEX_IS_MIPMAPPED(x) ( (x) & PVR2_TEX_MIPMAP )
   108 #define PVR2_TEX_IS_COMPRESSED(x) ( (x) & PVR2_TEX_COMPRESSED )
   109 #define PVR2_TEX_IS_TWIDDLED(x) (((x) & PVR2_TEX_UNTWIDDLED) == 0)
   110 #define PVR2_TEX_IS_STRIDE(x) (((x) & 0x06000000) == 0x06000000)
   112 /****************************** Frame Buffer *****************************/
   114 /**
   115  * Write to the interleaved memory address space (aka 64-bit address space).
   116  */
   117 void pvr2_vram64_write( sh4addr_t dest, char *src, uint32_t length );
   119 /**
   120  * Write to the interleaved memory address space (aka 64-bit address space),
   121  * using a line length and stride.
   122  */
   123 void pvr2_vram64_write_stride( sh4addr_t dest, char *src, uint32_t line_bytes,
   124 			       uint32_t line_stride_bytes, uint32_t line_count );
   126 /**
   127  * Read from the interleaved memory address space (aka 64-bit address space)
   128  */
   129 void pvr2_vram64_read( char *dest, sh4addr_t src, uint32_t length );
   131 /**
   132  * Read a twiddled image from interleaved memory address space (aka 64-bit address
   133  * space), writing the image to the destination buffer in detwiddled format. 
   134  * Width and height must be powers of 2
   135  * This version reads 4-bit pixels.
   136  */
   137 void pvr2_vram64_read_twiddled_4( char *dest, sh4addr_t src, uint32_t width, uint32_t height );
   140 /**
   141  * Read a twiddled image from interleaved memory address space (aka 64-bit address
   142  * space), writing the image to the destination buffer in detwiddled format. 
   143  * Width and height must be powers of 2
   144  * This version reads 8-bit pixels.
   145  */
   146 void pvr2_vram64_read_twiddled_8( char *dest, sh4addr_t src, uint32_t width, uint32_t height );
   148 /**
   149  * Read a twiddled image from interleaved memory address space (aka 64-bit address
   150  * space), writing the image to the destination buffer in detwiddled format. 
   151  * Width and height must be powers of 2, and src must be 16-bit aligned.
   152  * This version reads 16-bit pixels.
   153  */
   154 void pvr2_vram64_read_twiddled_16( char *dest, sh4addr_t src, uint32_t width, uint32_t height );
   156 /**
   157  * Read an image from the interleaved memory address space (aka 64-bit address space) 
   158  * where the source and destination line sizes may differ. Note that both byte
   159  * counts must be a multiple of 4, and the src address must be 32-bit aligned.
   160  */
   161 void pvr2_vram64_read_stride( char *dest, uint32_t dest_line_bytes, sh4addr_t srcaddr,
   162 			       uint32_t src_line_bytes, uint32_t line_count );
   163 /**
   164  * Dump a portion of vram to a stream from the interleaved memory address 
   165  * space.
   166  */
   167 void pvr2_vram64_dump( sh4addr_t addr, uint32_t length, FILE *f );
   170 /**
   171  * Describes a rendering buffer that's actually held in GL, for when we need
   172  * to fetch the bits back to vram.
   173  */
   174 typedef struct pvr2_render_buffer {
   175     sh4addr_t render_addr; /* The actual address rendered to in pvr ram */
   176     uint32_t size; /* Length of rendering region in bytes */
   177     int width, height;
   178     int colour_format;
   179 } *pvr2_render_buffer_t;
   181 /**
   182  * Flush the indicated render buffer back to PVR. Caller is responsible for
   183  * tracking whether there is actually anything in the buffer.
   184  *
   185  * @param buffer A render buffer indicating the address to store to, and the
   186  * format the data needs to be in.
   187  * @param backBuffer TRUE to flush the back buffer, FALSE for 
   188  * the front buffer.
   189  */
   190 void pvr2_render_buffer_copy_to_sh4( pvr2_render_buffer_t buffer, 
   191 				     gboolean backBuffer );
   193 /**
   194  * Copy data from PVR ram into the GL render buffer. 
   195  *
   196  * @param buffer A render buffer indicating the address to read from, and the
   197  * format the data is in.
   198  * @param backBuffer TRUE to write the back buffer, FALSE for 
   199  * the front buffer.
   200  */
   201 void pvr2_render_buffer_copy_from_sh4( pvr2_render_buffer_t buffer, 
   202 				       gboolean backBuffer );
   205 /**
   206  * Invalidate any caching on the supplied SH4 address
   207  */
   208 gboolean pvr2_render_buffer_invalidate( sh4addr_t addr );
   212 /**************************** Tile Accelerator ***************************/
   213 /**
   214  * Process the data in the supplied buffer as an array of TA command lists.
   215  * Any excess bytes are held pending until a complete list is sent
   216  */
   217 void pvr2_ta_write( char *buf, uint32_t length );
   220 /**
   221  * (Re)initialize the tile accelerator in preparation for the next scene.
   222  * Normally called immediately before commencing polygon transmission.
   223  */
   224 void pvr2_ta_init( void );
   227 /****************************** YUV Converter ****************************/
   229 /**
   230  * Process a block of YUV data.
   231  */
   232 void pvr2_yuv_write( char *buf, uint32_t length );
   234 /**
   235  * Initialize the YUV converter.
   236  */
   237 void pvr2_yuv_init( uint32_t target_addr );
   239 void pvr2_yuv_set_config( uint32_t config );
   241 /********************************* Renderer ******************************/
   243 /**
   244  * Initialize the rendering pipeline.
   245  * @return TRUE on success, FALSE on failure.
   246  */
   247 gboolean pvr2_render_init( void );
   249 /**
   250  * Render the current scene stored in PVR ram to the GL back buffer.
   251  */
   252 void pvr2_render_scene( void );
   254 /**
   255  * Display the scene rendered to the supplied address.
   256  * @return TRUE if there was an available render that was displayed,
   257  * otherwise FALSE (and no action was taken)
   258  */
   259 gboolean pvr2_render_display_frame( uint32_t address );
   262 void render_backplane( uint32_t *polygon, uint32_t width, uint32_t height, uint32_t mode );
   264 void render_set_context( uint32_t *context, int render_mode );
   266 void pvr2_render_tilebuffer( int width, int height, int clipx1, int clipy1, 
   267 			     int clipx2, int clipy2 );
   269 /****************************** Texture Cache ****************************/
   271 /**
   272  * Initialize the texture cache.
   273  */
   274 void texcache_init( void );
   276 /**
   277  * Initialize the GL side of the texture cache (texture ids and such).
   278  */
   279 void texcache_gl_init( void );
   281 /**
   282  * Flush all textures and delete. The cache will be non-functional until
   283  * the next call to texcache_init(). This would typically be done if
   284  * switching GL targets.
   285  */    
   286 void texcache_shutdown( void );
   288 /**
   289  * Evict all textures contained in the page identified by a texture address.
   290  */
   291 void texcache_invalidate_page( uint32_t texture_addr );
   293 /**
   294  * Return a texture ID for the texture specified at the supplied address
   295  * and given parameters (the same sequence of bytes could in theory have
   296  * multiple interpretations). We use the texture address as the primary
   297  * index, but allow for multiple instances at each address. The texture
   298  * will be bound to the GL_TEXTURE_2D target before being returned.
   299  * 
   300  * If the texture has already been bound, return the ID to which it was
   301  * bound. Otherwise obtain an unused texture ID and set it up appropriately.
   302  */
   303 GLuint texcache_get_texture( uint32_t texture_addr, int width, int height,
   304 			     int mode );
   306 /************************* Rendering support macros **************************/
   307 #define POLY1_DEPTH_MODE(poly1) ( pvr2_poly_depthmode[(poly1)>>29] )
   308 #define POLY1_DEPTH_ENABLE(poly1) (((poly1)&0x04000000) == 0 )
   309 #define POLY1_CULL_MODE(poly1) (((poly1)>>27)&0x03)
   310 #define POLY1_TEXTURED(poly1) (((poly1)&0x02000000))
   311 #define POLY1_SPECULAR(poly1) (((poly1)&0x01000000))
   312 #define POLY1_SHADE_MODEL(poly1) (((poly1)&0x00800000) ? GL_SMOOTH : GL_FLAT)
   313 #define POLY1_UV16(poly1)   (((poly1)&0x00400000))
   314 #define POLY1_SINGLE_TILE(poly1) (((poly1)&0x00200000))
   316 #define POLY2_SRC_BLEND(poly2) ( pvr2_poly_srcblend[(poly2) >> 29] )
   317 #define POLY2_DEST_BLEND(poly2) ( pvr2_poly_dstblend[((poly2)>>26)&0x07] )
   318 #define POLY2_SRC_BLEND_TARGET(poly2) ((poly2)&0x02000000)
   319 #define POLY2_DEST_BLEND_TARGET(poly2) ((poly2)&0x01000000)
   320 #define POLY2_COLOUR_CLAMP_ENABLE(poly2) ((poly2)&0x00200000)
   321 #define POLY2_ALPHA_ENABLE(poly2) ((poly2)&0x001000000)
   322 #define POLY2_TEX_ALPHA_ENABLE(poly2) (((poly2)&0x00080000) == 0 )
   323 #define POLY2_TEX_CLAMP_U(poly2) ((poly2)&0x00010000)
   324 #define POLY2_TEX_CLAMP_V(poly2) ((poly2)&0x00008000)
   325 #define POLY2_TEX_WIDTH(poly2) ( 1<< ((((poly2) >> 3) & 0x07 ) + 3) )
   326 #define POLY2_TEX_HEIGHT(poly2) ( 1<< (((poly2) & 0x07 ) + 3) )
   327 #define POLY2_TEX_BLEND(poly2) ( pvr2_poly_texblend[((poly2) >> 6)&0x03] )
   328 extern int pvr2_poly_depthmode[8];
   329 extern int pvr2_poly_srcblend[8];
   330 extern int pvr2_poly_dstblend[8];
   331 extern int pvr2_poly_texblend[4];
   332 extern int pvr2_render_colour_format[8];
   334 float halftofloat(uint16_t half);
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