lxdream 0.9.1| filename | src/gdrom/ide.c |
| changeset | 142:2f631c3a3946 |
| prev | 140:d26f4899898d |
| next | 143:9446fb6df0c5 |
| author | nkeynes |
| date | Tue May 02 14:09:11 2006 +0000 (16 years ago) |
| permissions | -rw-r--r-- |
| last change | Add packet.h Implement read toc, request sense, test ready commands. Fix failure to clear error status on new command |
| view | annotate | diff | log | raw |
1 /**
2 * $Id: ide.c,v 1.11 2006-05-02 14:09:11 nkeynes Exp $
3 *
4 * IDE interface implementation
5 *
6 * Copyright (c) 2005 Nathan Keynes.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
19 #define MODULE ide_module
21 #include <assert.h>
22 #include <stdlib.h>
23 #include "dream.h"
24 #include "asic.h"
25 #include "gdrom/ide.h"
26 #include "gdrom/gdrom.h"
27 #include "gdrom/packet.h"
29 #define MAX_WRITE_BUF 4096
30 #define MAX_SECTOR_SIZE 2352 /* Audio sector */
31 #define DEFAULT_DATA_SECTORS 8
33 static void ide_init( void );
34 static void ide_reset( void );
35 static void ide_save_state( FILE *f );
36 static int ide_load_state( FILE *f );
37 static void ide_raise_interrupt( void );
38 static void ide_clear_interrupt( void );
40 struct dreamcast_module ide_module = { "IDE", ide_init, ide_reset, NULL, NULL,
41 NULL, ide_save_state, ide_load_state };
43 struct ide_registers idereg;
45 static unsigned char command_buffer[12];
46 unsigned char *data_buffer = NULL;
47 uint32_t data_buffer_len = 0;
49 /* "\0\0\0\0\xb4\x19\0\0\x08SE REV 6.42990316" */
50 unsigned char gdrom_ident[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0xb4, 0x19, 0x00,
51 0x00, 0x08, 0x53, 0x45, 0x20, 0x20, 0x20, 0x20,
52 0x20, 0x20, 0x52, 0x65, 0x76, 0x20, 0x36, 0x2e,
53 0x34, 0x32, 0x39, 0x39, 0x30, 0x33, 0x31, 0x36 };
56 static void ide_init( void )
57 {
58 ide_reset();
59 data_buffer_len = DEFAULT_DATA_SECTORS;
60 data_buffer = malloc( MAX_SECTOR_SIZE * data_buffer_len );
61 assert( data_buffer != NULL );
62 }
64 static void ide_reset( void )
65 {
66 ide_clear_interrupt();
67 idereg.error = 0x01;
68 idereg.count = 0x01;
69 idereg.lba0 = /* 0x21; */ 0x81;
70 idereg.lba1 = 0x14;
71 idereg.lba2 = 0xeb;
72 idereg.feature = 0; /* Indeterminate really */
73 idereg.status = 0x00;
74 idereg.device = 0x00;
75 idereg.disc = gdrom_is_mounted() ? IDE_DISC_NONE : (IDE_DISC_CDROM|IDE_DISC_READY);
76 }
78 static void ide_save_state( FILE *f )
79 {
82 }
84 static int ide_load_state( FILE *f )
85 {
86 return 0;
87 }
89 static void ide_set_write_buffer( unsigned char *buf, int len )
90 {
91 idereg.status |= IDE_ST_DATA;
92 idereg.data = buf;
93 idereg.datalen = len;
94 idereg.writeptr = (uint16_t *)buf;
95 idereg.readptr = NULL;
96 }
98 static void ide_set_read_buffer( unsigned char *buf, int len, int blocksize )
99 {
100 idereg.status |= IDE_ST_DATA;
101 idereg.data = buf;
102 idereg.datalen = len;
103 idereg.readptr = (uint16_t *)buf;
104 idereg.writeptr = NULL;
105 idereg.lba1 = len&0xFF;
106 idereg.lba2 = len>>8;
107 idereg.blocksize = idereg.blockleft = blocksize;
108 }
110 static void ide_raise_interrupt( void )
111 {
112 if( idereg.intrq_pending == 0 ) {
113 idereg.intrq_pending = 1;
114 if( IS_IDE_IRQ_ENABLED() )
115 asic_event( EVENT_IDE );
116 }
117 }
119 static void ide_clear_interrupt( void )
120 {
121 if( idereg.intrq_pending != 0 ) {
122 idereg.intrq_pending = 0;
123 if( IS_IDE_IRQ_ENABLED() )
124 asic_clear_event( EVENT_IDE );
125 }
126 }
128 static void ide_set_error( int error_code )
129 {
130 idereg.status = 0x51;
131 idereg.error = error_code;
132 }
134 uint8_t ide_read_status( void )
135 {
136 if( (idereg.status & IDE_ST_BUSY) == 0 )
137 ide_clear_interrupt();
138 return idereg.status;
139 }
141 uint16_t ide_read_data_pio( void ) {
142 if( idereg.readptr == NULL )
143 return 0xFFFF;
144 uint16_t rv = *idereg.readptr++;
145 idereg.datalen-=2;
146 idereg.blockleft-=2;
147 if( idereg.datalen <=0 ) {
148 idereg.readptr = NULL;
149 idereg.status &= ~IDE_ST_DATA;
150 } else if( idereg.blockleft <= 0 ) {
151 ide_raise_interrupt();
152 idereg.blockleft = idereg.blocksize;
153 }
154 return rv;
155 }
157 void ide_write_data_pio( uint16_t val ) {
158 if( idereg.writeptr == NULL )
159 return;
160 *idereg.writeptr++ = val;
161 idereg.datalen-=2;
162 if( idereg.datalen <= 0 ) {
163 int len = ((unsigned char *)idereg.writeptr) - idereg.data;
164 idereg.writeptr = NULL;
165 idereg.status &= ~IDE_ST_DATA;
166 ide_write_buffer( idereg.data, len );
167 }
168 }
170 void ide_write_control( uint8_t val ) {
171 if( IS_IDE_IRQ_ENABLED() ) {
172 if( (val & 0x02) != 0 && idereg.intrq_pending != 0 )
173 asic_clear_event( EVENT_IDE );
174 } else {
175 if( (val & 0x02) == 0 && idereg.intrq_pending != 0 )
176 asic_event( EVENT_IDE );
177 }
178 idereg.control = val;
179 }
181 void ide_write_command( uint8_t val ) {
182 ide_clear_interrupt();
183 idereg.command = val;
184 switch( val ) {
185 case IDE_CMD_RESET_DEVICE:
186 ide_reset();
187 break;
188 case IDE_CMD_PACKET:
189 ide_set_write_buffer(command_buffer,12);
190 break;
191 case IDE_CMD_SET_FEATURE:
192 switch( idereg.feature ) {
193 case IDE_FEAT_SET_TRANSFER_MODE:
194 switch( idereg.count & 0xF8 ) {
195 case IDE_XFER_PIO:
196 INFO( "Set PIO default mode: %d", idereg.count&0x07 );
197 break;
198 case IDE_XFER_PIO_FLOW:
199 INFO( "Set PIO Flow-control mode: %d", idereg.count&0x07 );
200 break;
201 case IDE_XFER_MULTI_DMA:
202 INFO( "Set Multiword DMA mode: %d", idereg.count&0x07 );
203 break;
204 case IDE_XFER_ULTRA_DMA:
205 INFO( "Set Ultra DMA mode: %d", idereg.count&0x07 );
206 break;
207 default:
208 INFO( "Setting unknown transfer mode: %02X", idereg.count );
209 break;
210 }
211 break;
212 default:
213 WARN( "IDE: unimplemented feature: %02X", idereg.feature );
214 }
215 ide_raise_interrupt( );
216 break;
217 default:
218 WARN( "IDE: Unimplemented command: %02X", val );
219 }
220 idereg.status = (idereg.status | IDE_ST_READY | IDE_ST_SERV) & (~IDE_ST_ERROR);
221 }
223 void ide_set_packet_error( uint16_t error )
224 {
225 idereg.gdrom_error = error;
226 if( error != 0 ) {
227 idereg.error = (error & 0x0F) << 4;
228 idereg.status = 0x51;
229 }
230 }
232 /**
233 * Execute a packet command. This particular method is responsible for parsing
234 * the command buffers (12 bytes), and generating the appropriate responses,
235 * although the actual implementation is mostly delegated to gdrom.c
236 */
237 void ide_packet_command( unsigned char *cmd )
238 {
239 uint32_t length, datalen;
240 uint32_t lba;
241 int blocksize = idereg.lba1 + (idereg.lba2<<8);
243 ide_raise_interrupt( );
244 /* Okay we have the packet in the command buffer */
245 WARN( "ATAPI: Received Packet command: %02X", cmd[0] );
246 fwrite_dump( (unsigned char *)cmd, 12, stderr );
247 switch( cmd[0] ) {
248 case PKT_CMD_TEST_READY:
249 if( !gdrom_is_mounted() ) {
250 ide_set_packet_error( PKT_ERR_NODISC );
251 return;
252 }
253 ide_set_packet_error( 0 );
254 idereg.status = 0x50;
255 return;
256 break;
257 case PKT_CMD_IDENTIFY:
258 lba = cmd[2];
259 if( lba >= sizeof(gdrom_ident) ) {
260 ide_set_error(PKT_ERR_BADFIELD);
261 return;
262 }
263 length = cmd[4];
264 if( lba+length > sizeof(gdrom_ident) )
265 length = sizeof(gdrom_ident) - lba;
266 ide_set_read_buffer(gdrom_ident + lba, length, blocksize);
267 break;
268 case PKT_CMD_SENSE:
269 memset( data_buffer, 0, 10 );
270 length = cmd[4];
271 if( length > 10 )
272 length = 10;
273 data_buffer[0] = 0xf0;
274 data_buffer[2] = idereg.gdrom_error & 0xFF;
275 data_buffer[8] = (idereg.gdrom_error >> 8) & 0xFF;
276 ide_set_read_buffer( data_buffer, length , blocksize );
277 break;
278 case PKT_CMD_READ_TOC:
279 if( !gdrom_get_toc( data_buffer ) ) {
280 ide_set_packet_error( PKT_ERR_NODISC ); /* No disc in drive */
281 return;
282 }
283 length = (cmd[3]<<8) | cmd[4];
284 if( length > sizeof(struct gdrom_toc) )
285 length = sizeof(struct gdrom_toc);
286 ide_set_read_buffer( data_buffer, length, blocksize );
287 break;
288 case PKT_CMD_READ_SECTOR:
289 lba = cmd[2] << 16 | cmd[3] << 8 | cmd[4];
290 length = cmd[8] << 16 | cmd[9] << 8 | cmd[10]; /* blocks */
291 if( length > data_buffer_len ) {
292 do {
293 data_buffer_len = data_buffer_len << 1;
294 } while( data_buffer_len < length );
295 data_buffer = realloc( data_buffer, data_buffer_len );
296 }
298 if( !gdrom_is_mounted() ) {
299 ide_set_packet_error( PKT_ERR_NODISC );
300 return;
301 }
303 datalen = gdrom_read_sectors( lba, length, data_buffer );
304 if( datalen == 0 ) {
305 ide_set_packet_error( 0x05 );
306 return;
307 }
308 ide_set_read_buffer( data_buffer, datalen, blocksize );
309 break;
310 default:
311 ide_set_packet_error( PKT_ERR_BADCMD ); /* Invalid command */
312 return;
313 }
314 ide_set_packet_error( PKT_ERR_OK );
315 }
317 void ide_write_buffer( unsigned char *data, int datalen ) {
318 switch( idereg.command ) {
319 case IDE_CMD_PACKET:
320 ide_packet_command( data );
321 break;
322 }
323 }
325 /**
326 * DMA read request
327 *
328 * This method is called from the ASIC side when a DMA read request is
329 * initiated. If there is a pending DMA transfer already, we copy the
330 * data immediately, otherwise we record the DMA buffer for use when we
331 * get to actually doing the transfer.
332 */
333 void ide_dma_read_req( uint32_t addr, uint32_t length )
334 {
337 }
.