filename | src/sh4/ia32abi.h |
changeset | 539:75f3e594d4a7 |
next | 559:06714bc64271 |
next | 586:2a3ba82cf243 |
author | nkeynes |
date | Thu Nov 22 11:10:15 2007 +0000 (16 years ago) |
permissions | -rw-r--r-- |
last change | Re-add "Load Binary" menu item (misplaced in GUI rewrite) Prevent running with no code loaded |
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1 /**
2 * $Id: sh4x86.in,v 1.20 2007-11-08 11:54:16 nkeynes Exp $
3 *
4 * Provides the implementation for the ia32 ABI (eg prologue, epilogue, and
5 * calling conventions)
6 *
7 * Copyright (c) 2007 Nathan Keynes.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 */
20 #ifndef __lxdream_ia32abi_H
21 #define __lxdream_ia32abi_H 1
23 #define load_ptr( reg, ptr ) load_imm32( reg, (uint32_t)ptr );
25 /**
26 * Note: clobbers EAX to make the indirect call - this isn't usually
27 * a problem since the callee will usually clobber it anyway.
28 */
29 #define CALL_FUNC0_SIZE 7
30 static inline void call_func0( void *ptr )
31 {
32 load_imm32(R_EAX, (uint32_t)ptr);
33 CALL_r32(R_EAX);
34 }
36 #define CALL_FUNC1_SIZE 11
37 static inline void call_func1( void *ptr, int arg1 )
38 {
39 PUSH_r32(arg1);
40 call_func0(ptr);
41 ADD_imm8s_r32( 4, R_ESP );
42 }
44 #define CALL_FUNC2_SIZE 12
45 static inline void call_func2( void *ptr, int arg1, int arg2 )
46 {
47 PUSH_r32(arg2);
48 PUSH_r32(arg1);
49 call_func0(ptr);
50 ADD_imm8s_r32( 8, R_ESP );
51 }
53 /**
54 * Write a double (64-bit) value into memory, with the first word in arg2a, and
55 * the second in arg2b
56 * NB: 30 bytes
57 */
58 #define MEM_WRITE_DOUBLE_SIZE 30
59 static inline void MEM_WRITE_DOUBLE( int addr, int arg2a, int arg2b )
60 {
61 ADD_imm8s_r32( 4, addr );
62 PUSH_r32(arg2b);
63 PUSH_r32(addr);
64 ADD_imm8s_r32( -4, addr );
65 PUSH_r32(arg2a);
66 PUSH_r32(addr);
67 call_func0(sh4_write_long);
68 ADD_imm8s_r32( 8, R_ESP );
69 call_func0(sh4_write_long);
70 ADD_imm8s_r32( 8, R_ESP );
71 }
73 /**
74 * Read a double (64-bit) value from memory, writing the first word into arg2a
75 * and the second into arg2b. The addr must not be in EAX
76 * NB: 27 bytes
77 */
78 #define MEM_READ_DOUBLE_SIZE 27
79 static inline void MEM_READ_DOUBLE( int addr, int arg2a, int arg2b )
80 {
81 PUSH_r32(addr);
82 call_func0(sh4_read_long);
83 POP_r32(addr);
84 PUSH_r32(R_EAX);
85 ADD_imm8s_r32( 4, addr );
86 PUSH_r32(addr);
87 call_func0(sh4_read_long);
88 ADD_imm8s_r32( 4, R_ESP );
89 MOV_r32_r32( R_EAX, arg2b );
90 POP_r32(arg2a);
91 }
93 #define EXIT_BLOCK_SIZE 29
96 /**
97 * Emit the 'start of block' assembly. Sets up the stack frame and save
98 * SI/DI as required
99 */
100 void sh4_translate_begin_block( sh4addr_t pc )
101 {
102 PUSH_r32(R_EBP);
103 /* mov &sh4r, ebp */
104 load_ptr( R_EBP, &sh4r );
106 sh4_x86.in_delay_slot = FALSE;
107 sh4_x86.priv_checked = FALSE;
108 sh4_x86.fpuen_checked = FALSE;
109 sh4_x86.branch_taken = FALSE;
110 sh4_x86.backpatch_posn = 0;
111 sh4_x86.block_start_pc = pc;
112 sh4_x86.tstate = TSTATE_NONE;
113 #ifdef STACK_ALIGN
114 sh4_x86.stack_posn = 8;
115 #endif
116 }
118 /**
119 * Exit the block with sh4r.pc already written
120 * Bytes: 15
121 */
122 void exit_block_pcset( pc )
123 {
124 load_imm32( R_ECX, ((pc - sh4_x86.block_start_pc)>>1)*sh4_cpu_period ); // 5
125 ADD_r32_sh4r( R_ECX, REG_OFFSET(slice_cycle) ); // 6
126 load_spreg( R_EAX, REG_OFFSET(pc) );
127 call_func1(xlat_get_code,R_EAX);
128 POP_r32(R_EBP);
129 RET();
130 }
132 /**
133 * Exit the block to an absolute PC
134 */
135 void exit_block( sh4addr_t pc, sh4addr_t endpc )
136 {
137 load_imm32( R_ECX, pc ); // 5
138 store_spreg( R_ECX, REG_OFFSET(pc) ); // 3
139 MOV_moff32_EAX( xlat_get_lut_entry(pc) ); // 5
140 AND_imm8s_r32( 0xFC, R_EAX ); // 3
141 load_imm32( R_ECX, ((endpc - sh4_x86.block_start_pc)>>1)*sh4_cpu_period ); // 5
142 ADD_r32_sh4r( R_ECX, REG_OFFSET(slice_cycle) ); // 6
143 POP_r32(R_EBP);
144 RET();
145 }
147 /**
148 * Write the block trailer (exception handling block)
149 */
150 void sh4_translate_end_block( sh4addr_t pc ) {
151 if( sh4_x86.branch_taken == FALSE ) {
152 // Didn't exit unconditionally already, so write the termination here
153 exit_block( pc, pc );
154 }
155 if( sh4_x86.backpatch_posn != 0 ) {
156 uint8_t *end_ptr = xlat_output;
157 // Exception termination. Jump block for various exception codes:
158 PUSH_imm32( EXC_DATA_ADDR_READ );
159 JMP_rel8( 33, target1 );
160 PUSH_imm32( EXC_DATA_ADDR_WRITE );
161 JMP_rel8( 26, target2 );
162 PUSH_imm32( EXC_ILLEGAL );
163 JMP_rel8( 19, target3 );
164 PUSH_imm32( EXC_SLOT_ILLEGAL );
165 JMP_rel8( 12, target4 );
166 PUSH_imm32( EXC_FPU_DISABLED );
167 JMP_rel8( 5, target5 );
168 PUSH_imm32( EXC_SLOT_FPU_DISABLED );
169 // target
170 JMP_TARGET(target1);
171 JMP_TARGET(target2);
172 JMP_TARGET(target3);
173 JMP_TARGET(target4);
174 JMP_TARGET(target5);
175 // Raise exception
176 load_spreg( R_ECX, REG_OFFSET(pc) );
177 ADD_r32_r32( R_EDX, R_ECX );
178 ADD_r32_r32( R_EDX, R_ECX );
179 store_spreg( R_ECX, REG_OFFSET(pc) );
180 MOV_moff32_EAX( &sh4_cpu_period );
181 MUL_r32( R_EDX );
182 ADD_r32_sh4r( R_EAX, REG_OFFSET(slice_cycle) );
184 call_func0( sh4_raise_exception );
185 ADD_imm8s_r32( 4, R_ESP );
186 load_spreg( R_EAX, REG_OFFSET(pc) );
187 call_func1(xlat_get_code,R_EAX);
188 POP_r32(R_EBP);
189 RET();
191 sh4_x86_do_backpatch( end_ptr );
192 }
193 }
195 #endif
.